Difference between revisions of "Design overview (AXEL ULite)"

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== Introduction ==
 
== Introduction ==
  
−
The heart of AXEL ULite system-on-module (SOM for short) is composed by the following components:
+
The heart of AXELULite system-on-module (SOM for short) is composed by the following components:
 
* NXP i.MX6UL application processor
 
* NXP i.MX6UL application processor
 
* Power supply unit
 
* Power supply unit
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* 1x 204 pin SODIMM connector with interfaces signals
 
* 1x 204 pin SODIMM connector with interfaces signals
  
−
This article shortly describes the main AXEL ULite components.
+
This article shortly describes the main AXELULite components.
  
 
== Processor Info ==
 
== Processor Info ==
  
−
The i.MX 6UltraLite (i.MX6UL) processor features NXP’s advanced implementation of the ARM® Cortex®-A7, a single-core cost-effective and power-efficient solution, which operates at speeds up to 696 MHz. This SOC includes a deep encryption and security capability, a complex and flexible boot management and an integrated power management. As a result, i.MX6UL devices are able to serve a wide range of applications including:
+
The i.MX6UL processor features NXP’s advanced implementation of the ARM® Cortex®-A7, which operates at speeds up to 696 MHz. They include 2D and 3D graphics processors, 1080p video processing, and integrated power management. As a result, the i.MX6 devices are able to serve a wide range of applications including:
−
 
+
* Automotive driver assistance, driver information, and infotainment
−
* Industrial/IoT gateways
+
* Multimedia-centric smart mobile devices
−
* Instrument clusters, and portable medical devices
+
* Instrument clusters, and portable medical devices.
−
* Dataloggers
+
* E-Readers, smartbooks, tablets
−
* Remote control units
+
* Intelligent industrial motor control, industrial networking, and machine vision
 +
* IP and Smart camera
 
* Human-machine interfaces
 
* Human-machine interfaces
−
* Safety blocks for IoT data manipulation and streaming
+
* Medical diagnostics and imaging
 +
* Digital signage
 +
* Video and night vision equipment
 +
* Multimedia-focused products
 +
* Entertainment and gaming appliances
  
−
The i.MX6UL application processor is composed of the following major functional blocks:
+
The i.MX6 application processor is composed of the following major functional blocks:
−
* Single ARM Cortex-A7 MPCore, featuring:
+
* ARM Cortex-A9 MPCore 1x/2x/4x CPU Processor, featuring:
−
** 128KB unified L2 cache
+
** 1 Megabyte unified L2 cache shared by all CPU cores
 
** NEON MPE coprocessor
 
** NEON MPE coprocessor
 +
** General Interrupt Controller (GIC) with 128 interrupt support
 +
** Snoop Control Unit (SCU)
 
** External memories interconnect
 
** External memories interconnect
 +
* Hardware accelerators, including:
 +
** VPU -Video Processing Unit
 +
** Two IPUv3H -Image Processing Unit (version 3H)
 +
** 2D/3D/Vector graphics accelerators
 
* Connectivity peripherals, including
 
* Connectivity peripherals, including
−
** 2xRMII - Ethernet 10/100 interfaces
+
** PCIe
 +
** SATA
 
** SD/SDIO/MMC
 
** SD/SDIO/MMC
−
** Serial buses: USB, UART, I²C, SPI, CAN, ...
+
** Serial buses: USB, UART, I²C, SPI, ...
−
* Security Module, including:
 
−
** True and Pseudo Random Number Generator
 
−
** Cryptographic Acceleration and Assurance Module
 
−
** Secure Non-Volatile Storage with Violation/Tamper detection and reporting
 
  
−
AXEL ULite can equip the entire range of i.MX6UL SOC models with the following main features:
+
Axel Lite can mount three versions of the i.MX6 processor. The following table shows a comparison between the processor models, highlighting the differences:
  
−
* Package: 14 x 14 mm, 0.8 pitch, BGA
+
 
−
* Clock frequency: 528 MHz or 696 MHz
+
{| class="wikitable" |
−
* Commercial (0-95°C), Industrial (-40-105°C) and Automotive (-40-125°C) temperature ranges
+
| align="center" style="background:#f0f0f0;"|'''Processor'''
 +
| align="center" style="background:#f0f0f0;"|'''# Cores'''
 +
| align="center" style="background:#f0f0f0;"|'''Clock'''
 +
| align="center" style="background:#f0f0f0;"|'''L2 Cache'''
 +
| align="center" style="background:#f0f0f0;"|'''DDR3'''
 +
| align="center" style="background:#f0f0f0;"|'''Graphics Acceleration'''
 +
| align="center" style="background:#f0f0f0;"|'''IPU'''
 +
| align="center" style="background:#f0f0f0;"|'''VPU'''
 +
| align="center" style="background:#f0f0f0;"|'''SATA-II'''
 +
|-
 +
| i.MX6 Solo || 1 ||800 MHz<br>1 GHz ||512 KB ||32 bit @ 400 MHz ||3D: Vivante GC880<br>2D: Vivante GC320<br>Vector: N.A. ||1x ||1x ||N.A.
 +
|-
 +
| i.MX6 Dual || 2 ||850 MHz<br>1 GHz<br>1.2 GHz ||1 MB ||64 bit @ 533 MHz ||3D: Vivante GC2000<br>2D: Vivante GC320<br>Vector: Vivante GC335 ||2x ||2x || Yes
 +
|-
 +
| i.MX6 Quad || 4 ||850 MHz<br>1 GHz<br>1.2 GHz ||1 MB ||64 bit @ 533 MHz ||3D: Vivante GC2000<br>2D: Vivante GC320<br>Vector: Vivante GC335 ||2x ||2x || Yes
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: i.MX6 models comparison
 +
|}
  
 
== RAM memory bank ==
 
== RAM memory bank ==
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| '''CPU connection'''||Multi-mode DDR controller (MMDC)
 
| '''CPU connection'''||Multi-mode DDR controller (MMDC)
 
|-
 
|-
−
| '''Size min'''||256 MB  
+
| '''Size min'''||512 MB  
 
|-
 
|-
−
| '''Size max'''||512 MB
+
| '''Size max'''||4 GB
 
|-
 
|-
−
| '''Width'''||16 bit  
+
| '''Width'''||64 bit  
 
|-
 
|-
−
| '''Speed'''||400 MHz  
+
| '''Speed'''||533 MHz  
 
|-
 
|-
 
|}
 
|}
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== NOR flash bank ==
 
== NOR flash bank ==
  
−
NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the ECSPI1 channel 5 and can act as boot memory. The following table reports the NOR flash specifications:
+
NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI channel 5 and by default it acts as boot memory. The following table reports the NOR flash specifications:
  
 
{| class="wikitable" |  
 
{| class="wikitable" |  
 
|-
 
|-
−
| '''CPU connection'''||ECSPI1
+
| '''CPU connection'''||eCSPI channel 5
 
|-
 
|-
 
| '''Size min'''||8 MB  
 
| '''Size min'''||8 MB  
 
|-
 
|-
−
| '''Size max'''||32 MB  
+
| '''Size max'''||64 MB  
 
|-
 
|-
−
| '''Chip select'''||ECSPI1_SS0
+
| '''Chip select'''||ECSPI5_SS0
 
|-
 
|-
 
| '''Bootable'''||Yes
 
| '''Bootable'''||Yes
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|-
 
|-
 
| '''Chip select'''||NANDF_CS0
 
| '''Chip select'''||NANDF_CS0
−
|-
 
−
| '''Interface'''||asynchronous
 
−
|-
 
−
| '''technology'''||SLC
 
 
|-
 
|-
 
| '''Bootable'''||Yes  
 
| '''Bootable'''||Yes  
 
|-
 
|-
 
|}
 
|}
 +
 +
== Memory map ==
 +
For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX Applications Processor Reference Manual.
  
 
== Power supply unit ==
 
== Power supply unit ==
−
AXEL ULite embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the voltage ranges power supply can assume as well as all other parameters. Three supported voltage ranges are available. For more details please refer to [[Power (AXEL ULite)|this page]].
+
AXELULite embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the voltage ranges power supply can assume as well as all other parameters. Three supported voltage ranges are available. For more details please refer to [[Power_(AXELULite)|this page]].
  
 
==Bootstrap options==
 
==Bootstrap options==
−
For more details about bootstrap options, please refer to [[Boot process and bootstrap configuration (AXEL ULite)|this page]].
+
For more details about bootstrap options, please refer to [[Boot_process_and_bootstrap_configuration_(AXELULite)|this page]].
  
 
== SOM connector ==
 
== SOM connector ==
−
All interface signals AXEL ULite provides are routed through SODIMM DDR3 204 pin. The dedicated carrier board must mount the counterpart [[#Integration_guide_(AXEL_ULite)SODIMM204 mating connector|mating connector]] and connect the desired peripheral interfaces according to [[Pinout (AXEL ULite)|AXEL ULite pinout specifications]].
+
All interface signals AXELULite provides are routed through SODIMM DDR3 204 pin (named J2). The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to [[Pinout_(AXELULite)|AXELULite pinout specifications]].

Revision as of 08:07, 15 July 2016

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Info Box
AXEL ULite-top.png Applies to AXEL ULite

Introduction[edit | edit source]

The heart of AXELULite system-on-module (SOM for short) is composed by the following components:

  • NXP i.MX6UL application processor
  • Power supply unit
  • DDR3L memory bank
  • NOR and NAND flash banks
  • 1x 204 pin SODIMM connector with interfaces signals

This article shortly describes the main AXELULite components.

Processor Info[edit | edit source]

The i.MX6UL processor features NXP’s advanced implementation of the ARM® Cortex®-A7, which operates at speeds up to 696 MHz. They include 2D and 3D graphics processors, 1080p video processing, and integrated power management. As a result, the i.MX6 devices are able to serve a wide range of applications including:

  • Automotive driver assistance, driver information, and infotainment
  • Multimedia-centric smart mobile devices
  • Instrument clusters, and portable medical devices.
  • E-Readers, smartbooks, tablets
  • Intelligent industrial motor control, industrial networking, and machine vision
  • IP and Smart camera
  • Human-machine interfaces
  • Medical diagnostics and imaging
  • Digital signage
  • Video and night vision equipment
  • Multimedia-focused products
  • Entertainment and gaming appliances

The i.MX6 application processor is composed of the following major functional blocks:

  • ARM Cortex-A9 MPCore 1x/2x/4x CPU Processor, featuring:
    • 1 Megabyte unified L2 cache shared by all CPU cores
    • NEON MPE coprocessor
    • General Interrupt Controller (GIC) with 128 interrupt support
    • Snoop Control Unit (SCU)
    • External memories interconnect
  • Hardware accelerators, including:
    • VPU -Video Processing Unit
    • Two IPUv3H -Image Processing Unit (version 3H)
    • 2D/3D/Vector graphics accelerators
  • Connectivity peripherals, including
    • PCIe
    • SATA
    • SD/SDIO/MMC
    • Serial buses: USB, UART, I²C, SPI, ...

Axel Lite can mount three versions of the i.MX6 processor. The following table shows a comparison between the processor models, highlighting the differences:


Processor # Cores Clock L2 Cache DDR3 Graphics Acceleration IPU VPU SATA-II
i.MX6 Solo 1 800 MHz
1 GHz		 512 KB 32 bit @ 400 MHz 3D: Vivante GC880
2D: Vivante GC320
Vector: N.A.		 1x 1x N.A.
i.MX6 Dual 2 850 MHz
1 GHz
1.2 GHz		 1 MB 64 bit @ 533 MHz 3D: Vivante GC2000
2D: Vivante GC320
Vector: Vivante GC335		 2x 2x Yes
i.MX6 Quad 4 850 MHz
1 GHz
1.2 GHz		 1 MB 64 bit @ 533 MHz 3D: Vivante GC2000
2D: Vivante GC320
Vector: Vivante GC335		 2x 2x Yes
Table: i.MX6 models comparison

RAM memory bank[edit | edit source]

DDR3L SDRAM memory bank is composed by a 16-bit wide chip. The following table reports the SDRAM specifications:

CPU connection Multi-mode DDR controller (MMDC)
Size min 512 MB
Size max 4 GB
Width 64 bit
Speed 533 MHz

NOR flash bank[edit | edit source]

NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI channel 5 and by default it acts as boot memory. The following table reports the NOR flash specifications:

CPU connection eCSPI channel 5
Size min 8 MB
Size max 64 MB
Chip select ECSPI5_SS0
Bootable Yes

NAND flash bank[edit | edit source]

On board main storage memory is a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. Optionally, it can act as boot peripheral. The following table reports the NAND flash specifications:

CPU connection Raw NAND flash controller
Page size 512 byte, 2 kbyte or 4 kbyte
Size min 128 MB
Size max 2 GB
Width 8 bit
Chip select NANDF_CS0
Bootable Yes

Memory map[edit | edit source]

For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX Applications Processor Reference Manual.

Power supply unit[edit | edit source]

AXELULite embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the voltage ranges power supply can assume as well as all other parameters. Three supported voltage ranges are available. For more details please refer to this page.

Bootstrap options[edit | edit source]

For more details about bootstrap options, please refer to this page.

SOM connector[edit | edit source]

All interface signals AXELULite provides are routed through SODIMM DDR3 204 pin (named J2). The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to AXELULite pinout specifications.

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