Difference between revisions of "AURA SOM/AURA Hardware/Power and Reset/System boot"

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<section begin=History/>
 
{| style="border-collapse:collapse; "
 
{| style="border-collapse:collapse; "
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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
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!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
 
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |2024/02/dd
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|2024/02/dd
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First documentation release
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|First documentation release
 
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<section end="History" />
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<section end=History/>
 
__FORCETOC__
 
__FORCETOC__
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<section begin="Body" />
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<section begin=Body/>
  
 
[[File:TBD.png | center | 400px]]
 
[[File:TBD.png | center | 400px]]
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* determines whether the boot is secure or non-secure
 
* determines whether the boot is secure or non-secure
 
* performs some initialization of the system and clean-ups
 
* performs some initialization of the system and clean-ups
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* reads the OTP settings
 
 
* reads the mode pins to determine the primary boot device
 
* reads the mode pins to determine the primary boot device
 
* once it is satisfied, it executes the boot code
 
* once it is satisfied, it executes the boot code
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=== Boot options ===
 
=== Boot options ===
  
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The default primary boot device is defined at the factory and identified by the Boot Mode fileld of the ordering code as follows:
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Two options are available related to system boot. They are identified by the Boot field of the ordering code as follows:
 
* 0: SPI NOR / SD option (SOM code: DAUxxx0xxxxR)
 
* 0: SPI NOR / SD option (SOM code: DAUxxx0xxxxR)
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* 1: eMMC / SD option (SOM code: DAUxxx1xxxxR)
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* 1: eMMC / SD option (SOM code: DAUxxx2xxxxR)
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* 2: SPI NAND / SD option (SOM code: DAUxxx2xxxxR)
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* 2: SPI NAND / SD option (SOM code: DAUxxx1xxxxR)
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For both options an alternative primary boot from SD/MMC card is provided, selectable by driving low the BOOT_MODE_SEL signal. Bootable SD/MMC card connects via the SD2 (USDHC2) bus.
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For both options the selection of primary boot device is determined by the BOOT_MODE_SEL signal as described in the following sections. BOOT_MODE_SEL is latched when processor reset is released.
  
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All boot modes provide 'single boot' mode, that is the Cortex-A55 ROM loads all containers and images.
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In any case, boot process is managed by on-chip boot ROM code that is described in detail in processor's Reference Manual.
  
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If primary boot fail '''TBD'''
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==== SPI NOR / SD option ====
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{| class="wikitable"
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Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:
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!Ordering code 'Boot Mode' fileld
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* BOOT_MODE_SEL = 0
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!BOOT_MODE_SEL
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** primary boot device is SD2 (USDHC2)
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!Primary boot device
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* boot ROM will try to boot a valid image from the SD card first, and then from the SPI NOR. In case no valid image is found, boot ROM shall enable USB serial download mode automatically
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!Secondary boot device (if failed primary)
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* BOOT_MODE_SEL = 1 or floating
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|-
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** primary boot device is SPI NOR flash connected to FLEXSPI
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| rowspan="2" |0
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** in case no valid image is found in SPI NOR flash, boot ROM shall enable USB serial download mode automatically
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|0
 
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|SD/MMC card on USDHC2
 
−
|
 
−
|-
 
−
|1
 
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|FlexSPI NOR on FLEXSPI1
 
−
|
 
−
|-
 
−
| rowspan="2" |1
 
−
|0
 
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|SD/MMC card on USDHC2
 
−
|
 
−
|-
 
−
|1
 
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|eMMC on USDHC1
 
−
|
 
−
|-
 
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| rowspan="2" |2
 
−
|0
 
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|SD/MMC card on USDHC2
 
−
|
 
−
|-
 
−
|1
 
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|FlexSPI NAND on FLEXSPI1
 
−
|
 
−
|}
 
−
 
 
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BOOT_MODE_SEL is latched when processor reset is released.
 
  
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The iMX93x SoC uses some GPIOs to read the boot configuration set on the SOM: for this reason the SOM's ports UART1_TXD, UART2_TXD, SAI1_TXFS and SAI1_TXD0 are floating (high impedance) while CPU_PORn signal is low.
+
==== eMMC / SD option ====
 +
Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:
 +
* BOOT_MODE_SEL = 0
 +
** primary boot device is SD2 (USDHC2)
 +
** in case no valid image is found in SD card, boot ROM shall enable USB serial download mode automatically
 +
* BOOT_MODE_SEL = 1 or floating
 +
** primary boot device is eMMC connected to USDHC1
 +
** in case no valid image is found in eMMC flash, boot ROM shall enable USB serial download mode automatically
  
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[[File:AURA-boot-opt.png | 800px]]
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==== SPI NAND / SD option ====
 +
Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:
 +
* BOOT_MODE_SEL = 0
 +
** primary boot device is SD2 (USDHC2)
 +
** in case no valid image is found in SD card, boot ROM shall enable USB serial download mode automatically
 +
* BOOT_MODE_SEL = 1 or floating
 +
** primary boot device is SPI NAND flash connected to FLEXSPI
 +
** in case no valid image is found in SPI NAND flash, boot ROM shall enable USB serial download mode automatically
  
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{| class="wikitable"
 
−
|+TBD
 
−
|}
 
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*in case no valid image is found in XXXXX, boot ROM shall enable USB serial download mode automatically
 
 
===Important note for ''manufacture mode'' management===
 
===Important note for ''manufacture mode'' management===
 
When the internal boot and recover boot (if enabled) failed, the boot goes to the SD/MMC manufacture mode before the serial download mode.
 
When the internal boot and recover boot (if enabled) failed, the boot goes to the SD/MMC manufacture mode before the serial download mode.
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Bootstrap stage has to be intended as the time elapsing between the release of hardware reset (CPU_PORn) and the execution of the first instruction of user code (typically this is the reset vector of U-Boot boot loader).  
 
Bootstrap stage has to be intended as the time elapsing between the release of hardware reset (CPU_PORn) and the execution of the first instruction of user code (typically this is the reset vector of U-Boot boot loader).  
  
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<section end="Body" />
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<section end=Body/>
  
 
[[Category:AURA]]
 
[[Category:AURA]]

Revision as of 17:25, 2 February 2024

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History
Issue Date Notes
2024/02/dd First documentation release



TBD.png

System boot[edit | edit source]

The boot process begins at Power On Reset (POR) where the hardware reset logic forces the ARM core to begin execution starting from the on-chip boot ROM. The boot ROM:

  • determines whether the boot is secure or non-secure
  • performs some initialization of the system and clean-ups
  • reads the mode pins to determine the primary boot device
  • once it is satisfied, it executes the boot code

Boot options[edit | edit source]

Two options are available related to system boot. They are identified by the Boot field of the ordering code as follows:

  • 0: SPI NOR / SD option (SOM code: DAUxxx0xxxxR)
  • 1: eMMC / SD option (SOM code: DAUxxx2xxxxR)
  • 2: SPI NAND / SD option (SOM code: DAUxxx1xxxxR)

For both options the selection of primary boot device is determined by the BOOT_MODE_SEL signal as described in the following sections. BOOT_MODE_SEL is latched when processor reset is released.

In any case, boot process is managed by on-chip boot ROM code that is described in detail in processor's Reference Manual.

SPI NOR / SD option[edit | edit source]

Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:

  • BOOT_MODE_SEL = 0
    • primary boot device is SD2 (USDHC2)
  • boot ROM will try to boot a valid image from the SD card first, and then from the SPI NOR. In case no valid image is found, boot ROM shall enable USB serial download mode automatically
  • BOOT_MODE_SEL = 1 or floating
    • primary boot device is SPI NOR flash connected to FLEXSPI
    • in case no valid image is found in SPI NOR flash, boot ROM shall enable USB serial download mode automatically

eMMC / SD option[edit | edit source]

Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:

  • BOOT_MODE_SEL = 0
    • primary boot device is SD2 (USDHC2)
    • in case no valid image is found in SD card, boot ROM shall enable USB serial download mode automatically
  • BOOT_MODE_SEL = 1 or floating
    • primary boot device is eMMC connected to USDHC1
    • in case no valid image is found in eMMC flash, boot ROM shall enable USB serial download mode automatically

SPI NAND / SD option[edit | edit source]

Selection of primary boot device is determined by the BOOT_MODE_SEL signal as follows:

  • BOOT_MODE_SEL = 0
    • primary boot device is SD2 (USDHC2)
    • in case no valid image is found in SD card, boot ROM shall enable USB serial download mode automatically
  • BOOT_MODE_SEL = 1 or floating
    • primary boot device is SPI NAND flash connected to FLEXSPI
    • in case no valid image is found in SPI NAND flash, boot ROM shall enable USB serial download mode automatically

Important note for manufacture mode management[edit | edit source]

When the internal boot and recover boot (if enabled) failed, the boot goes to the SD/MMC manufacture mode before the serial download mode.

By default, the SD/MMC manufacture mode is enabled. DAVE Embedded Systems do not blow the fuse of the DISABLE_SDMMC_MFG in order to disable it.

Boot ROM detects SD/MMC card on USDHC2 port. If a card is inserted, ROM will try to boot from it. SD2_CD_B is used as card detect signal during bootrom's manufacture mode. This signal need to be kept high during bootstrap stage to prevent the intervention of bootrom's manufacture mode, if it's not desidered.

Bootstrap stage has to be intended as the time elapsing between the release of hardware reset (CPU_PORn) and the execution of the first instruction of user code (typically this is the reset vector of U-Boot boot loader).


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