ZERO SOM/ZERO Evaluation Kit/Interfaces and Connectors/LCD
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Contents
LCD[edit | edit source]
Description[edit | edit source]
The LCD interface available on the Evaluation Kit at the connector J30.
J30 is a 40-pin 0.5mm pitch FPC connector.
On this connector are routed the RGB signals interface that operates in the RGB-666 color mode.
Signals[edit | edit source]
The following table describes the interfaces signals:
| Pin# | OSM ball | Pin name | Pin function | Pin Notes |
|---|---|---|---|---|
| 1,2,12,16,20,24,28 32,36,37,39,40 |
- | DGND | Ground | |
| 4,5,6 | - | 5V | Power output | |
| 7,8 | - | 3V3 | Power output | |
| 10 | B_K3 | RGB_HSYNC | Horizontal sync | this pin is routed - by default - to GND (and not connected to HSYNC) |
| 11 | B_L3 | RGB_VSYNC | Vertical sync | this pin is routed - by default - to GND (and not connected to VSYNC) |
| 13 | B_M3 | RGB_B5 | B7 bit | |
| 14 | B_N4 | RGB_B4 | B6 bit | |
| 15 | B_M3 | RGB_B3 | B5 bit | |
| 17 | B_P3 | RGB_B2 | B4 bit | |
| 18 | B_R3 | RGB_B1 | B2 bit | |
| 19 | B_R4 | RGB_B0 | B2 bit | |
| 21 | B_T4 | RGB_G5 | G7 bit | |
| 22 | B_T3 | RGB_G4 | G6 bit | |
| 23 | B_U3 | RGB_G3 | G5 bit | |
| 25 | B_V4 | RGB_G2 | G4 bit | |
| 26 | B_V3 | RGB_G1 | G2 bit | |
| 27 | B_W4 | RGB_G0 | G2 bit | |
| 29 | B_Y4 | RGB_R5 | R7 bit | |
| 30 | B_Y5 | RGB_R4 | R6 bit | |
| 31 | B_AA5 | RGB_R3 | R5 bit | |
| 33 | B_Y6 | RGB_R2 | R4 bit | |
| 34 | B_AA6 | RGB_R1 | R2 bit | |
| 35 | B_Y7 | RGB_R0 | R2 bit |
Device mapping[edit | edit source]
- LCD is typically mapped to
/dev/fb0device in Linux
Power sequence[edit | edit source]
Most of the LCD panels has many supplies and need a specific timing to power the rails and start the the signals.
The Evaluation Kit provides GPIO controlled power rails that can be leveraged both at bootloader and kernel level to meet any specifications.
The following sections describe the available rails:
+RGB_3V3[edit | edit source]
The most common voltage to supply the LCD panel internal logic. This rail is enabled by GPIO_C_5 that is connected to B_F4 OSM ball.
+RGB_5V[edit | edit source]
The most common voltage to supply the LCD panel backlight. This rail is enabled by GPIO_C_4 that is connected to B_F3 OSM ball.
Device usage[edit | edit source]
The display power sequence can be leveraged by a DAVE custom code that allow to set the timings both in U-boot and in Linux kernel sources.
The associated framebuffer device is accessed in Linux through the standard graphic access.
