UNICA SBC/Interfaces and Connectors/LVDS

History
Issue Date	Notes
2026/09/16	First documentation release

LVDS

Description

UNICA provides one LVDS channel on J5 Hirose DF13EA-30DP-1.25V double row 1.25mm connector.

LVDS connector

Signals

The following tables describes the interface signals

Pin#	Pin name	Pin function	Pin Notes
7, 9	3.3V	3.3 V
1, 3, 5	+VBL_LCD	+5V or +VIN
2, 4, 6, 17, 18, 23, 24 29, 30	-	DGND
19	LVDS_A_TX0_N	LVDS Data 0 -
21	LVDS_A_TX0_P	LVDS Data 0 +
25	LVDS_A_TX1_N	LVDS Data 1 -
27	LVDS_A_TX1_P	LVDS Data 1 +
20	LVDS_A_TX2_N	LVDS Data 2 -
22	LVDS_A_TX2_P	LVDS Data 2 +
13	LVDS_A_CLK_N	LVDS Clock -
15	LVDS_A_CLK_P	LVDS Clock +
26	LVDS_A_TX3_N	LVDS Data 3 -
28	LVDS_A_TX3_P	LVDS Data 3 +
8	LCD_GPIO	GPIO	general purpose gpio
10	LCD_PWM	PWM	PWM for brightness control
12	LCD_VBL_EN		gpio to enable the VBL power supply
14	LCD_VCC_EN		gpio to enable the LCD for the LCD power supply
16	LCD_BL_EN		gpio to enable the backlight (on LCD)

Device mapping

LVDS is mapped to LVDS-1 DRM "connector".

Power sequence

Most of the LCD panels have many supplies and need a specific timing to power the rails and start the signals.

UNICA power rails can be controlled both at the bootloader and kernel level to meet any specifications.

The following sections describe the available rails and gpio:

• +3V3_LCD: the most common voltage to supply the LCD panel internal rail is enabled by LCD_VCC_EN gpio
• +VBL_LCD: the voltage to supply the LCD panel backlight rail is enabled by LCD_VBL_EN gpio
  • VBL backlight voltage can be selected from +5V or fomr +VIN (hardware mounting option)

GPIO

• LCD_BL_EN: used to enable the backlight on some LCD panels wich require this signal
• LCD_PWM: PWM signal to control the LCD brightness

Device usage

The associated framebuffer device is accessed in Linux through the standard framebuffer or DRM kernel device.