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Hardware Manual (Diva)

8 bytes added, 14:53, 21 March 2018
Carrier board mating SO-DIMM connector - J1 pinout
|||||||SO||||By default, this pin must not be connected. Optionally, it can route power voltages generated by Diva PSU. This option is meant to allow monitoring of such voltages by carrier board circuitry. It is not meant to power carrier board devices. As these options requires custom manufacturing BOMs, please contact the [mailto:sales@dave.eu Sales Department] for more information.
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| 159||NC/AM335X_GMII1_TXD2|Ordering codes:* DDxxxxx1xxx* DDxxxxx2xxx* DDxxxxx5xxx|CPU.[GMII1_TXD2/DCAN0_RX/RGMII1_TD2/UART4_TXD/MCASP1_AXR0/MMC2_DAT2/MCASP0_AHCLKX/GPIO0_17]||K15||VAUX2||IO||||Internally connected to the WDT (if present). This pin is not connected in some models, please contact the Sales Department for more information.|-|159|NCOrdering codes:* DDxxxxx0xxx* DDxxxxx3xxx||||||
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| 160||NC/Monitoring
| 162||NC/Monitoring
VAUX1
|||||||SO||||By default, this pin must not be connected. Optionally, it can route power voltages generated by Diva PSU. This option is meant to allow monitoring of such voltages by carrier board circuitry. It is not meant to power carrier board devices. As these options requires require custom manufacturing BOMs, please contact the [mailto:sales@dave.eu Sales Department] for more information.
|-
| 163||AM335X_GMII1_RXDV||CPU.[GMII1_RXDV/LCD_MEMORY_CLK/RGMII1_RCTL/UART5_TXD/MCASP1_ACLKX/MMC2_DAT0/MCASP0_ACLKR/GPIO3_4]||J17||VAUX2||IO||||
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