Changes

Jump to: navigation, search

Category:Maya

3 bytes added, 14:02, 14 December 2015
Feature Summary
| CPU|| Texas Instruments <br> ("DaVinci" DM8147 / DM8148, "Sitara" AM3871 / AM3872 / AM3874) <br> ARMv7 architecture <br> Cortex A8 @ 1 GHz ||
|-
| Storage||Cache: 32 Kbyte instruction, 32 Kbyte data, 512 Kbyte L2 <br> SDRAM: DDR2 @ 400 MHz - 64, 128, 256, 512 MB <br> NAND: All sizes, on request <br> SRAM 128 Kbyte||
|-
| Expansion bus|| 8-bit data, 4-bit address expansion bus ||
| Video capture|| 16-bit HD Video input port ||
|-
| USB|| 2x 2.0 OTG ports with PHY||
|-
| UARTs||3x UART ports (1x full, 2x four-wires)||
|-
| GPIO|| available||
|-
| Input interfaces|| ||
|-
| Networks||Fast Ethernet 10/100 Mbps with PHYAdditional RMII Interface <br> Dual CAN controller (version 2 part A, B)||
|-
| Storage|| ||

Navigation menu