Bureaucrats, dave_user, Administrators
4,650
edits
Changes
→J1 odd pins (1 to 139)
| J1.117||DGND||DGND||-||-||-||-||
|-
| J1.119||SPI0_DQ3/MODE0/NAND_IO0||CPU.PS_MIO5_500<br>NOR flash<br>NAND flash||CPU.A20||Bank 500||I/O||3.3V||This signal is pulled up or down by 20kOhm resistor to select proper bootstrap configuration.
|-
| J1.121||SPI0_DQ2/MODE2/NAND_IO2||CPU.PS_MIO4_500
