[[File:AxelUltra-reset-scheme.png | 800px]]
The available === PMIC_VSNVS ===Some signals that are related to reset signals circuitry are described pulled-up to PMIC_VSNVS. This voltage is generated by PMIC PF0100's VSNVS LDO/Switch and its actual value depends on:* voltage applied to PMICS's VIN pin** in detail case of AxelUltra this pin is connected to 2V8-4V5 power rail* voltage applied to PMICS's LICELL pin** in the following sectionscase of AxelUltra this pin is connected to J1.126 pin (PMIC_LICELL)* PMIC's VSNVSCTL register configuration.Hence '''it is recommended that system designer takes into account these factors in order to properly manage these signals at carrier board level'''. For more details please refer to section ''VSNVS LDO/Switch'' of ''MMPF0100 Advance Information'' document.
=== CPU_PORn ===
