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→Configure Linux kernel
<pre class="board-terminal">
[ 0.940000] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 0.940000] omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
[ 0.950000] console [ttyO0] enabled, bootconsole disabled
[ 0.950000] console [ttyO0] enabled, bootconsole disabled
[ 0.960000] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
[ 0.970000] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
[ 0.990000] omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5
</pre>
==== Additional UART as Kernel Console ====
Configuring something different that the default (UART0) as kernel boot console requires a bit of more work, see also [http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Using_different_UART_than_the_default_EVM_configuration_as_console TI wiki] for additional details.
First of all user should change, in U-Boot, the <code>console</code> [[Change Linux Command Line Parameter from U-boot|command line argument]], for example in <code>console=ttyO2,115200n8</code>
The file <code>/etc/inittab</code> into the target root file system should be updated too, to allow user login:
<diff>
--- inittab.orig 2011-12-09 13:43:15.000000000 +0100
+++ inittab 2012-05-08 14:50:40.822591441 +0200
@@ -28,7 +28,7 @@ l5:5:wait:/etc/init.d/rc 5
l6:6:wait:/etc/init.d/rc 6
# Normally not reached, but fallthrough in case of emergency.
z6:6:respawn:/sbin/sulogin
-S:2345:respawn:/sbin/getty 115200 ttyO0
+S:2345:respawn:/sbin/getty 115200 ttyO2
# /sbin/getty invocations for the runlevels.
#
# The "id" field MUST be the same as the last
</diff>
If the user would like to enable ''earlyprintk'' on this UART, the following patch should be applied too:
<diff>
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 2ff424a..6adeae5 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -183,7 +183,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
DEBUG_LL_TI81XX(1, ti8148evm);
/* NAON uses UART1 */
- DEBUG_LL_TI81XX(1, naon);
+ /* but we change this to support UART2 */
+ DEBUG_LL_TI81XX(3, naon);
} while (0);
}
</diff>
Please note that, in this code, UART0 is referred as UART1. For this reason UART2 is called UART3.
However, this is rarely needed.
