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→Design Overview
== NOR flash bank ==
NOR flash is a Serial Peripheral Interface (SPI) device. By default this device is connected to SPI channel 0 and acts as boot memory.
== NAND flash bank ==
On board main storage memory is a 8-bit wide NAND flash. By default it is connected to chip select.
== Memory map ==
This section will be completed in a future version of this manual.
== Power supply unit ==
Bora, as the other Ultra Line CPU modules, embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters. For detailed information, please refer to Section 5.1.
== CPU module connectors ==
All interface signals Bora provides are routed through three 140 pin 0.6mm pitch stacking connectors (named J1, J2 and J3). The dedicated carrier board must mount the mating connectors and connect the desired peripheral interfaces according to Bora pinout specifications.
= Mechanical specifications =
