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AURA SOM/AURA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

303 bytes removed, 12 February
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<section begin="History" />
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|2024/02/dd|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|First documentation release
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<section end="History" />
__FORCETOC__
<section begin="Body" />
[[File:TBD.png | center | 400px]]
The PSU is composed of two main blocks:
* power management integrated circuit(PMIC)
* additional generic power management circuitry that completes PMIC functionalities
* generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
* synchronizes the powering up of carrier board to prevent back power
* provides some spare regulated voltages that can be used to power carrier board devices
=== Power-up sequence===
The typical power-up sequence is the following:
* # VIN_SOM (+3.3VIN 3V) main power supply rail is powered* SNVS domain signals are pulled up (unless carrier board circuitry keeps this signal low for any reason)* # CPU_PORn (active-low) is driven low by PMIC* RTC_RESET_B are internally released after 10ms* ; PMIC initiates power-up sequence needed by iMX93x processor* # SOM_PGOOD goes up when all CPU , memories and I/O power rail is ready* # CPU_PORn is de-asserted released by PMIC after the last regulator to is powered on; this signal bring the processor out of reset
==== Note on SOM_PGOOD usage ====
SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. In these cases On AURA SOM this signal is driven by a simple 2push-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solutionpull output at NVCC_3V3 rail, with max 20 mA current.
VDD_SOM denotes the power rail used to power AURA SoM.  [[File:AURA-power-good.png]] <section end="Body" />
[[Category:AURA]]
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