Changes

Jump to: navigation, search
no edit summary
== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for ''TBD: SOC ''' i.MX6 processors is not a trivial task because several power rails are involved.
AXEL Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
=== Power-up sequence===
''TBDThe typical power-up sequence is the following: descrizione dei segnali che intervengono nella PS'# (optional) PMIC_LICELL is powered# 3.3VIN main power supply rail is powered # CPU_PORn (active-low) is driven low # PMIC activates PMIC_VSNVS power output # PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason) # PMIC transitions from OFF to ON state # PMIC initiates power-up sequence needed by MX6 processor # BOARD_PGOOD signal is raised; this active-high signal indicates that SoM's I/O is powered. This signal can be used to manage carrier board power up sequence in order to prevent back powering (from SoM to carrier board or vice versa). For additional information, please refer to the [[Power_(AxelLite)#Note_on_BOARD_PGOOD_usage | Note]] below. # CPU_PORn is released
==== Note on BOARD_PGOOD usage ====
 
''TBD: verificare le note sul BOARD_PGOOD''
BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
8,154
edits

Navigation menu