AXEL ULite SOM/AXEL ULite Hardware/Pinout Table
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Connectors and Pinout Table[edit | edit source]
Connectors description[edit | edit source]
In the following table are described all available connectors integrated on AXEL ULite SOM:
| Connector name | Connector Type | Notes | Carrier board counterpart |
|---|---|---|---|
| J1 | SODIMM DDR3 edge connector 204 pin | TE 2-2013289-1 (http://www.te.com/usa-en/product-2-2013289-1.html) |
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to AXEL ULite pinout specifications. See the images below for reference:
Pinout table naming conventions[edit | edit source]
This chapter contains the pinout description of the AXEL ULite SOM module grouped in two tables (odd and even pins) that report the pin mapping of the 204-pin SO-DIMM Axel ULite connector. Each row in the pinout tables contains the following information:
- Pin: reference to the connector pin
- Pin Name: pin (signal) name on the Axel ULite connectors
- Internal connections: connections to the Axel ULite components
- CPU.<x> : pin connected to CPU pad named <x>
- PMIC.<x> : pin connected to the Power Manager IC
- LAN.<x> : pin connected to the LAN PHY
- Ball/pin #: Component ball/pin number connected to signal
SODIMM ODD pins declaration[edit | edit source]
| Pin | Pin Name | Internal Connections | Ball/pin # | Notes |
| J2.1 | DGND | DGND | ||
| J2.3 | 3.3VIN | INPUT VOLTAGE | ||
| J2.5 | 3.3VIN | INPUT VOLTAGE | ||
| J2.7 | 3.3VIN | INPUT VOLTAGE | ||
| J2.9 | 3.3VIN | INPUT VOLTAGE | ||
| J2.11 | DGND | DGND | ||
| J2.13 | ETH_LED1 | LAN.LED0/PME_N1 | 23 | |
| J2.15 | VDDA_ADC_3P3 | Reference voltage for SOC's ADC. Nominal value is 3.0V. | ||
| J2.17 | DGND | DGND | ||
| J2.19 | ETH_TX_P | LAN.TXP | 6 | |
| J2.21 | ETH_TX_M | LAN.TXM | 5 | |
| J2.23 | ETH_RX_P | LAN.RXP | 4 | |
| J2.25 | ETH_RX_M | LAN.RXM | 3 | |
| J2.27 | SNVS_TAMPER0 | CPU.SNVS_TAMPER0 | R10 | |
| J2.29 | SNVS_TAMPER1 | CPU.SNVS_TAMPER1 | R9 | |
| J2.31 | SNVS_TAMPER2 | CPU.SNVS_TAMPER2 | P11 | Internally connected to ethernet PHY INT signal |
| J2.33 | SNVS_TAMPER3 | CPU.SNVS_TAMPER3 | P10 | |
| J2.35 | DGND | DGND | ||
| J2.37 | SNVS_TAMPER4 | CPU.SNVS_TAMPER4 | P9 | |
| J2.39 | CSI_HSYNC | CPU.CSI_HSYNC | F3 | |
| J2.41 | SNVS_TAMPER5 | CPU.SNVS_TAMPER5 | N8 | |
| J2.43 | SNVS_TAMPER6 | CPU.SNVS_TAMPER6 | N11 | |
| J2.45 | SNVS_TAMPER7 | CPU.SNVS_TAMPER7 | N10 | |
| J2.47 | SNVS_TAMPER8 | CPU.SNVS_TAMPER8 | N9 | |
| J2.49 | SNVS_TAMPER9 | CPU.SNVS_TAMPER9 | R6 | |
| J2.51 | CSI_PIXCLK | CPU.CSI_PIXCLK | E5 | |
| J2.53 | CSI_MCLK | CPU.CSI_MCLK | F5 | |
| J2.55 | PMIC_VSNVS | PMIC.VSNVS | 34 | |
| J2.57 | DGND | DGND | ||
| J2.59 | VPWR | PMIC.VPWR | 31 | |
| J2.61 | VLDO2 | PMIC.VLDO2 | 15 | |
| J2.63 | VLDO2 | PMIC.VLDO2 | 15 | |
| J2.65 | UART5_RX_DATA | CPU.UART5_RX_DATA | G13 | |
| J2.67 | UART5_TX_DATA | CPU.UART5_TX_DATA | F17 | |
| J2.69 | VLDO3 | PMIC.VLDO3 | 20 | |
| J2.71 | VLDO3 | PMIC.VLDO3 | 20 | |
| J2.73 | DGND | DGND | ||
| J2.75 | SD1_DATA0 | CPU.SD1_DATA0 | B3 | |
| J2.77 | SD1_DATA1 | CPU.SD1_DATA1 | B2 | |
| J2.79 | SD1_DATA2 | CPU.SD1_DATA2 | B1 | |
| J2.81 | SD1_DATA3 | CPU.SD1_DATA3 | A2 | |
| J2.83 | SD1_CMD | CPU.SD1_CMD | C2 | |
| J2.85 | SD1_CLK | CPU.SD1_CLK | C1 | |
| J2.87 | DGND | DGND | ||
| J2.89 | GPIO1_IO04 | CPU.GPIO_IO04 | M16 | |
| J2.91 | GPIO1_IO05 | CPU.GPIO_IO05 | M17 | |
| J2.93 | ENET2_RX_DATA1 | CPU.ENET2_RX_DATA1 | C16 | |
| J2.95 | ENET2_RX_DATA0 | CPU.ENET2_RX_DATA0 | C17 | |
| J2.97 | ENET2_TX_DATA0 | CPU.ENET2_TX_DATA0 | A15 | |
| J2.99 | ENET2_RX_EN | CPU.ENET2_RX_EN | B17 | |
| J2.101 | ENET2_TX_CLK | CPU.ENET2_TX_CLK | D17 | |
| J2.103 | ENET2_RX_ER | CPU.ENET2_RX_ER | D16 | |
| J2.105 | ENET2_TX_EN | CPU.ENET2_TX_EN | B15 | |
| J2.107 | ENET2_TX_DATA1 | CPU.ENET2_TX_DATA1 | A16 | |
| J2.109 | DGND | DGND | ||
| J2.111 | N.C. | Not connected. Leave this pin floating. | ||
| J2.113 | N.C. | Not connected. Leave this pin floating. | ||
| J2.115 | N.C. | Not connected. Leave this pin floating. | ||
| J2.117 | N.C. | Not connected. Leave this pin floating. | ||
| J2.119 | N.C. | Not connected. Leave this pin floating. | ||
| J2.121 | N.C. | Not connected. Leave this pin floating. | ||
| J2.123 | N.C. | Not connected. Leave this pin floating. | ||
| J2.125 | N.C. | Not connected. Leave this pin floating. | ||
| J2.127 | GPIO1_IO06 | CPU.GPIO_IO06 | K17 | Internally connected to ethernet PHY (MDIO) with 1K ohm pull-up |
| J2.129 | GPIO1_IO07 | CPU.GPIO_IO07 | L16 | Internally connected to ethernet PHY (MDC) with 1K ohm pull-up |
| J2.131 | DGND | DGND | ||
| J2.133 | CSI_DATA04 | CPU.CSI_DATA04 | D4 | Internally connected to NOR SPI flash |
| J2.135 | CSI_DATA05 | CPU.CSI_DATA05 | D3 | Internally connected to NOR SPI flash |
| J2.137 | CSI_DATA07 | CPU.CSI_DATA06 | D2 | Internally connected to NOR SPI flash |
| J2.139 | CSI_DATA06 | CPU.CSI_DATA07 | D1 | Internally connected to NOR SPI flash |
| J2.141 | NVCC_ENET | CPU.NVCC_ENET | F13 | |
| J2.143 | VDD_SNVS_IN | CPU.VDD_SNVS_IN | P12 | This is SoC's power rail of the SNVS domain. Please note that some SOC's GPIOs belong to this power domain. |
| J2.145 | N.C. | Not connected. Leave this pin floating. | ||
| J2.147 | N.C. | Not connected. Leave this pin floating. | ||
| J2.149 | UART4_RX_DATA | CPU.UART4_RX_DATA | G16 | Internally connected to PMIC (used as I2C1 SDA) |
| J2.151 | UART4_TX_DATA | CPU.UART4_TX_DATA | G17 | Internally connected to PMIC (used as I2C1 SCL) |
| J2.153 | DGND | DGND | ||
| J2.155 | N.C. | Not connected. Leave this pin floating. | ||
| J2.157 | N.C. | Not connected. Leave this pin floating. | ||
| J2.159 | N.C. | Not connected. Leave this pin floating. | ||
| J2.161 | N.C. | Not connected. Leave this pin floating. | ||
| J2.163 | N.C. | Not connected. Leave this pin floating. | ||
| J2.165 | N.C. | Not connected. Leave this pin floating. | ||
| J2.167 | N.C. | Not connected. Leave this pin floating. | ||
| J2.169 | N.C. | Not connected. Leave this pin floating. | ||
| J2.171 | N.C. | Not connected. Leave this pin floating. | ||
| J2.173 | N.C. | Not connected. Leave this pin floating. | ||
| J2.175 | DGND | DGND | ||
| J2.177 | UART1_nRTS | CPU.UART1_nRTS | J14 | |
| J2.179 | UART2_nRTS | CPU.UART2_nRTS | H14 | |
| J2.181 | UART2_nCTS | CPU.UART2_nCTS | J15 | |
| J2.183 | GPIO1_IO02 | CPU.GPIO_IO02 | L14 | |
| J2.185 | N.C. | Not connected. Leave this pin floating. | ||
| J2.187 | UART1_TX_DATA | CPU.UART1_TX_DATA | K14 | |
| J2.189 | UART1_RX_DATA | CPU.UART1_RX_DATA | K16 | |
| J2.191 | UART3_TX_DATA | CPU.UART3_TX_DATA | H17 | |
| J2.193 | UART3_RX_DATA | CPU.UART3_RX_DATA | H16 | |
| J2.195 | UART3_nCTS | CPU.UART3_nCTS | H15 | |
| J2.197 | UART3_nRTS | CPU.UART3_nRTS | G14 | |
| J2.199 | GPIO1_IO03 | CPU.GPIO_IO03 | L17 | |
| J2.201 | UART1_CTS_B | CPU.UART1_nCTS | K15 | |
| J2.203 | DGND | DGND |
SODIMM EVEN pins declaration[edit | edit source]
| Pin | Pin Name | Internal Connections | Ball/pin # | |
| J2.2 | DGND | DGND | ||
| J2.4 | 3.3VIN | INPUT VOLTAGE | ||
| J2.6 | 3.3VIN | INPUT VOLTAGE | ||
| J2.8 | 3.3VIN | INPUT VOLTAGE | ||
| J2.10 | 3.3VIN | INPUT VOLTAGE | ||
| J2.12 | DGND | DGND | ||
| J2.14 | PMIC_LICELL | PMIC.LICELL | 36 | |
| J2.16 | CPU_ONOFF | CPU.CPU_ONOFF | R8 | |
| J2.18 | SOM_PGOOD | Internally connected to 150K pull-down | ||
| J2.20 | BOOT_MODE0 | CPU.BOOT_MODE0 | T10 | Reset scheme (AXEL ULite) |
| J2.22 | CPU_PORn | CPU.PORn | P8 | |
| J2.24 | PMIC_PWRON | PMIC.PWRON | 48 | |
| J2.26 | BOOT_MODE1 | CPU.BOOT_MODE1 | U10 | Reset scheme (AXEL ULite) |
| J2.28 | GPIO1_IO08 | CPU.GPIO_IO08 | N17 | Reset scheme (AXEL ULite)#Handling_CPU-initiated_software_reset |
| J2.30 | DGND | DGND | ||
| J2.32 | CPU_PMIC_STBY_REQ | CPU.CCM_PMIC_STBY_REQ | U9 | |
| J2.34 | JTAG_TMS | CPU.JTAG_TMS | P14 | |
| J2.36 | PMIC_LDOG | PMIC.LDOG | 30 | |
| J2.38 | GPIO1_IO00 | CPU.GPIO_IO00 | K13 | |
| J2.40 | PMIC_SNVS_OUT | PMIC.SNVS_OUT | 34 | This is normally left open. |
| J2.42 | UART2_TX_DATA | CPU.UART2_TX_DATA | J17 | |
| J2.44 | UART2_RX_DATA | CPU.UART2_RX_DATA | J16 | |
| J2.46 | CSI_VSYNC | CPU.CSI_VSYNC | F2 | |
| J2.48 | GPIO1_IO01 | CPU.GPIO_IO01 | L15 | |
| J2.50 | PMIC_5V | PMIC.BST | 37 | PMIC 5V output (boost regulator) |
| J2.52 | PMIC_5V | PMIC.BST | 37 | PMIC 5V output (boost regulator) |
| J2.54 | N.C. | Not connected. Leave this pin floating. | ||
| J2.56 | DGND | DGND | ||
| J2.58 | GPIO1_IO09 | CPU.GPIO_IO09 | M15 | |
| J2.60 | N.C. | Not connected. Leave this pin floating. | ||
| J2.62 | JTAG_VREF | CPU.JTAG_VREF | Internally connected to 240 ohm pull-up to 3V3 | |
| J2.64 | JTAG_MOD | CPU.JTAG_MOD | P15 | Internally connected to 10K pull-down |
| J2.66 | JTAG_TDI | CPU.JTAG_TDI | N16 | |
| J2.68 | JTAG_nTRST | CPU.JTAG_nTRST | N14 | |
| J2.70 | JTAG_TDO | CPU.JTAG_TDO | N15 | |
| J2.72 | JTAG_TCK | CPU.JTAG_TCK | M14 | |
| J2.74 | CSI_DATA00 | CPU.CSI_DATA00 | E4 | |
| J2.76 | CSI_DATA02 | CPU.CSI_DATA02 | E2 | |
| J2.78 | CSI_DATA03 | CPU.CSI_DATA03 | E1 | |
| J2.80 | CSI_DATA01 | CPU.CSI_DATA01 | E3 | |
| J2.82 | DGND | DGND | ||
| J2.84 | NAND_READY# | CPU.NAND_READY | A3 | Internally connected to NAND flash |
| J2.86 | NAND_CLE | CPU.NAND_CLE | A4 | Internally connected to NAND flash |
| J2.88 | NAND_ALE | CPU.NAND_ALE | B4 | Internally connected to NAND flash |
| J2.90 | NAND_RE# | CPU.NAND_RE | D8 | Internally connected to NAND flash |
| J2.92 | NAND_WE# | CPU.NAND_WE | C8 | Internally connected to NAND flash |
| J2.94 | NAND_WP# | CPU.NAND_WP | D5 | Internally connected to NAND flash |
| J2.96 | NAND_CS0# | CPU.NAND_CE0 | C5 | Internally connected to NAND flash |
| J2.98 | NAND_CS1# | CPU.NAND_CE1 | B5 | Internally connected to NAND flash |
| J2.100 | DGND | DGND | ||
| J2.102 | NAND_DQS | CPU.NAND_DQS | E6 | Internally connected to NAND flash |
| J2.104 | NAND_DATA00 | CPU.NAND_DATA00 | D7 | Internally connected to NAND flash |
| J2.106 | NAND_DATA01 | CPU.NAND_DATA01 | B7 | Internally connected to NAND flash |
| J2.108 | NAND_DATA02 | CPU.NAND_DATA02 | A7 | Internally connected to NAND flash |
| J2.110 | NAND_DATA03 | CPU.NAND_DATA03 | D6 | Internally connected to NAND flash |
| J2.112 | NAND_DATA04 | CPU.NAND_DATA04 | C6 | Internally connected to NAND flash |
| J2.114 | NAND_DATA05 | CPU.NAND_DATA05 | B6 | Internally connected to NAND flash |
| J2.116 | NAND_DATA06 | CPU.NAND_DATA06 | A6 | Internally connected to NAND flash |
| J2.118 | NAND_DATA07 | CPU.NAND_DATA07 | A5 | Internally connected to NAND flash |
| J2.120 | MEM_WPn | MEM_WPn | ||
| J2.122 | DGND | DGND | ||
| J2.124 | LCD_DATA_EN | CPU.LCD_ENABLE | B8 | |
| J2.126 | LCD_RESET | CPU.LCD_RESET | E9 | |
| J2.128 | LCD_VSYNC | CPU.LCD_VSYNC | C9 | |
| J2.130 | LCD_HSYNC | CPU.LCD_HSYNC | D9 | |
| J2.132 | LCD_CLK | CPU.LCD_CLK | A8 | |
| J2.134 | LCD_DATA00 | CPU.LCD_DATA00 | B9 | |
| J2.136 | LCD_DATA01 | CPU.LCD_DATA01 | A9 | |
| J2.138 | LCD_DATA02 | CPU.LCD_DATA02 | E10 | |
| J2.140 | LCD_DATA03 | CPU.LCD_DATA03 | D10 | |
| J2.142 | LCD_DATA04 | CPU.LCD_DATA04 | C10 | |
| J2.144 | LCD_DATA05 | CPU.LCD_DATA05 | B10 | |
| J2.146 | DGND | |||
| J2.148 | LCD_DATA06 | CPU.LCD_DATA06 | A10 | |
| J2.150 | LCD_DATA07 | CPU.LCD_DATA07 | D11 | |
| J2.152 | LCD_DATA08 | CPU.LCD_DATA08 | B11 | |
| J2.154 | LCD_DATA09 | CPU.LCD_DATA09 | A11 | |
| J2.156 | LCD_DATA10 | CPU.LCD_DATA10 | E12 | |
| J2.158 | LCD_DATA11 | CPU.LCD_DATA11 | D12 | |
| J2.160 | LCD_DATA12 | CPU.LCD_DATA12 | C12 | |
| J2.162 | LCD_DATA13 | CPU.LCD_DATA13 | B12 | |
| J2.164 | DGND | |||
| J2.166 | LCD_DATA14 | CPU.LCD_DATA14 | A12 | |
| J2.168 | LCD_DATA15 | CPU.LCD_DATA15 | D13 | |
| J2.170 | LCD_DATA16 | CPU.LCD_DATA16 | C13 | |
| J2.172 | LCD_DATA17 | CPU.LCD_DATA17 | B13 | |
| J2.174 | LCD_DATA18 | CPU.LCD_DATA18 | A13 | |
| J2.176 | LCD_DATA19 | CPU.LCD_DATA19 | D14 | |
| J2.178 | LCD_DATA20 | CPU.LCD_DATA20 | C14 | |
| J2.180 | LCD_DATA21 | CPU.LCD_DATA21 | B14 | |
| J2.182 | LCD_DATA22 | CPU.LCD_DATA22 | A14 | |
| J2.184 | LCD_DATA23 | CPU.LCD_DATA23 | B16 | |
| J2.186 | USB_OTG2_VBUS | CPU.USB_OTG2_VBUS | U12 | |
| J2.188 | USB_OTG1_VBUS | CPU.USB_OTG1_VBUS | T12 | |
| J2.190 | DGND | DGND | ||
| J2.192 | N.C. | Not connected. Leave this pin floating. | ||
| J2.194 | USB_OTG1_CHD# | CPU.USB_OTG1_CHD | U16 | |
| J2.196 | USB_OTG2_DN | CPU.USB_OTG2_DN | T13 | |
| J2.198 | USB_OTG2_DP | CPU.USB_OTG2_DP | U13 | |
| J2.200 | USB_OTG1_DP | CPU.USB_OTG1_DP | T15 | |
| J2.202 | USB_OTG1_DN | CPU.USB_OTG1_DN | U15 | |
| J2.204 | DGND | DGND |
