ORCA SOM/ORCA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

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Issue Date Notes
2021/02/03 First release

Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]

Implementing correct power-up sequence for iMX8MPlus processors is not a trivial task because several power rails are involved.

ORCA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:


The PSU is composed of two main blocks:

  • power management integrated circuit
  • additional generic power management circuitry that completes PMIC functionalities

The PSU:

  • generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
  • synchronizes the powering up of carrier board in order to prevent back power

Power-up sequence[edit | edit source]

The typical power-up sequence is the following:

  1. 3.3VIN main power supply rail is powered
  2. SNVS domain signals are pulled-up (unless carrier board circuitry keeps this signal low for any reason)
  3. CPU_PORn (active-low) is driven low by PMIC
  4. RTC_RESET_B are internally released after 200ms
  5. PMIC initiates power-up sequence needed by iMX8M processor
  6. BOARD_PGOOD goes up when NVCC_3V3 (CPU I/O power rail) is ready
  7. CPU_PORn is deasserted after the last regulator to bring the processor out of reset

Note on BOARD_PGOOD usage[edit | edit source]

BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.

Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly because it has a 20mA output current absolute maximum rating.

In these cases a simple 2-input AND port with a level shifter for the PMIC_RST_B input can be used to address this issue. The following picture depicts a principle schematic showing this solution.

SOM_VDD denotes the power rail used to power ORCA SoM (i.e. 3V3VIN).


Additionally, we suggest using ICs with Schmitt trigger input ports.