ETRA SBC/Interfaces and Connectors/LCD

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History
Issue Date Notes

2021/04/01

First release
2023/09/06 Add SBC connector images


LCD interface[edit | edit source]

Description[edit | edit source]

The LCD interface available on the Evaluation Kit at the connector J13.

J13 si a 40-pin, 0.5mm pitch, ZIF connector that provides the following signals:

  • 18-bit RGB interface
  • DE and CLK control signals
  • 3.3V power for logic
  • 5V power for backlight
  • PWM for backlight
LCD connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1,2,10,11,12,16,20,24,28,32,36,37,39,40 - GND Ground
3 J18.46 LCD_PWM PWM for backlight
4,5,6 - LCD_5V 5V for LED this rail is enabled by the CPU via GPIO
7,8 - LCD_VDD 3.3V for logic this rail is enabled by the CPU via GPIO
9 J18.124 LCD_DE LCD_DATA_ENABLE
13 J18.144 LCD_B7 LCD_B7 (MSB)
14 J18.142 LCD_B6 LCD_B6
15 J18.140 LCD_B5 LCD_B5
17 J18.138 LCD_B4 LCD_B4
18 J18.136 LCD_B3 LCD_B3
19 J18.134 LCD_B2 LCD_B2 (LSB)
21 J18.158 LCD_G7 LCD_G7 (MSB) the use of this pin prevents the use of eMMC with 8bit bus
22 J18.156 LCD_G6 LCD_G6
23 J18.154 LCD_G5 LCD_G5
25 J18.152 LCD_G4 LCD_G4
26 J18.150 LCD_G3 LCD_G3
27 J18.148 LCD_G2 LCD_G2 (LSB)
29 J18.172 LCD_R7 LCD_R7 (MSB)
30 J18.170 LCD_R6 LCD_R6
31 J18.168 LCD_R5 LCD_R5
33 J18.166 LCD_R4 LCD_R4
34 J18.162 LCD_R3 LCD_R3
35 J18.160 LCD_R2 LCD_R2 (LSB)
38 J18.132 LCD_CLK LCD_CLOCK

Device mapping[edit | edit source]

LCD is mapped to /dev/fb0 device in linux.

Device usage[edit | edit source]

The connector is pinout compatible with the Ampire AM-800480BTMQW-TBMH-A display.

WARNING: the use of the LCD peripheral prevents the use of the eMMC on board of the ETRA SOM as 8bit bus, only 4bit bus is available.

The periperal can be accessed by various linux packages as fbi (for simple image display), or more complex libraries as QT or gstreamer.

Alternate connector[edit | edit source]

The ETRA SBC provides a secondary LCD connector (not mounted by default) for the use of 24bit LCD interface.

Description[edit | edit source]

The 24-bit LCD interface can be available for the Evaluation Kit at the connector J14. For the use of this interface please send an e-mail to helpdesk@dave.eu

LCD connector - 24 bit RGB

J14 si a 40-pin, 0.5mm pitch, ZIF connector that provides the following signals:

  • 24-bit RGB interface
  • DE, CLK, HSYNC and VSYNC control signals
  • 3.3V power for logic
  • 5V power for backlight
  • PWM for backlight
  • two GPIO signals for panel configuration

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
9,18,27,36,40 - GND Ground
1,2 - LCD_5V 5V for LED this rail is enabled by the CPU via GPIO
3 J18.46 LCD_PWM PWM for backlight
4 J18.58 LCD_5V_EN LCD_5V power enable can be used as GPIO if the 5V power switch is bypassed
5.6 - LCD_VDD 3.3V for logic this rail is enabled by the CPU via GPIO
7 - LCD_DISP pull-down (default) can be statically configured with pull-up or pull-down
8 J18.124 LCD_DE LCD_DATA_ENABLE
10 J18.144 LCD_B7 LCD_B7 (MSB)
11 J18.142 LCD_B6 LCD_B6
12 J18.140 LCD_B5 LCD_B5
13 J18.138 LCD_B4 LCD_B4
14 J18.136 LCD_B3 LCD_B3
15 J18.134 LCD_B2 LCD_B2
16 J18.176 LCD_B1 LCD_B1
17 J18.174 LCD_B0 LCD_B0 (LSB) the use of this pin prevents the use of eMMC with 8bit bus
19 J18.158 LCD_G7 LCD_G7 (MSB) the use of this pin prevents the use of eMMC with 8bit bus
20 J18.156 LCD_G6 LCD_G6
21 J18.154 LCD_G5 LCD_G5
22 J18.152 LCD_G4 LCD_G4
23 J18.150 LCD_G3 LCD_G3
24 J18.148 LCD_G2 LCD_G2
25 J18.180 LCD_G1 LCD_G1 the use of this pin prevents the use of uSD with 4bit bus
26 J18.178 LCD_G0 LCD_G0 (LSB)
28 J18.172 LCD_R7 LCD_R7 (MSB)
29 J18.170 LCD_R6 LCD_R6
30 J18.168 LCD_R5 LCD_R5
31 J18.166 LCD_R4 LCD_R4
32 J18.162 LCD_R3 LCD_R3
33 J18.160 LCD_R2 LCD_R2
34 J18.184 LCD_R1 LCD_R1 the use of this pin prevents the use of eMMC with 8bit bus
35 J18.182 LCD_R0 LCD_R0 (LSB)
37 J18.130 LCD_HSYNC LCD_HORIZONTAL_SYNC the use of this pin prevents the use of eMMC with 8bit bus
38 J18.132 LCD_CLK LCD_CLOCK
39 J18.128 LCD_VSYNC LCD_VERTICAL_SYNC

Device usage[edit | edit source]

WARNING: the use of the 24bit LCD peripheral prevents the use of the eMMC on board of the ETRA SOM as 8bit bus, only 4bit bus is available. It also prevents the use of uSD device as 4bit bus, only 1bit bus is available.