Design Overview (AxelLite)

Info Box Applies to Axel Lite

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	THIS PAGE IS OBSOLETE, DON'T USE IT AS REFERENCE
The new documentation is available here: AXEL_Lite_SOM/AXEL_Lite_Hardware/General_Information/Processor_and_memory_subsystem

Design Overview

The heart of Axel Lite module is composed by the following components:

• Freescale i.MX6 Solo / Dual / Quad core SoC application processor
• Power supply unit
• DDR memory banks
• NOR and NAND flash banks
• 1x 204 pin SODIMM connector with interfaces signals

This chapter shortly describes the main Axel Lite components.

Processor Info

The i.MX6 Solo/Dual/Quad processors feature Freescale’s advanced implementation of the ARM® Cortex®-A9 MPCore, which operates at speeds up to 1.2 GHz. They include 2D and 3D graphics processors, 1080p video processing, and integrated power management. As a result, the i.MX6 devices are able to serve a wide range of applications including:

• Automotive driver assistance, driver information, and infotainment
• Multimedia-centric smart mobile devices
• Instrument clusters, and portable medical devices.
• E-Readers, smartbooks, tablets
• Intelligent industrial motor control, industrial networking, and machine vision
• IP and Smart camera
• Human-machine interfaces
• Medical diagnostics and imaging
• Digital signage
• Video and night vision equipment
• Multimedia-focused products
• Entertainment and gaming appliances

The i.MX6 application processor is composed of the following major functional blocks:

• ARM Cortex-A9 MPCore 1x/2x/4x CPU Processor, featuring:
  • 1 Megabyte unified L2 cache shared by all CPU cores
  • NEON MPE coprocessor
  • General Interrupt Controller (GIC) with 128 interrupt support
  • Snoop Control Unit (SCU)
  • External memories interconnect
• Hardware accelerators, including:
  • VPU -Video Processing Unit
  • Two IPUv3H -Image Processing Unit (version 3H)
  • 2D/3D/Vector graphics accelerators
• Connectivity peripherals, including
  • PCIe
  • SATA
  • SD/SDIO/MMC
  • Serial buses: USB, UART, I²C, SPI, ...

Axel Lite can mount three versions of the i.MX6 processor. The following table shows a comparison between the processor models, highlighting the differences:

Table: i.MX6 models comparison

Processor	# Cores	Clock	L2 Cache	DDR3	Graphics Acceleration	IPU	VPU	SATA-II
i.MX6 Solo	1	800 MHz 1 GHz	512 KB	32 bit @ 400 MHz	3D: Vivante GC880 2D: Vivante GC320 Vector: N.A.	1x	1x	N.A.
i.MX6 Dual	2	850 MHz 1 GHz 1.2 GHz	1 MB	64 bit @ 533 MHz	3D: Vivante GC2000 2D: Vivante GC320 Vector: Vivante GC335	2x	2x	Yes
i.MX6 Quad	4	850 MHz 1 GHz 1.2 GHz	1 MB	64 bit @ 533 MHz	3D: Vivante GC2000 2D: Vivante GC320 Vector: Vivante GC335	2x	2x	Yes

RAM memory bank

DDR3 SDRAM memory bank is composed by 4x 16-bit width chips resulting in a 64-bit combined width bank. The following table reports the SDRAM specifications:

CPU connection	Multi-mode DDR controller (MMDC)
Size min	512 MB
Size max	4 GB
Width	64 bit
Speed	533 MHz

NOR flash bank

NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI channel 5 and by default it acts as boot memory. The following table reports the NOR flash specifications:

CPU connection	eCSPI channel 5
Size min	8 MB
Size max	64 MB
Chip select	ECSPI5_SS0
Bootable	Yes

NAND flash bank

On board main storage memory is a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. Optionally, it can act as boot peripheral. The following table reports the NAND flash specifications:

CPU connection	Raw NAND flash controller
Page size	512 byte, 2 kbyte or 4 kbyte
Size min	128 MB
Size max	2 GB
Width	8 bit
Chip select	NANDF_CS0
Bootable	Yes

Memory map

For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX Applications Processor Reference Manual.

Power supply unit

Axel Lite embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters.

CPU module connector

All interface signals Axel Lite provides are routed through SODIMM DDR3 204 pin (named J2). The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to Axel Lite pinout specifications.