DWS ADD-ON/DWS Hardware/Pinout Table

History
Issue Date	Notes
2022/01/17	First version
2022/01/28	Pinout note revision

Connectors and Pinout Table

Connectors description

In the following table are described all available connectors integrated on DWS_ADD-ON:

Connector name	Connector Type	Notes	Carrier board counterpart
J1	Dual in line low profile high density connector 30pins	Molex 501920-3001	Molex 52991-030, others are available with different stand-off
Antenna's connector	UFL type	N.A.	UFL cable side (many versions available in the market already inserted on cables/antenna patches)

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to DWS pinout specifications. See the images below for reference:

DWS TOP view with antenna's connector

DWS BOTTOM view with main connector

Pinout table naming conventions

This chapter contains the pinout description of the DWS module, grouped in two tables (odd and even pins) that report the pin mapping of the TBD: connector type DWS connector.

Each row in the pinout tables contains the following information:

Pin	Reference to the connector pin
Pin Name	Pin (signal) name on the DWS connectors
Internal connections	Connections to the DWS components BT_<x> : pin connected UART bus (Bluetooth) SDIO_<x> : pin connected to the SDIO bus (WiFi)
Ball/pin #	Component ball/pin number connected to signal
Voltage	I/O voltage levels
Type	Pin type: I = Input O = Output D = Differential Z = High impedance S = Power supply voltage G = Ground A = Analog signal
Notes	Remarks on special pin characteristics
Pin MUX alternative functions	Muxes: Pin ALT-0 ... Pin ALT-N The number of functions depends on platform

Pinout Table ODD pins declaration

Pin	Pin Name	Internal Connections	Ball/pin #	Voltage domain	Type	Notes	Pin MUX alternative functions
J1.1	BT_EN	Bluetooth Enable		3.3V	I
J1.3	BT_CTS	Bluetooth HCI UART CTS		3.3V	I
J1.5	BT_RX	Bluetooth HCI UART RX		3.3V	I
J1.7	BT_RTS	Bluetooth HCI UART RTS		3.3V	O
J1.9	BT_TX	Bluetooth HCI UART TX		3.3V	O
J1.11	DGND	Ground		-	G
J1.13	SDIO_DAT3	SDIO Data Bit 3		3.3V	I/O
J1.15	SDIO_DAT2	SDIO Data Bit 2		3.3V	I/O
J1.17	SDIO_DAT1	SDIO Data Bit 1		3.3V	I/O
J1.19	SDIO_DAT0	SDIO Data Bit 0		3.3V	I/O
J1.21	DGND	Ground		-	G
J1.23	SDIO_CMD	SDIO Command Line		3.3V	I/O
J1.25	DGND	Ground		-	G
J1.27	3.3V	+3.3V Input Voltage		3.3V	S
J1.29	5V	+5V Input Voltage		5V	S	Not used on default mounting option

Pinout Table EVEN pins declaration

Pin	Pin Name	Internal Connections	Ball/pin #	Voltage domain	Type	Note	Pin MUX alternative functions
J1.2	WIFI_EN	WLAN Enable		3.3V	I
J1.4	WIFI_IRQ	WOW (Wake On Wireless)		3.3V	O	Open drain output with internal pull-up Do Not Connect on the carrier board (this feature is not supported yet)
J1.6	BT_F2	Reserved for future use		-		Do Not Connect on the carrier board
J1.8	WIFI_CLK_REQ(A)	Reserved for future use		-		Do Not Connect on the carrier board
J1.10	NC	Reserved for future use		-		Do Not Connect on the carrier board
J1.12	NC	Reserved for future use		-		Do Not Connect on the carrier board
J1.14	AUDIO_I2S_SDO	Reserved for future use		-		Do Not Connect on the carrier board
J1.16	AUDIO_I2S_SCK	Reserved for future use		-		Do Not Connect on the carrier board
J1.18	AUDIO_I2S_WS	Reserved for future use		-		Do Not Connect on the carrier board
J1.20	AUDIO_I2S_SDI	Reserved for future use		-		Do Not Connect on the carrier board
J1.22	DGND	Ground		-	G
J1.24	SDIO_CLK	SDIO Clock		3.3V	I
J1.26	DGND	Ground		-	G
J1.28	3.3V	+3.3V Input Voltage		3.3V	S
J1.30	5V	+5V Input Voltage		5V	S	Not connected/used on default mounting option

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