DADA SOM/DADA Hardware/Power and Reset/System boot

History
Issue Date	Notes
2025/08/04	First documentation release

System boot

This page illustrates the characteristics of the DADA's boot subsystem. Reading of the chapter Initialization of the "AM62x Processors Technical Reference Manual" [1] is highly recommended, though. AM62x SoC features several options in terms of booting. Such options are detailed in that document.

The boot process begins at Power On Reset (POR) where the hardware reset logic forces the ARM core to begin execution starting from the on-chip boot ROM. The boot ROM:

• determines whether the boot is secure or non-secure
• performs some initialization of the system and clean-ups
• reads the mode pins to determine the primary boot device
• once it is satisfied, it executes the boot code

Boot options

The default primary boot device is defined at the factory and identified by the 'Boot Mode' field of the ordering code as follows:

• 0: on board QSPI NOR or MMC1 (uSD) option (SoM code: DSAAxxx0xxxxR)
• 1: on board eMMC or MMC1 (uSD) option (SoM code: DSAAxxx1xxxxR)

For both options an alternative primary boot from SD/MMC card is provided, selectable by driving low the BOOT_MODE_SEL signal: BOOT_MODE_SEL is latched when processor reset is released.

Bootable SD/MMC card connects via the MMC1 bus, mapped on SDIO_A bus referring to Unica Industrial Dave standard pinout.

If primary boot fails, the bootrom goes to the 'USB boot mode' to read the boot image from external USB host, connected to the USB0 bus.

Ordering code 'Boot Mode' fileld	BOOT_MODE_SEL	Primary boot mode/device	Backup boot mode/device
0	0	SD/MMC card on MMC1 bus	USB host on USB0 bus
	1	QSPI NOR on OSPI0 bus
1	0	SD/MMC card on MMC1 bus	USB host on USB0 bus
	1	eMMC on MMC0 bus

Other options are available on-demand, however, allowing the implementation of different configurations. DAVE Embedded Systems' team is available for additional information on this matter, please contact sales@dave.eu.

Note on boot signals

Bootstrap stage has to be intended as the time elapsing between the release of hardware reset (POR_OUT) and the execution of the first instruction of user code (typically this is the reset vector of U-Boot boot loader). The following figure shows the signals involved in the boot phase.

See the pinout section for more details on the signals.

The following boot signals are latched by the 'boot mode circuit' when processor reset POR_OUT signal is released.

BOOT_MODE_SEL

Inside the SOM, BOOT_MODE_SEL signal is pulled-up with 10 kohm.

SD card detect

Boot ROM detects SD/MMC card on MMC1 bus: if a card is inserted, ROM will try to boot from it.

MMC1_SDCD signal (named SDIO_A_CD on Unica Industrial Dave standard pinout) is used as card detect signal during bootstrap stage: this signal need to be kept low for boot from SD/MMC card.

Inside the SOM, MMC1_SDCD signal is pulled-up with 10 kohm.

Bootstrap bits

Upon exiting the reset the 'boot mode circuit' samples the value of the bootstrap bits, belonging to the GPMC0_AD[0:15] lines:

• to set these bits there are PULL-UP or PULL-DOWN resistors on SoM
• all signals are routed to SoM J1 connector interface, so they can be externally modified by forcing a voltage values

When developing the carrier board, pay attention to the connection of these signals (they have a PD or PU resistance, avoid applying voltages during bootstrap stage).

References

[1] TI, AM62x Processors Silicon Revision 1.0, Technical Reference Manual