BORA SOM/BORA Hardware/Peripherals/Quad-SPI
< BORA SOM | BORA Hardware
Quad-SPI is used to access multi-bit serial flash memory devices for high throughput and low pin count applications. The controller operates in one of three modes: I/O mode, linear addressing mode, and legacy SPI mode. The following table describes the interface signals:
Pin name | Conn. pin | Function | Notes |
---|---|---|---|
SPI0_CS0 | J1.120 | Chip select 0 | MIO bank 0, pin 1 |
SPI0_CS1 | J1.122 | Chip select 1 | MIO bank 0, pin 0 |
SPI0_DQ0 | J1.125 | 1-bit: Master Output 2-bit: I/O0 4-bit: I/O0 |
MIO bank 0, pin 2 |
SPI0_DQ1 | J1.123 | 1-bit: Master Input 2-bit: I/O1 4-bit: I/O1 |
MIO bank 0, pin 3 |
SPI0_DQ2 | J1.121 | 1-bit: Write protect 2-bit: Write protect 4-bit: I/O0 |
MIO bank 0, pin 4 |
SPI0_DQ3 | J1.119 | 1-bit: Hold 2-bit: Hold 4-bit: I/O3 |
MIO bank 0, pin 5 |
SPI0_SCLK | J1.129 | Serial clock | MIO bank 0, pin 6 |