BORA SOM/BORA Hardware/Peripherals/Processing System (PS)
< BORA SOM | BORA Hardware
| History | |||
|---|---|---|---|
| Version | Issue Date | Notes | |
| Oct 2021 | New documentation layout | ||
| 1.0.1 | Mar 2022 | Updated MIO pins | |
The 54 pins of the MIO module are assigned as reported in the following table:
| MIO Pins | Function |
|---|---|
| MIO[0:14] | Quad-SPI and NAND flash |
| MIO[15] | EX_WDT_REARM (watchdog WDI) Optionally, it can act as SWDT reset out |
| MIO[16:27] | Gigabit Ethernet |
| MIO[28:39] | USB On-The-Go |
| MIO[40:45] | SD/SDIO/MMC |
| MIO[46:47] | I²C0 |
| MIO[48:49] | UART1 |
| MIO[50] | USB PHY reset |
| MIO[51] | ETH0 PHY reset |
| MIO[52] | Ethernet Management Data Clock input |
| MIO[53] | Ethernet Management Data Input/Output |
