BORA Lite SOM/BORA Lite Evaluation Kit/Interfaces and Connectors/RTC
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Contents
RTC[edit | edit source]
FPGA, WatchDog, RTC, RST - JP22[edit | edit source]
JP22 is a 16-pin 8x2x2.54 pitch vertical header. The following table reports the pinout of the connector:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | FPGA_INIT_B | - | - |
| 2 | RTC_32KHZ | - | - |
| 3 | FPGA_PROGRAM_B | - | - |
| 4 | RTC_RST | - | - |
| 5 | FPGA_DONE | - | - |
| 6 | RTC_INT/SQW | - | - |
| 7, 8 | DGND | Ground | - |
| 9 | WD_SET0 | - | - |
| 10 | SYS_RSTn | - | - |
| 11 | WD_SET1 | - | - |
| 12 | PORSTn | - | - |
| 13 | WD_SET2 | - | - |
| 14 | MRSTn | - | - |
| 15 | PS_MIO15_500 | - | - |
| 16 | CB_PWR_GOOD | - | - |
