Power (Naon)

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Naon am387x-dm814x.png Applies to Naon
Dido-main.png Applies to Dido

Power specification

NAON requires two power rails:

  1. 3.3V (mandatory)
    • this rail provides main power and must be connected to regulated power supply (3.3V ± 5%)
  2. VBAT (optional)
    • this rail provides power for RTC domain of PMIC chip
    • voltage range is 2.7 - 5.5V
    • current consumption (main is not applied): 7uA typ, 10 uA max.

3.3V power consumption

In order to address heat management issues properly, please take into account that the majority of power is consumed by the DM814x/AM387x processor. For you convenience here are thermal data of processor's package. Please refer to Texas Instruments Application Report SPRA953B entitled "Semiconductor and IC Package Thermal Metrics" for more details.

CYE-04 Top Hat thermal data.png

A power estimation tool in the form of spreadsheet is also provided by Texas Instruments: http://processors.wiki.ti.com/index.php/DM814x_AM387x_Power_Estimation.

Power consumption measurements have been performed on some real-world use cases. Please refer to this page for more details.


Implementing correct power-up sequence for DM8148 processor is not a trivial task beacuse several power rails are involved. Naon hides this complexity because it embeds most of the circuitry required. However some simple rules have to be followed to power it up properly.

In typical applications DM8148 processor interfaces directly to 3.3V-powered devices that are hosted on carrier board. In order to be compliant with DM8148 power-up requirements, these devices should be turned on at a specific time during power-up sequence. To achieve this, Naon provides EN_BCK2_LS signal. When Naon is powered, this signal is low: this means that carrier board 3.3V-powered devices have to be powered off. During power-up sequence this signal shall be raised by Naon circuitry, indicating carrier board 3.3V-powered devices have to be turned on. After this rising edge, EN_BCK2_LS shall be kept high.

The following picture shows the power sequence of Naon SOM in this typical scenario. It is assumed that:

  • carrier board implements power supply unit providing 3.3V power supply voltgage
  • Naon module in interfaced to generic circuitry (I/O controllers, additional flash memories etc.) operating at 3.3V.

In order to respect required CPU power-up sequence, these steps must be applied:

  1. First monotonic-ramped 3.3V power rail has to be applied to Naon pins named "3.3V"
  2. power management circuitry of Naon will rise EN_BCK2_LS
  3. this signal must be used to enable power of generic circuitry operating at 3.3V (this can be implemented, for example, with a power switch or a DC/DC regulator).