Bureaucrats, dave_user, Administrators
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*tDELAY = first edge
*tWD = 10s (the exhaustive list of configurations options is descripted in table 1 of reference <ref name="MAX6373"></ref>).
In other words, WDT is started when the first transition on WDI input is detected. Once started, its timeout period is 10s. The first transition of WDI input should be under software control. However, despite of the presence of 22kOhm pull-down on EX_WDT_REARM signal, during power-on sequence a spurious 0-to-1 transition may be observed on WDI input. The voltage swing of this transition is variable, since it depends on the internal Zynq's pull-up value of PS_MIO15_500 pad. In general, <u>WDT may be inadvertently started at power-up</u>, before software takes control of PS_MIO15_500 GPIO. <u>To avoid this situation, it is recommended to add a 2.2kOhm pull-down on carrier board, connected to the PS_MIO15_500 signal</u>.
In any case, when the watchdog is started, the software (bootloader/operating system) must take care of toggling the watchdog trigger pin (WDI) before the timeout expiration.