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Standalone boot (BELK/BXELK)

8,754 bytes added, 15:09, 5 March 2021
Program the boot images in NAND flash
This step can be followed in the same way as described [[Standalone_boot_(BELK/BXELK)#Program_the_root_filesystem_in_NAND_flash | before]]
=== Program the boot images in NAND flashfrom U-Boot ===
It is assumed that the following U-Boot's environment variables are defined:
=> setenv bootcmd run nand_nand
=> saveenv
</pre>
 
=== Program the boot images in NAND flash from Linux ===
 
* Get kernel and device tree images with the following <code>tftp</code> commands
 
E.g.:
 
<pre class="board-terminal">
root@bora:~# tftp -g -r bora/linux/belk-4.1.0_uImage 192.168.0.23
root@bora:~# tftp -g -r bora/linux/belk-4.1.0_bora.dtb 192.168.0.23
root@bora:~# tftp -g -r bora/belk-4.1.0_bora_BASE_fpga.bin 192.168.0.23
root@bora:~# ls -la
root@bora:~# ls -la
drwxr-xr-x 2 root root 4096 Mar 5 2021 .
drwxrwxrwx 6 root root 4096 Mar 5 2021 ..
-rw-r--r-- 1 root root 10073 Mar 5 2021 belk-4.1.0_bora.dtb
-rw-r--r-- 1 root root 4045564 Mar 5 2021 belk-4.1.0_bora_BASE_fpga.bin
-rw-r--r-- 1 root root 3796168 Mar 5 2021 belk-4.1.0_uImage
root@bora:~#
</pre>
* now the binary images have been retrieved form the ''tftp'' server (like the U-Boot tftp download)
* check the mtd partitioning for identifying the proper <code>/dev/mtdX</code> device
<pre class="board-terminal">
root@bora:~# cat /proc/mtd
dev: size erasesize name
mtd0: 00040000 00020000 "nand-SPL"
mtd1: 000c0000 00020000 "nand-uboot"
mtd2: 00040000 00020000 "nand-uboot-env1"
mtd3: 00040000 00020000 "nand-uboot-env2"
mtd4: 00600000 00020000 "nand-bitstream"
mtd5: 00080000 00020000 "nand-device-tree"
mtd6: 00800000 00020000 "nand-linux"
mtd7: 1f000000 00020000 "nand-rootfs"
root@bora:~#
</pre>
It is possible to see the mtd partition for the NAND flash: i.e. <code>mtd4</code> for the fpga bitstream, <code>mtd5</code> for the device tree and <code>mtd6</code> for the kernel
* using the mtd partitioning, program the binary images in the proper <code>/dev/mtdX</code> device
* the <code>mtd-utils</code> commands <code>flash_erase</code> and <code>nandwrite</code> can be used for this purposes: see [https://bootlin.com/blog/managing-flash-storage-with-linux here] for more information
<pre>
root@bora:~# flash_erase --help
Usage: flash_erase [options] MTD_DEVICE <start offset> <block count>
Erase blocks of the specified MTD device.
Specify a count of 0 to erase to end of device.
 
-j, --jffs2 format the device for jffs2
-N, --noskipbad don't skip bad blocks
-u, --unlock unlock sectors before erasing
-q, --quiet do not display progress messages
--silent same as --quiet
--help display this help and exit
--version output version information and exit
root@bora:~# nandwrite --help
Usage: nandwrite [OPTION] MTD_DEVICE [INPUTFILE|-]
Writes to the specified MTD device.
 
-a, --autoplace Use auto OOB layout
-m, --markbad Mark blocks bad if write fails
-n, --noecc Write without ecc
-N, --noskipbad Write without bad block skipping
-o, --oob Input contains oob data
-O, --onlyoob Input contains oob data and only write the oob part
-s addr, --start=addr Set output start address (default is 0)
-p, --pad Pad writes to page size
-b, --blockalign=1|2|4 Set multiple of eraseblocks to align to
--input-skip=length Skip |length| bytes of the input file
--input-size=length Only read |length| bytes of the input file
-q, --quiet Don't display progress messages
-h, --help Display this help and exit
--version Output version information and exit
root@bora:~#
</pre>
* program the binary images in each mtd device
<pre class="board-terminal">
root@bora:~# flash_erase /dev/mtd4 0 0
Erasing 128 Kibyte @ 5e0000 -- 100 % complete
root@bora:~# nandwrite -p /dev/mtd4 belk-4.1.0_bora_BASE_fpga.bin
Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
Writing data to block 2 at offset 0x40000
Writing data to block 3 at offset 0x60000
Writing data to block 4 at offset 0x80000
Writing data to block 5 at offset 0xa0000
Writing data to block 6 at offset 0xc0000
Writing data to block 7 at offset 0xe0000
Writing data to block 8 at offset 0x100000
Writing data to block 9 at offset 0x120000
Writing data to block 10 at offset 0x140000
Writing data to block 11 at offset 0x160000
Writing data to block 12 at offset 0x180000
Writing data to block 13 at offset 0x1a0000
Writing data to block 14 at offset 0x1c0000
Writing data to block 15 at offset 0x1e0000
Writing data to block 16 at offset 0x200000
Writing data to block 17 at offset 0x220000
Writing data to block 18 at offset 0x240000
Writing data to block 19 at offset 0x260000
Writing data to block 20 at offset 0x280000
Writing data to block 21 at offset 0x2a0000
Writing data to block 22 at offset 0x2c0000
Writing data to block 23 at offset 0x2e0000
Writing data to block 24 at offset 0x300000
Writing data to block 25 at offset 0x320000
Writing data to block 26 at offset 0x340000
Writing data to block 27 at offset 0x360000
Writing data to block 28 at offset 0x380000
Writing data to block 29 at offset 0x3a0000
Writing data to block 30 at offset 0x3c0000
root@bora:~# flash_erase /dev/mtd5 0 0
Erasing 128 Kibyte @ 60000 -- 100 % complete
root@bora:~# nandwrite -p /dev/mtd5 belk-4.1.0_bora.dtb
Writing data to block 0 at offset 0x0
root@bora:~# flash_erase /dev/mtd6 0 0
Erasing 128 Kibyte @ 7e0000 -- 100 % complete
root@bora:~# nandwrite -p /dev/mtd6 belk-4.1.0_uImage
Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
Writing data to block 2 at offset 0x40000
Writing data to block 3 at offset 0x60000
Writing data to block 4 at offset 0x80000
Writing data to block 5 at offset 0xa0000
Writing data to block 6 at offset 0xc0000
Writing data to block 7 at offset 0xe0000
Writing data to block 8 at offset 0x100000
Writing data to block 9 at offset 0x120000
Writing data to block 10 at offset 0x140000
Writing data to block 11 at offset 0x160000
Writing data to block 12 at offset 0x180000
Writing data to block 13 at offset 0x1a0000
Writing data to block 14 at offset 0x1c0000
Writing data to block 15 at offset 0x1e0000
Writing data to block 16 at offset 0x200000
Writing data to block 17 at offset 0x220000
Writing data to block 18 at offset 0x240000
Writing data to block 19 at offset 0x260000
Writing data to block 20 at offset 0x280000
Writing data to block 21 at offset 0x2a0000
Writing data to block 22 at offset 0x2c0000
Writing data to block 23 at offset 0x2e0000
Writing data to block 24 at offset 0x300000
Writing data to block 25 at offset 0x320000
Writing data to block 26 at offset 0x340000
Writing data to block 27 at offset 0x360000
Writing data to block 28 at offset 0x380000
root@bora:~#
</pre>
* once rebooted, configure U-Boot to apply the new configuration in NAND
<pre class="board-terminal">
...
...
Hit ENTER within 3 seconds to stop autoboot
Bora> setenv bootcmd 'run nand_nand'
Bora> saveenv
Saving Environment to SPI Flash...
SF: Detected s25fl256s_64k with page size 256 Bytes, erase size 64 KiB, total 64 MiB
Erasing SPI flash...Writing to SPI flash...done
Valid environment: 1
Bora>
<pre>
 
* the system is then ready to boot retrieving the storage binary images from NAND
<pre>
Bora> boot
NAND read: device 0 offset 0x180000, size 0x600000
6291456 bytes read: OK
 
NAND read: device 0 offset 0x800000, size 0x800000
8388608 bytes read: OK
 
NAND read: device 0 offset 0x780000, size 0x80000
524288 bytes read: OK
## Booting kernel from Legacy Image at 02080000 ...
Image Name: Linux-4.9.0-belk-4.1.0-xilinx
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3796104 Bytes = 3.6 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Device Tree to 1effa000, end 1efff758 ... OK
Switching to NAND storage before starting Linux
 
Starting kernel ...
 
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.9.0-belk-4.1.0-xilinx (jenkins@linuxserver2) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Tue Dec 24 11:34:28 CET 2019
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] OF: fdt:Machine model: Bora
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] cma: Reserved 16 MiB at 0x3f000000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] On node 0 totalpages: 262144
[ 0.000000] free_area_init_node: node 0, pgdat c0a2ddc0, node_mem_map ef7f7000
[ 0.000000] Normal zone: 1536 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 196608 pages, LIFO batch:31
...
...
</pre>
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