RIALTO SBC/Interfaces and Connectors/Mezzanine
< RIALTO SBC
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Contents
Mezzanine Connectors[edit | edit source]
Description[edit | edit source]
RIALTO SBC has two mezzanine expansion connectors: J60 and J61.
J60 is a 10x1x2.54mm pin strip header connector.
J61 is a 10x1x2.54mm pin strip header connector.
Signals[edit | edit source]
The following table describes the interface signals:
| Pin# | Pin name | Pin function | GPIO |
|---|---|---|---|
| 1 | UART2_RX_DATA | I2C4_SDA, ECSPI3_SCLK | GPIO1_IO21 |
| 10 | DGND | Ground |
All the GPIO signals are 0-3.3V level.
Device mapping[edit | edit source]
GPIO[edit | edit source]
GPIOs are mapped into banks each of which contains 32 pins. They are named as GPIO<bank>_IO<pin>
Each pin can be addressed with an incremental number, calculated as follows: GPIO = 32 x (<bank> - 1) + <pin>
Device usage[edit | edit source]
GPIO[edit | edit source]
Under Linux the GPIOs can be manipulated su sysfs export or with the gpio tools.
