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Programmable logic (Bora)

48 bytes added, 11:23, 29 January 2015
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FPGA Bank 13 (Zynq 7020 only)
== FPGA Bank 13 (Zynq 7020 only) ==
N.B. Although BANK 13 is not available on Bora SOMs equipped with the XC7Z010 SOC, VDDIO_BANK13 pin pins must not be left open and must be connected anyway , either to ground or to an external I/O voltage as described in [[Programmable_logic_(Bora)#Introduction | I/O banks table]].
The following table reports the available pins connected to bank 13:

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