Power (Bora/BoraLite)
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Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
Implementing correct power-up sequence for Zynq-based system is not a trivial task because several power rails are involved. Bora SOM simplifies this task and embeds all the needed circuitry. The following picture shows a simplified block diagram of power supply subsystem.
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The recommended power-up sequence is:
- main power supply rail (3.3VIN) ramps up
- carrier board circuitry raises CB_PWR_GOOD; this indicates 3.3VIN rail is stable (1)
- Bora's PSU enables and sequences DC/DC regulators to turn circuitry on
- BOARD_PGOOD is raised to indicate that Bora's internal power rails are stable and that carrier board's peripheral interfacing Zynq I/O can be turned on.
Please note that "bank 13 and bank 35 of Zynq must be powered by carrier board even if they are not used to implement any function. Two dedicated power rails are available fot this purpose (VDDIO_BANK35 and VDDIO_BANK13) and allow the system designer the freedom to select the I/O voltage of these two banks". These power rails can be connected to main power supply rail (3.3VIN).
(1) This step is not mandatory and CB_PWR_GOOD can be left floating. CB_PWR_GOOD is provided to prevent, if necessary, Bora's PSU to turn on during ramp of carrier board 3.3VIN rail. Depending on carrier board's PSU design, this may lead to undesired glitches during ramp-up.
