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Pinout (BoraLite)
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13:49, 15 October 2019
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J1 odd pins (1 to 203)
|J1.79||IO_0_34||FPGA.IO_0_34||R19||||||||
|-
|J1.81||IO_25_34||FPGA.IO_25_34||T19||||||
optionally
||Optionally
connected to ETH PHY ENABLE
||
|-
|J1.83||IO_L8N_T1_34||FPGA.IO_L8N_T1_34||Y14||||||||
U0007
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