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Pinout (BORAXpress)

Revision as of 11:31, 27 October 2015 by U0003 (talk | contribs) (Created page with "{{InfoBoxTop}} {{Applies To BoraX}} {{InfoBoxBottom}} ==Introduction== This chapter contains the pinout description of the BORA Xpress module, grouped in six tables (two –...")

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BORA Xpress.png Applies to BORA Xpress

Contents

IntroductionEdit

This chapter contains the pinout description of the BORA Xpress module, grouped in six tables (two – odd and even pins – for each connector) that report the pin mapping of the three 140-pin BORA Xpress connectors. Each row in the pinout tables contains the following information:

  • Pin: reference to the connector pin
  • Pin Name: pin (signal) name on the BORA Xpress connectors
  • Internal connections: connections to the BORA Xpress components
    • CPU.<x> : pin connected to CPU (processing system) pad named <x>
    • FPGA.<x>: pin connected to FPGA (programmable logic) pad named <x>
    • CAN.<x> : pin connected to the CAN transceiver
    • LAN.<x> : pin connected to the LAN PHY
    • USB.<x> : pin connected to the USB transceiver
    • NAND.<x>: pin connected to the flash NAND
    • NOR.<x>: pin connected to the flash NOR
    • SV.<x>: pin connected to voltage supervisor
    • MTR: pin connected to voltage monitors
  • Ball/pin #: Component ball/pin number connected to signal
  • Supply Group: Power Supply Group
  • Type: pin type
    • I = Input
    • O = Output
    • D = Differential
    • Z = High impedance
    • S = Power supply voltage
    • G = Ground
    • A = Analog signal
  • Voltage: I/O voltage levels

J1 odd pins (1 to 139)Edit

J1 even pins (2 to 140)Edit

J2 odd pins (1 to 139)Edit

J2 even pins (2 to 140)Edit

J3 odd pins (1 to 139)Edit

J3 even pins (2 to 140)Edit