Difference between revisions of "On board JTAG connector (BoraLite)"
(→J2 - Connector's pinout) |
|||
| Line 3: | Line 3: | ||
{{InfoBoxBottom}} | {{InfoBoxBottom}} | ||
| − | == | + | __FORCETOC__ |
| + | |||
| + | == On board JTAG connector== | ||
JTAG signals are routed to a dedicated connector (J2) on the BORA Lite PCB. The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below). | JTAG signals are routed to a dedicated connector (J2) on the BORA Lite PCB. The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below). | ||
| Line 9: | Line 11: | ||
[[File:BORAlite-jtag-conn1.png|500px|frameless|border]] | [[File:BORAlite-jtag-conn1.png|500px|frameless|border]] | ||
| − | == J2 - Connector's pinout == | + | === J2 - Connector's pinout === |
J2 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout: | J2 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout: | ||
Revision as of 14:14, 1 December 2020
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
|
 ONLINE HELPDESK
|
| Roadmap | IoT Services | ML/AI services | Embedded Design Services |
Info Box
|
On board JTAG connector[edit | edit source]
JTAG signals are routed to a dedicated connector (J2) on the BORA Lite PCB. The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).
J2 - Connector's pinout[edit | edit source]
J2 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | - | - |
| 2 | JTAG_TCK | - | - |
| 3 | JTAG_TMS | - | - |
| 4 | JTAG_TDO | - | - |
| 5 | JTAG_TDI | - | - |
| 6 | FPGA_INIT_B | - | Place external 4.7 kO (or stronger) pull-up resistor to BOARD_PGOOD driven +3.3V supply
For more details please refer to Table 2-4 on 7 Series FPGAs Configuration |
| 7 | FPGA_PROGRAM_B | - | Place external 4.7 kO (or stronger) pull-up resistor to BOARD_PGOOD driven +3.3V supply
For more details please refer to Table 2-4 on 7 Series FPGAs Configuration |
| 8 | FPGA_DONE | - | Place external 300O pull-up resistor to BOARD_PGOOD driven +3.3V supply
For more details please refer to Table 2-4 on 7 Series FPGAs Configuration |
| 9 | D.N.C. | - | RESERVED |
| 10 | 3V3 | - | 3.3VIN enabled with BOARD_PGOOD |
