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ORCA SOM/ORCA Hardware/Power and Reset/System boot

< ORCA SOM‎ | ORCA Hardware
Revision as of 13:29, 3 February 2021 by U0016 (talk | contribs)

History
Version Issue Date Notes
1.0.0 Jan 2021 First release


System bootEdit

The boot process begins at Power On Reset (POR) where the hardware reset logic forces the ARM core to begin execution starting from the on-chip boot ROM. The boot ROM:

  • determines whether the boot is secure or non-secure
  • performs some initialization of the system and clean-ups
  • reads the mode pins to determine the primary boot device
  • once it is satisfied, it executes the boot code

Boot optionsEdit

Many options are available related to system boot. They are selected by the BOOT_MODE_x signals as follow:

BOOT_MODE_2 BOOT_MODE_1 BOOT_MODE_0 BOOT peripheral
0 0 0 Boot From Internal Fuses
0 0 1 USB Serial Download
0 1 0 USDHC3 (eMMC boot only, SD3 8-bit)
0 1 1 USDHC2 (SD boot only, SD2)
1 0 0 NAND 8-bit single device 256 page
1 0 1 NAND 8-bit single device 512 page
1 1 0 QSPI 3B Read

When the signals are left floating the primary boot device is set by default to eMMC on SD3.

The BOOT_MODE_x signals are latched when processor reset is released.

In any case, boot process is managed by on-chip boot ROM code that is described in detail in processor's Reference Manual.