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Memory organization (Naon)

10 bytes removed, 14:12, 14 December 2018
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== Introduction ==
Naon memory organization and mapping is quite complex, due to DM8148's multiprocessor nature and the availability of several memory devices connected to the processor. This section will provide an overview of such architecture while following sections will describe in more detail memory map for each device. Please refer to [[Naon_SOM#Module_overview:Category:Naon|Naon block diagram]].
About system RAM, DM8148 provides two controllers. Each one can be interfaced to one SDRAM bank through a physical interface called EMIF (EMIF0 and EMIF1). EMIF0 is connected to 32-bit DDR2 SDRAM bank (up to 512 MByte). EMIF1 is not connected to any device, hence is permanently disabled.
|-
|80000
|30724096|300000400000
|Linux Kernel
|-
|380000480000|512028160|5000001B80000
|FREE
|}
E.g. to use 46MiB of RAM for 3 frame buffer, divided in 24MiB for fb0, 16MiB for fb1 and 6MiB for fb2, use:
* <code>vmemvram=46M</code> as command line parameter
* <code>modprobe ti81xxfb vram=0:24M,1:16M,2:6M</code> command to load fb module
User that needs more Linux user space memory and needs only one frame buffer, can, for example, use 6MiB of RAM used only by the first FB, so:
* <code>vmemvram=6M</code> as command line parameter
* <code>modprobe ti81xxfb vram=0:6M</code> command to load fb module
Please note that <code>ti81xxfb</code> is usually loaded at startup from <code>/etc/init.d/load-hd-firmware.sh</code>: user that would like to change the default configuration should change this file.
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