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* Executing a computationally expensive inference algorithm on the collected data.
This scenario is quite common in the realm of "AI at the edge " but, generally, can not be addressed with a microcontroller-based solution because it would take too long to run the inference algorithm. On the other hand, a classic embedded processor running a complex operating system such as Linux might not be suited either because unable to handle tight real-time constrained tasks properly.
In such cases, the power and the flexibility of the NXP i.MX8M Plus can be of much help, as this SoC features a heterogeneous architecture — an ARM Cortex-A53 complex combined with an ARM Cortex-M7 core — and a Neural Processing Unit (NPU).
* The Cortex-A53 complex — running Yocto Linux — is devoted to the inference algorithm by leveraging the NPU hardware acceleration
* The Cortex-M7 core takes care of data acquisition.
Several documents dealing with AMP configurations were published in the past [1]. Most of them refer to homogeneous architectures, which pose some well-know limitations when it comes to implementing asymmetric multiprocessing schemes. At large, the structure of the i.MX8M Plus allows to overcome such limitations.
[1]
* [[BELK-AN-001: Asymmetric Multiprocessing (AMP) on Bora – Linux FreeRTOS]]
* [[BELK-TN-001: Real-timeness, system integrity and TrustZone® technology on AMP configuration]]
* [[BELK-AN-007: Asymmetric Multiprocessing (AMP) on Bora/BoraX with OpenAMP]]
* [[BELK-AN-002: Trace on the Bora AMP (Linux + FreeRTOS) system]]
* [[BXELK-TN-002: Non-intrusive continuous multi-gigabit transceivers link monitoring]]
* [[XELK-AN-001: Asymmetric Multiprocessing (AMP) on Axel – Linux + FreeRTOS]]
* [[MISC-TN-003: Asymmetric multiprocessing on NXP i.MX6SoloX]]
=Testbed=
