Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence"
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== Power Supply Unit (PSU) and recommended power-up sequence == | == Power Supply Unit (PSU) and recommended power-up sequence == | ||
| − | Implementing correct power-up sequence for '' | + | Implementing correct power-up sequence for ''iMX8M'' processors is not a trivial task because several power rails are involved. |
MITO 8M SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | MITO 8M SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | ||
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* generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals | * generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals | ||
* synchronizes the powering up of carrier board in order to prevent back power | * synchronizes the powering up of carrier board in order to prevent back power | ||
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=== Power-up sequence=== | === Power-up sequence=== | ||
| − | + | The typical power-up sequence is the following: | |
| − | + | # 3.3VIN main power supply rail is powered | |
| + | # SNVS domain signals are pulled-up (unless carrier board circuitry keeps this signal low for any reason) | ||
| + | # CPU_PORn (active-low) is driven low by PMIC | ||
| + | # RTC_RESET_B are internally released after 200ms | ||
| + | # VDD_SOC regulator starts and enables the VDD_ARM and PMIC regulators | ||
| + | # PMIC initiates power-up sequence needed by iMX8M processor | ||
| + | # BOARD_PGOOD goes up when NVCC_3V3 (CPU I/O power rail) is ready | ||
| + | # CPU_PORn is deasserted after the last regulator to bring the processor out of reset | ||
==== Note on BOARD_PGOOD usage ==== | ==== Note on BOARD_PGOOD usage ==== | ||
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BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals. | BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals. | ||
| − | Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly | + | Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly because it has a 20mA output current absolute maximum rating. |
| − | + | In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution. | |
[[File:MITO 8M-power-good.png]] | [[File:MITO 8M-power-good.png]] | ||
Revision as of 15:42, 28 September 2020
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| Version | Issue Date | Notes | |
| 1.0.0 | Sep 2020 | First release | |
Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
Implementing correct power-up sequence for iMX8M processors is not a trivial task because several power rails are involved.
MITO 8M SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The PSU is composed of two main blocks:
- power management integrated circuit
- additional generic power management circuitry that completes PMIC functionalities
The PSU:
- generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
- synchronizes the powering up of carrier board in order to prevent back power
Power-up sequence[edit | edit source]
The typical power-up sequence is the following:
- 3.3VIN main power supply rail is powered
- SNVS domain signals are pulled-up (unless carrier board circuitry keeps this signal low for any reason)
- CPU_PORn (active-low) is driven low by PMIC
- RTC_RESET_B are internally released after 200ms
- VDD_SOC regulator starts and enables the VDD_ARM and PMIC regulators
- PMIC initiates power-up sequence needed by iMX8M processor
- BOARD_PGOOD goes up when NVCC_3V3 (CPU I/O power rail) is ready
- CPU_PORn is deasserted after the last regulator to bring the processor out of reset
Note on BOARD_PGOOD usage[edit | edit source]
BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly because it has a 20mA output current absolute maximum rating.
In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.
