Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Pinout Table"
(→Pinout Table ODD pins declaration) (Tag: Visual edit) |
(→Pinout Table ODD pins declaration) (Tag: Visual edit) |
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| Line 249: | Line 249: | ||
|CPU.GPIO1_IO00 | |CPU.GPIO1_IO00 | ||
|T6 | |T6 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 258: | Line 258: | ||
|CPU.GPIO1_IO01 | |CPU.GPIO1_IO01 | ||
|T7 | |T7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 267: | Line 267: | ||
|CPU.SPDIF_EXT_CLK | |CPU.SPDIF_EXT_CLK | ||
|E6 | |E6 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 276: | Line 276: | ||
|CPU.GPIO1_IO13 | |CPU.GPIO1_IO13 | ||
|K6 | |K6 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 294: | Line 294: | ||
|CPU.ECSPI2_SCLK | |CPU.ECSPI2_SCLK | ||
|C5 | |C5 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 303: | Line 303: | ||
|CPU.ECSPI2_MOSI | |CPU.ECSPI2_MOSI | ||
|E5 | |E5 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 312: | Line 312: | ||
|CPU.GPIO1_IO08 | |CPU.GPIO1_IO08 | ||
|N7 | |N7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 321: | Line 321: | ||
|CPU.GPIO1_IO09 | |CPU.GPIO1_IO09 | ||
|M7 | |M7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 330: | Line 330: | ||
|CPU.ECSPI2_MISO | |CPU.ECSPI2_MISO | ||
|B5 | |B5 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 348: | Line 348: | ||
|CPU.ECSPI2_SS0 | |CPU.ECSPI2_SS0 | ||
|A5 | |A5 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 357: | Line 357: | ||
|CPU.GPIO1_IO05 | |CPU.GPIO1_IO05 | ||
|P7 | |P7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 366: | Line 366: | ||
|CPU.I2C2_SCL | |CPU.I2C2_SCL | ||
|G7 | |G7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 375: | Line 375: | ||
|CPU.I2C2_SDA | |CPU.I2C2_SDA | ||
|F7 | |F7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 384: | Line 384: | ||
|CPU.GPIO1_IO06 | |CPU.GPIO1_IO06 | ||
|N5 | |N5 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 393: | Line 393: | ||
|CPU.SAI2_RXC | |CPU.SAI2_RXC | ||
|H3 | |H3 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 402: | Line 402: | ||
|CPU.SAI2_RXFS | |CPU.SAI2_RXFS | ||
|J4 | |J4 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 420: | Line 420: | ||
|CPU.SD2_DATA0 | |CPU.SD2_DATA0 | ||
|N22 | |N22 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 429: | Line 429: | ||
|CPU.SD2_DATA1 | |CPU.SD2_DATA1 | ||
|N21 | |N21 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 438: | Line 438: | ||
|CPU.SD2_DATA2 | |CPU.SD2_DATA2 | ||
|P22 | |P22 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 447: | Line 447: | ||
|CPU.SD2_DATA03 | |CPU.SD2_DATA03 | ||
|P21 | |P21 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 456: | Line 456: | ||
|CPU.SD2_CMD | |CPU.SD2_CMD | ||
|M22 | |M22 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 465: | Line 465: | ||
|CPU.SD2_CLK | |CPU.SD2_CLK | ||
|L22 | |L22 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 483: | Line 483: | ||
|CPU.UART3_TXD | |CPU.UART3_TXD | ||
|B7 | |B7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 492: | Line 492: | ||
|CPU.UART3_RXD | |CPU.UART3_RXD | ||
|A6 | |A6 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 501: | Line 501: | ||
|CPU.UART4_TXD | |CPU.UART4_TXD | ||
|D7 | |D7 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 510: | Line 510: | ||
|CPU.UART4_RXD | |CPU.UART4_RXD | ||
|C6 | |C6 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 519: | Line 519: | ||
|CPU.SD2_WP | |CPU.SD2_WP | ||
|M21 | |M21 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 528: | Line 528: | ||
|CPU.SD2_RESET_B | |CPU.SD2_RESET_B | ||
|R22 | |R22 | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 537: | Line 537: | ||
|CPU.HDMI_DDC_SCL | |CPU.HDMI_DDC_SCL | ||
|R3 | |R3 | ||
| − | | | + | |VDD_PHY_1V8 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 546: | Line 546: | ||
|CPU.HDMI_DDC_SDA | |CPU.HDMI_DDC_SDA | ||
|P3 | |P3 | ||
| − | | | + | |VDD_PHY_1V8 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 555: | Line 555: | ||
|CPU.HDMI_AUX_N | |CPU.HDMI_AUX_N | ||
|V2 | |V2 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 564: | Line 564: | ||
|CPU.HDMI_AUX_P | |CPU.HDMI_AUX_P | ||
|V1 | |V1 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 582: | Line 582: | ||
|CPU.HDMI_TX_M_LN_3 | |CPU.HDMI_TX_M_LN_3 | ||
|M2 | |M2 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 591: | Line 591: | ||
|CPU.HDMI_TX_P_LN_3 | |CPU.HDMI_TX_P_LN_3 | ||
|M1 | |M1 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 600: | Line 600: | ||
|CPU.HDMI_TX_M_LN_0 | |CPU.HDMI_TX_M_LN_0 | ||
|T2 | |T2 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 609: | Line 609: | ||
|CPU.HDMI_TX_P_LN_0 | |CPU.HDMI_TX_P_LN_0 | ||
|T1 | |T1 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 618: | Line 618: | ||
|CPU.HDMI_TX_M_LN_1 | |CPU.HDMI_TX_M_LN_1 | ||
|U1 | |U1 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 627: | Line 627: | ||
|CPU.HDMI_TX_P_LN_1 | |CPU.HDMI_TX_P_LN_1 | ||
|U2 | |U2 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 636: | Line 636: | ||
|CPU.HDMI_TX_M_LN_2 | |CPU.HDMI_TX_M_LN_2 | ||
|N1 | |N1 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 645: | Line 645: | ||
|CPU.HDMI_TX_P_LN_2 | |CPU.HDMI_TX_P_LN_2 | ||
|N2 | |N2 | ||
| − | | | + | | - |
| − | | | + | |D |
|connected with capacitor in series | |connected with capacitor in series | ||
| | | | ||
| Line 652: | Line 652: | ||
|J1.127 | |J1.127 | ||
|HDMI_CEC | |HDMI_CEC | ||
| − | | | + | |CPU.HDMI_CEC |
| − | | | + | |W3 |
| − | | | + | |VDD_PHY_1V8 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 661: | Line 661: | ||
|J1.129 | |J1.129 | ||
|HDMI_HPD | |HDMI_HPD | ||
| − | | | + | |CPU.HDMI_HPD |
| − | | | + | |W2 |
| − | | | + | |VDD_PHY_1V8 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 877: | Line 877: | ||
|J1.177 | |J1.177 | ||
|SD2_CD_B | |SD2_CD_B | ||
| − | | | + | |CPU.SD2_CD_B |
| − | | | + | |L21 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 886: | Line 886: | ||
|J1.179 | |J1.179 | ||
|ECSPI1_SS0 | |ECSPI1_SS0 | ||
| − | | | + | |CPU.ECSPI1_SS0 |
| − | | | + | |D4 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 895: | Line 895: | ||
|J1.181 | |J1.181 | ||
|ECSPI1_SCLK | |ECSPI1_SCLK | ||
| − | | | + | |CPU.ECSPI1_SCLK |
| − | | | + | |D5 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 904: | Line 904: | ||
|J1.183 | |J1.183 | ||
|ECSPI1_MISO | |ECSPI1_MISO | ||
| − | | | + | |CPU.ECSPI1_MISO |
| − | | | + | |B4 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 913: | Line 913: | ||
|J1.185 | |J1.185 | ||
|GPIO1_IO03 | |GPIO1_IO03 | ||
| − | | | + | |CPU.GPIO1_IO03 |
| − | | | + | |P4 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 922: | Line 922: | ||
|J1.187 | |J1.187 | ||
|UART1_TXD | |UART1_TXD | ||
| + | |?? | ||
| | | | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| − | |||
| | | | ||
| | | | ||
| Line 931: | Line 931: | ||
|J1.189 | |J1.189 | ||
|UART1_RXD | |UART1_RXD | ||
| + | |?? | ||
| | | | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| − | |||
| | | | ||
| | | | ||
| Line 940: | Line 940: | ||
|J1.191 | |J1.191 | ||
|UART2_TXD | |UART2_TXD | ||
| + | |?? | ||
| | | | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| − | |||
| | | | ||
| | | | ||
| Line 949: | Line 949: | ||
|J1.193 | |J1.193 | ||
|UART2_RXD | |UART2_RXD | ||
| + | |?? | ||
| | | | ||
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| − | |||
| | | | ||
| | | | ||
| Line 958: | Line 958: | ||
|J1.195 | |J1.195 | ||
|ECSPI1_MOSI | |ECSPI1_MOSI | ||
| − | | | + | |CPU.ECSPI1_MOSI |
| − | | | + | |A4 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 967: | Line 967: | ||
|J1.197 | |J1.197 | ||
|GPIO1_IO14 | |GPIO1_IO14 | ||
| − | | | + | |CPU.GPIO1_IO14 |
| − | | | + | |K7 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
| Line 976: | Line 976: | ||
|J1.199 | |J1.199 | ||
|GPIO1_IO04 | |GPIO1_IO04 | ||
| − | | | + | |CPU.GPIO1_IO04 |
| − | | | + | |P5 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
|- | |- | ||
|J1.201 | |J1.201 | ||
| − | |GPIO1_IO12 | + | |GPIO1_IO12 |
| − | | | + | |CPU.GPIO1_IO12 |
| − | | | + | |L7 |
| − | | | + | |NVCC_3V3 |
| − | | | + | |I/O |
| | | | ||
| | | | ||
Revision as of 08:39, 24 September 2020
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
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| History | |||
|---|---|---|---|
| Version | Issue Date | Notes | |
| 1.0.0 | Sep 2020 | First release | |
Contents
Pinout Table[edit | edit source]
Introduction[edit | edit source]
This chapter contains the pinout description of the MITO 8M module, grouped in two tables (odd and even pins) that report the pin mapping of the 204-pin SO-DIMM MITO 8M connector.
Each row in the pinout tables contains the following information:
| Pin | Reference to the connector pin |
| Pin Name | Pin (signal) name on the AxelLite connectors |
| Internal connections |
Connections to the Axel Ultra components
|
| Ball/pin # | Component ball/pin number connected to signal |
| Voltage | I/O voltage levels |
| Type | Pin type:
|
| Notes | Remarks on special pin characteristics |
| Pin MUX alternative functions | Muxes:
|
Pinout Table ODD pins declaration[edit | edit source]
| Pin | Pin Name | Internal Connections | Ball/pin # | Voltage|domain | Type | Notes | Alternative Functions |
|---|---|---|---|---|---|---|---|
| J1.1 | DGND | DGND | - | - | G | ||
| J1.3 | 3.3VIN | INPUT VOLTAGE | - | 3.3VIN | S | ||
| J1.5 | 3.3VIN | INPUT VOLTAGE | - | 3.3VIN | S | ||
| J1.7 | 3.3VIN | INPUT VOLTAGE | - | 3.3VIN | S | ||
| J1.9 | 3.3VIN | INPUT VOLTAGE | - | 3.3VIN | S | ||
| J1.11 | DGND | DGND | - | - | G | ||
| J1.13 | ETH0_LED1 | LAN.LED1/PME_N1 | 17 | NVCC_1V8 | I/O | must be level translated if used @ 3V3 | |
| J1.15 | ETH0_LED2 | LAN.LED2 | 15 | NVCC_1V8 | I/O | must be level translated if used @ 3V3 | |
| J1.17 | DGND | DGND | - | - | G | ||
| J1.19 | ETH0_TXRX0_P | LAN.TXRXP_A | 2 | - | D | ||
| J1.21 | ETH0_TXRX0_M | LAN.TXRXM_A | 3 | - | D | ||
| J1.23 | ETH0_TXRX1_P | LAN.TXRXP_B | 5 | - | D | ||
| J1.25 | ETH0_TXRX1_M | LAN.TXRXM_B | 6 | - | D | ||
| J1.27 | ETH0_TXRX2_P | LAN.TXRXP_C | 7 | - | D | ||
| J1.29 | ETH0_TXRX2_M | LAN.TXRXM_C | 8 | - | D | ||
| J1.31 | ETH0_TXRX3_P | LAN.TXRXP_D | 10 | - | D | ||
| J1.33 | ETH0_TXRX3_M | LAN.TXRXM_D | 11 | - | D | ||
| J1.35 | DGND | DGND | - | - | G | ||
| J1.37 | GPIO1_IO00 | CPU.GPIO1_IO00 | T6 | NVCC_3V3 | I/O | ||
| J1.39 | GPIO1_IO01 | CPU.GPIO1_IO01 | T7 | NVCC_3V3 | I/O | ||
| J1.41 | SPDIF_EXT_CLK | CPU.SPDIF_EXT_CLK | E6 | NVCC_3V3 | I/O | ||
| J1.43 | GPIO1_IO13 | CPU.GPIO1_IO13 | K6 | NVCC_3V3 | I/O | ||
| J1.45 | VDD_PHY_1V8 | ||||||
| J1.47 | ECSPI2_SCLK | CPU.ECSPI2_SCLK | C5 | NVCC_3V3 | I/O | ||
| J1.49 | ECSPI2_MOSI | CPU.ECSPI2_MOSI | E5 | NVCC_3V3 | I/O | ||
| J1.51 | GPIO1_IO08 | CPU.GPIO1_IO08 | N7 | NVCC_3V3 | I/O | ||
| J1.53 | GPIO1_IO09 | CPU.GPIO1_IO09 | M7 | NVCC_3V3 | I/O | ||
| J1.55 | ECSPI2_MISO | CPU.ECSPI2_MISO | B5 | NVCC_3V3 | I/O | ||
| J1.57 | DGND | DGND | - | - | G | ||
| J1.59 | ECSPI2_SS0 | CPU.ECSPI2_SS0 | A5 | NVCC_3V3 | I/O | ||
| J1.61 | GPIO1_IO05 | CPU.GPIO1_IO05 | P7 | NVCC_3V3 | I/O | ||
| J1.63 | I2C2_SCL | CPU.I2C2_SCL | G7 | NVCC_3V3 | I/O | ||
| J1.65 | I2C2_SDA | CPU.I2C2_SDA | F7 | NVCC_3V3 | I/O | ||
| J1.67 | GPIO1_IO06 | CPU.GPIO1_IO06 | N5 | NVCC_3V3 | I/O | ||
| J1.69 | SAI2_RXC | CPU.SAI2_RXC | H3 | NVCC_3V3 | I/O | ||
| J1.71 | SAI2_RXFS | CPU.SAI2_RXFS | J4 | NVCC_3V3 | I/O | ||
| J1.73 | DGND | DGND | - | - | G | ||
| J1.75 | SD2_DATA0 | CPU.SD2_DATA0 | N22 | NVCC_3V3 | I/O | ||
| J1.77 | SD2_DATA1 | CPU.SD2_DATA1 | N21 | NVCC_3V3 | I/O | ||
| J1.79 | SD2_DATA2 | CPU.SD2_DATA2 | P22 | NVCC_3V3 | I/O | ||
| J1.81 | SD2_DATA3 | CPU.SD2_DATA03 | P21 | NVCC_3V3 | I/O | ||
| J1.83 | SD2_CMD | CPU.SD2_CMD | M22 | NVCC_3V3 | I/O | ||
| J1.85 | SD2_CLK | CPU.SD2_CLK | L22 | NVCC_3V3 | I/O | ||
| J1.87 | DGND | DGND | - | - | G | ||
| J1.89 | UART3_TXD | CPU.UART3_TXD | B7 | NVCC_3V3 | I/O | ||
| J1.91 | UART3_RXD | CPU.UART3_RXD | A6 | NVCC_3V3 | I/O | ||
| J1.93 | UART4_TXD | CPU.UART4_TXD | D7 | NVCC_3V3 | I/O | ||
| J1.95 | UART4_RXD | CPU.UART4_RXD | C6 | NVCC_3V3 | I/O | ||
| J1.97 | SD2_WP | CPU.SD2_WP | M21 | NVCC_3V3 | I/O | ||
| J1.99 | SD2_RST_B | CPU.SD2_RESET_B | R22 | NVCC_3V3 | I/O | ||
| J1.101 | HDMI_DDC_SCL | CPU.HDMI_DDC_SCL | R3 | VDD_PHY_1V8 | I/O | ||
| J1.103 | HDMI_DDC_SDA | CPU.HDMI_DDC_SDA | P3 | VDD_PHY_1V8 | I/O | ||
| J1.105 | HDMI_AUX_N | CPU.HDMI_AUX_N | V2 | - | D | connected with capacitor in series | |
| J1.107 | HDMI_AUX_P | CPU.HDMI_AUX_P | V1 | - | D | connected with capacitor in series | |
| J1.109 | DGND | DGND | - | - | G | ||
| J1.111 | HDMI_TX_M_LN_3 | CPU.HDMI_TX_M_LN_3 | M2 | - | D | connected with capacitor in series | |
| J1.113 | HDMI_TX_P_LN_3 | CPU.HDMI_TX_P_LN_3 | M1 | - | D | connected with capacitor in series | |
| J1.115 | HDMI_TX_M_LN_0 | CPU.HDMI_TX_M_LN_0 | T2 | - | D | connected with capacitor in series | |
| J1.117 | HDMI_TX_P_LN_0 | CPU.HDMI_TX_P_LN_0 | T1 | - | D | connected with capacitor in series | |
| J1.119 | HDMI_TX_M_LN_1 | CPU.HDMI_TX_M_LN_1 | U1 | - | D | connected with capacitor in series | |
| J1.121 | HDMI_TX_P_LN_1 | CPU.HDMI_TX_P_LN_1 | U2 | - | D | connected with capacitor in series | |
| J1.123 | HDMI_TX_M_LN_2 | CPU.HDMI_TX_M_LN_2 | N1 | - | D | connected with capacitor in series | |
| J1.125 | HDMI_TX_P_LN_2 | CPU.HDMI_TX_P_LN_2 | N2 | - | D | connected with capacitor in series | |
| J1.127 | HDMI_CEC | CPU.HDMI_CEC | W3 | VDD_PHY_1V8 | I/O | ||
| J1.129 | HDMI_HPD | CPU.HDMI_HPD | W2 | VDD_PHY_1V8 | I/O | ||
| J1.131 | DGND | DGND | - | - | G | ||
| J1.133 | LVDS0_CLK_N | BRIDGE.A_CLKN | F9 | - | D | ||
| J1.135 | LVDS0_CLK_P | BRIDGE.A_CLKP | F8 | - | D | ||
| J1.137 | LVDS0_TX0_N | BRIDGE.A_Y0N | C9 | - | D | ||
| J1.139 | LVDS0_TX0_P | BRIDGE.A_Y0P | C8 | - | D | ||
| J1.141 | LVDS0_TX1_N | BRIDGE.A_Y1N | D9 | - | D | ||
| J1.143 | LVDS0_TX1_P | BRIDGE.A_Y1P | D8 | - | D | ||
| J1.145 | LVDS0_TX2_N | BRIDGE.A_Y2N | E9 | - | D | ||
| J1.147 | LVDS0_TX2_P | BRIDGE.A_Y2P | E8 | - | D | ||
| J1.149 | LVDS0_TX3_N | BRIDGE.A_Y3N | G9 | - | D | ||
| J1.151 | LVDS0_TX3_P | BRIDGE.A_Y3P | G8 | - | D | ||
| J1.153 | DGND | DGND | - | - | G | ||
| J1.155 | LVDS1_CLK_N | BRIDGE.B_CLKN | A6 | - | D | ||
| J1.157 | LVDS1_CLK_P | BRIDGE.B_CLKP | B6 | - | D | ||
| J1.159 | LVDS1_TX0_N | BRIDGE.B_Y0N | A3 | - | D | ||
| J1.161 | LVDS1_TX0_P | BRIDGE.B_Y0P | B3 | - | D | ||
| J1.163 | LVDS1_TX1_N | BRIDGE.B_Y1N | A4 | - | D | ||
| J1.165 | LVDS1_TX1_P | BRIDGE.B_Y1P | B4 | - | D | ||
| J1.167 | LVDS1_TX2_N | BRIDGE.B_Y2N | A5 | - | D | ||
| J1.169 | LVDS1_TX2_P | BRIDGE.B_Y2P | B5 | - | D | ||
| J1.171 | LVDS1_TX3_N | BRIDGE.B_Y3N | A7 | - | D | ||
| J1.173 | LVDS1_TX3_P | BRIDGE.B_Y3P | B7 | - | D | ||
| J1.175 | DGND | DGND | - | - | G | ||
| J1.177 | SD2_CD_B | CPU.SD2_CD_B | L21 | NVCC_3V3 | I/O | ||
| J1.179 | ECSPI1_SS0 | CPU.ECSPI1_SS0 | D4 | NVCC_3V3 | I/O | ||
| J1.181 | ECSPI1_SCLK | CPU.ECSPI1_SCLK | D5 | NVCC_3V3 | I/O | ||
| J1.183 | ECSPI1_MISO | CPU.ECSPI1_MISO | B4 | NVCC_3V3 | I/O | ||
| J1.185 | GPIO1_IO03 | CPU.GPIO1_IO03 | P4 | NVCC_3V3 | I/O | ||
| J1.187 | UART1_TXD | ?? | NVCC_3V3 | I/O | |||
| J1.189 | UART1_RXD | ?? | NVCC_3V3 | I/O | |||
| J1.191 | UART2_TXD | ?? | NVCC_3V3 | I/O | |||
| J1.193 | UART2_RXD | ?? | NVCC_3V3 | I/O | |||
| J1.195 | ECSPI1_MOSI | CPU.ECSPI1_MOSI | A4 | NVCC_3V3 | I/O | ||
| J1.197 | GPIO1_IO14 | CPU.GPIO1_IO14 | K7 | NVCC_3V3 | I/O | ||
| J1.199 | GPIO1_IO04 | CPU.GPIO1_IO04 | P5 | NVCC_3V3 | I/O | ||
| J1.201 | GPIO1_IO12 | CPU.GPIO1_IO12 | L7 | NVCC_3V3 | I/O | ||
| J1.203 | DGND | DGND | - | - | G |
Pinout Table EVEN pins declaration[edit | edit source]
| Pin | Pin Name | Internal Connections | Ball/pin # | Voltage|domain | Type | Notes | Alternative Functions | |
|---|---|---|---|---|---|---|---|---|
| J1.2 | ||||||||
| J1.4 | ||||||||
| J1.6 | ||||||||
| J1.8 | ||||||||
| J1.10 | ||||||||
| J1.12 | ||||||||
| J1.14 | ||||||||
| J1.16 | ||||||||
| J1.18 | ||||||||
| J1.20 | ||||||||
| J1.22 | ||||||||
| J1.24 | ||||||||
| J1.26 | ||||||||
| J1.28 | ||||||||
| J1.30 | ||||||||
| J1.32 | ||||||||
| J1.34 | ||||||||
| J1.36 | ||||||||
| J1.38 | ||||||||
| J1.40 | ||||||||
| J1.42 | ||||||||
| J1.44 | ||||||||
| J1.46 | ||||||||
| J1.48 | ||||||||
| J1.50 | ||||||||
| J1.52 | ||||||||
| J1.54 | ||||||||
| J1.56 | ||||||||
| J1.58 | ||||||||
| J1.60 | ||||||||
| J1.62 | ||||||||
| J1.64 | ||||||||
| J1.66 | ||||||||
| J1.68 | ||||||||
| J1.70 | ||||||||
| J1.72 | ||||||||
| J1.74 | ||||||||
| J1.76 | ||||||||
| J1.78 | ||||||||
| J1.80 | ||||||||
| J1.82 | ||||||||
| J1.84 | ||||||||
| J1.86 | ||||||||
| J1.88 | ||||||||
| J1.90 | ||||||||
| J1.92 | ||||||||
| J1.94 | ||||||||
| J1.96 | ||||||||
| J1.98 | ||||||||
| J1.100 | ||||||||
| J1.102 | ||||||||
| J1.104 | ||||||||
| J1.106 | ||||||||
| J1.108 | ||||||||
| J1.110 | ||||||||
| J1.112 | ||||||||
| J1.114 | ||||||||
| J1.116 | ||||||||
| J1.118 | ||||||||
| J1.120 | ||||||||
| J1.122 | ||||||||
| J1.124 | ||||||||
| J1.126 | ||||||||
| J1.128 | ||||||||
| J1.130 | ||||||||
| J1.132 | ||||||||
| J1.134 | ||||||||
| J1.136 | ||||||||
| J1.138 | ||||||||
| J1.140 | ||||||||
| J1.142 | ||||||||
| J1.144 | ||||||||
| J1.146 | ||||||||
| J1.148 | ||||||||
| J1.150 | ||||||||
| J1.152 | ||||||||
| J1.154 | ||||||||
| J1.156 | ||||||||
| J1.158 | ||||||||
| J1.160 | ||||||||
| J1.162 | ||||||||
| J1.164 | ||||||||
| J1.166 | ||||||||
| J1.168 | ||||||||
| J1.170 | ||||||||
| J1.172 | ||||||||
| J1.174 | ||||||||
| J1.176 | ||||||||
| J1.178 | ||||||||
| J1.180 | ||||||||
| J1.182 | ||||||||
| J1.184 | ||||||||
| J1.186 | ||||||||
| J1.188 | ||||||||
| J1.190 | ||||||||
| J1.192 | ||||||||
| J1.194 | ||||||||
| J1.196 | ||||||||
| J1.198 | ||||||||
| J1.200 | ||||||||
| J1.202 | ||||||||
| J1.204 | ||||||||
