Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Peripherals/Watchdog"
(Tag: Visual edit) |
|||
| Line 21: | Line 21: | ||
=== Description === | === Description === | ||
| − | By default, the Watchdog Timer of iMX8M SOC is internally used on MITO 8M for the CPU-initiated software reset function | + | {{ImportantMessage|text=By default, the Watchdog Timer of iMX8M SOC is internally used on MITO 8M for the CPU-initiated software reset function}} |
For more details see the [[MITO 8M SOM/MITO 8M Hardware/Power and Reset/Reset scheme and control signals|reset scheme and control signals]] section. | For more details see the [[MITO 8M SOM/MITO 8M Hardware/Power and Reset/Reset scheme and control signals|reset scheme and control signals]] section. | ||
Revision as of 12:04, 2 October 2020
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
|
 ONLINE HELPDESK
|
| Roadmap | IoT Services | ML/AI services | Embedded Design Services |
| History | |||
|---|---|---|---|
| Version | Issue Date | Notes | |
| 1.0.0 | Oct 2020 | First release | |
Peripheral Watchdog[edit | edit source]
The Watchdog Timer (WDOG) protects against system failures by providing a method by which to escape from unexpected events or programming errors.
Description[edit | edit source]
 By default, the Watchdog Timer of iMX8M SOC is internally used on MITO 8M for the CPU-initiated software reset function |
For more details see the reset scheme and control signals section.
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
