Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Peripherals/PCI Express"

From DAVE Developer's Wiki
Jump to: navigation, search
(Peripheral PCI Express)
Line 17: Line 17:
  
 
==Peripheral PCI Express ==
 
==Peripheral PCI Express ==
 +
PCI Express (Peripheral Component Interconnect Express''')''' is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards.
  
 
=== Description  ===
 
=== Description  ===
Line 22: Line 23:
 
The PCI Express interfaces available on MITO 8M is based on iMX8M SoC.  
 
The PCI Express interfaces available on MITO 8M is based on iMX8M SoC.  
  
The two PCIe PHY 1-lines each upports 6.0 Gbps data rate and complies to PCI Express base specification 2.1.
+
The PCI Express interfaces supports the following standards and features:
 +
* two PCIe PHY ports (1-lines each)
 +
* up to 6.0 Gbps data rate
 +
* complies to PCI Express base specification 2.1.
 +
* 8B/10B Encoding / Decoding
 +
* Supports Spread Spectrum Clocking in Transmitter and Receiver
  
 
===Pin mapping===
 
===Pin mapping===

Revision as of 14:25, 1 October 2020

History
Version Issue Date Notes
1.0.0 Oct 2020 First release


Peripheral PCI Express[edit | edit source]

PCI Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards.

Description[edit | edit source]

The PCI Express interfaces available on MITO 8M is based on iMX8M SoC.

The PCI Express interfaces supports the following standards and features:

  • two PCIe PHY ports (1-lines each)
  • up to 6.0 Gbps data rate
  • complies to PCI Express base specification 2.1.
  • 8B/10B Encoding / Decoding
  • Supports Spread Spectrum Clocking in Transmitter and Receiver

Pin mapping[edit | edit source]

The Pin mapping is described in the Pinout table section