Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Peripherals/I2C"
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=== Description === | === Description === | ||
| − | The three I2C interface available on MITO 8M is based on iMX8M SoC and it is designed to be compatible with the PhilipsTM I2C bus protocol. | + | The three I2C interface available on MITO 8M is based on iMX8M SoC and it is designed to be compatible with the PhilipsTM I2C bus protocol. |
| + | |||
| + | '''The iMX8M SOC has four I2C bus interfaces, but there is some limitation about''': | ||
* The I2C1 bus is internally used for PMIC and MIPI to LVDS bridge and it is not available | * The I2C1 bus is internally used for PMIC and MIPI to LVDS bridge and it is not available | ||
| − | See Pin mapping tables for connection details. | + | See Pin mapping tables for connection details. |
| + | |||
| + | The I2C port supports the following standards and features: | ||
*Compatibility with I2C bus standard | *Compatibility with I2C bus standard | ||
Revision as of 14:49, 7 October 2020
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Peripheral I2C[edit | edit source]
I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange, minimizing the interconnection between devices.
This bus is suitable for applications requiring occasional communications over a short distance between many devices.
Description[edit | edit source]
The three I2C interface available on MITO 8M is based on iMX8M SoC and it is designed to be compatible with the PhilipsTM I2C bus protocol.
The iMX8M SOC has four I2C bus interfaces, but there is some limitation about:
- The I2C1 bus is internally used for PMIC and MIPI to LVDS bridge and it is not available
See Pin mapping tables for connection details.
The I2C port supports the following standards and features:
- Compatibility with I2C bus standard
- Standard mode (100 kbits/s) and Fast mode (400 kbits/s) can be achieved
- Multimaster operation
- Software programmability for one of 64 different serial clock frequencies
- Software-selectable acknowledge bit
- Interrupt-driven, byte-by-byte data transfer
- Arbitration-lost interrupt with automatic mode switching from master to slave
- Calling address identification interrupt
- Start and stop signal generation/detection
- Repeated Start signal generation
- Acknowledge bit generation/detection
- Bus-busy detection
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
