Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Peripherals/GPIOs"
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Latest revision as of 17:56, 28 December 2023
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| History | |||
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| 2020/10/27 | First release | ||
Peripheral GPIOs[edit | edit source]
The GPIO general-purpose input/output peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs.
Description[edit | edit source]
When configured as an output, it is possible to write to an internal register to control the state driven on the output pin. When configured as an input, it is possible to detect the state of the input by reading the state of an internal register. In addition, the GPIO peripheral can produce CORE interrupts.
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
