Difference between revisions of "MITO 8M SOM/MITO 8M Hardware/Peripherals/Audio"
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==Peripheral Audio == | ==Peripheral Audio == | ||
| − | + | The Audio interface available on MITO 8M is based on iMX8M SoC which provides the following audio subsystems: | |
| − | + | * Synchronous Audio Interface (SAI) | |
| + | ** 6x I2S/SAI (20+ channels, each 32-bits @384 kHz) | ||
| + | * Sony/Philips Digital Interface (SPDIF) | ||
| + | ** S/PDIF Tx/Rx | ||
=== Description === | === Description === | ||
| − | + | The I2S (or I2S) module provides a synchronous audio interface (SAI) that supports full- duplex serial interfaces with frame synchronization such as I2S, AC97, TDM, and codec/DSP interfaces. It supports the following standards and features: | |
| − | The | + | * Transmitter and receiver with independent bit clock and frame sync supporting 8 data lines |
| − | + | * Each data line can support a maximum Frame size of 32 words | |
| − | + | * Asynchronous 128 x 32-bit FIFO for each transmit and receive data line | |
| − | + | * Supports packing of 8-bit and 16-bit data into each 32-bit FIFO word | |
| − | * | + | * Supports combining multiple data line FIFOs into single data line FIFO |
| − | * | + | The Sony/Philips Digital Interface (SPDIF) audio block is a stereo transceiver that allows the processor to receive and transmit digital audio. |
| − | * | ||
| − | * | ||
===Pin mapping=== | ===Pin mapping=== | ||
Revision as of 14:37, 1 October 2020
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| 1.0.0 | Oct 2020 | First release | |
Peripheral Audio[edit | edit source]
The Audio interface available on MITO 8M is based on iMX8M SoC which provides the following audio subsystems:
- Synchronous Audio Interface (SAI)
- 6x I2S/SAI (20+ channels, each 32-bits @384 kHz)
- Sony/Philips Digital Interface (SPDIF)
- S/PDIF Tx/Rx
Description[edit | edit source]
The I2S (or I2S) module provides a synchronous audio interface (SAI) that supports full- duplex serial interfaces with frame synchronization such as I2S, AC97, TDM, and codec/DSP interfaces. It supports the following standards and features:
- Transmitter and receiver with independent bit clock and frame sync supporting 8 data lines
- Each data line can support a maximum Frame size of 32 words
- Asynchronous 128 x 32-bit FIFO for each transmit and receive data line
- Supports packing of 8-bit and 16-bit data into each 32-bit FIFO word
- Supports combining multiple data line FIFOs into single data line FIFO
The Sony/Philips Digital Interface (SPDIF) audio block is a stereo transceiver that allows the processor to receive and transmit digital audio.
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
