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MITO 8M SOM/MITO 8M Hardware/General Information/Processor and memory subsystem

< MITO 8M SOM‎ | MITO 8M Hardware
Revision as of 14:00, 23 September 2020 by U0005 (talk | contribs) (Processor and memory subsystem)

History
Version Issue Date Notes
1.0.0 Sep 2020 First release


TBD: nella pagina vanno documentate le varie sezioni e documentate ad hoc a seconda del SoC (ad esempio per Bora va aggiunta la sezione PL)

Contents

Processor and memory subsystemEdit

The heart of MITO 8M module is composed by the following components:

  • i.MX8M SoC application processor
  • Power supply unit
  • LPDDR4 memory bank
  • eMMC or NAND flash banks
  • Connectors:
    • 1 x 204 pins SO-DIMM edge connector with interfaces signals
    • 2 x 25 pins One Piece mating board layout Expansion

This chapter shortly describes the main MITO 8M components.

Processor InfoEdit

Processor # Cores Clock L2

Cache

LPDDR4 GPU VPU Display

Controller

Video

Output

Camera

Input

PCIe
i.MX8M Dual 2 x Arm® Cortex®-A53

1 x Arm® Cortex®-M4

1.3 GHz

1.5 GHz

1 MB 32 bit @ 1600 MHz

(LPDDR4-3200)

4 Shader
  • OpenGL ES 1.1, 2.0, 3.0, 3.1
  • Open CL 1.2
  • Vulkan
4Kp60 HEVC/H.265 main, and main 10 decoder

4Kp60 VP9 decoder

4Kp30 AVC/H.264 decoder

1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder

Dual Independent

Display Support

up tp 4kp60

1 x HDMI 2.0a

1 x MIPI-DSI

(with MIPI to LVDS bridge)

2 x MIPI CSI

(4-lanes each)

2 x PCIe 2.0

(1-lane each)

i.MX8M Quad 4 x Arm® Cortex®-A53

1 x Arm® Cortex®-M4

Table: i.MX8M models comparison

RAM memory bankEdit

DDR3 SDRAM memory bank is composed by 4x 16-bit width chips resulting in a 64-bit combined width bank. The following table reports the SDRAM specifications:

CPU connection Multi-mode DDR controller (MMDC)
Size min 512 MB
Size max 4 GB
Width 64 bit
Speed 533 MHz

NOR flash bankEdit

NOR flash is a Serial Peripheral Interface (SPI) device. This device is connected to the eCSPI channel 5 and by default it acts as boot memory. The following table reports the NOR flash specifications:

CPU connection eCSPI channel 5
Size min 8 MB
Size max 64 MB
Chip select ECSPI5_SS0
Bootable Yes

NAND flash bankEdit

On board main storage memory is a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. Optionally, it can act as boot peripheral. The following table reports the NAND flash specifications:

CPU connection Raw NAND flash controller
Page size 512 byte, 2 kbyte or 4 kbyte
Size min 128 MB
Size max 2 GB
Width 8 bit
Chip select NANDF_CS0
Bootable Yes

eMMC flash bankEdit

CPU connection SDIO
Page size xxxxxx
Size min xxx MB
Size max xxx GB
Width xx bit
SDHC
Bootable Yes

Memory mapEdit

For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX Applications Processor Reference Manual.

Power supply unitEdit

MITO 8M embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters.