Difference between revisions of "MITO 8M Nano SOM/MITO 8M Nano Hardware/General Information/Processor and memory subsystem"

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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|13164|2021/02/24}}
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Jan 2021
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First release
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First release
 
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | 2022/10/07
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added Solo version
 
|}
 
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<section end="History" />
 
<section end="History" />
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{| class="wikitable" |  
 
{| class="wikitable" |  
 
| align="center" style="background:#f0f0f0;" |'''Processor'''
 
| align="center" style="background:#f0f0f0;" |'''Processor'''
 +
| align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Solo'''
 
| align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Dual'''
 
| align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Dual'''
 
| align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Quad'''
 
| align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Quad'''
 
|-
 
|-
 
|# Cores
 
|# Cores
 +
|1x Arm® Cortex®-A53
 +
1x Arm® Cortex®-M7
 
|2x Arm® Cortex®-A53  
 
|2x Arm® Cortex®-A53  
 
1x Arm® Cortex®-M7
 
1x Arm® Cortex®-M7
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1x Arm® Cortex®-M7
 
1x Arm® Cortex®-M7
 
|-
 
|-
−
|Clock|| colspan="2" |1.4 GHz<br>1.5 GHz
+
|Clock|| colspan="3" |1.4 GHz (Industrial)<br>1.5 GHz (Commercial)
 
|-
 
|-
 
|L2  
 
|L2  
 
Cache
 
Cache
−
| colspan="2" |1 MB
+
| colspan="3" |1 MB
 
|-
 
|-
 
|LPDDR4
 
|LPDDR4
−
| colspan="2" |16 bit @ 1600 MHz  
+
| colspan="3" |16 bit @ 1600 MHz
 
(LPDDR4-3200)
 
(LPDDR4-3200)
 
|-
 
|-
 
|GPU
 
|GPU
−
| colspan="2" |Vivante GC 7000UL (2 Shader)
+
| colspan="3" |Vivante GC 7000UL (2 Shader)
 
OpenGL ES 3.1<br>Vulkan<br>Open VG 1.1<br>Open CL 1.2
 
OpenGL ES 3.1<br>Vulkan<br>Open VG 1.1<br>Open CL 1.2
 
|-
 
|-
 
|Display  
 
|Display  
 
Controller
 
Controller
−
| colspan="2" |Dual Independent LVDS channel
+
| colspan="3" |Dual Independent LVDS channel
 
Display Support
 
Display Support
 
up to 1080p60
 
up to 1080p60
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|Video  
 
|Video  
 
Output
 
Output
−
| colspan="2" |1x MIPI-DSI (with MIPI to LVDS bridge)
+
| colspan="3" |1x MIPI-DSI (with MIPI to LVDS bridge)
 
|-
 
|-
 
|Camera  
 
|Camera  
 
Input
 
Input
−
| colspan="2" |1x MIPI CSI (4-lanes)
+
| colspan="3" |1x MIPI CSI (4-lanes)
 
|-
 
|-
 
|USB
 
|USB
−
| colspan="2" |2x USB 2.0 OTG
+
| colspan="3" |2x USB 2.0 OTG
 
|-
 
|-
 
|+ align="bottom" style="caption-side: bottom" | Table: i.MX8M Nano models comparison
 
|+ align="bottom" style="caption-side: bottom" | Table: i.MX8M Nano models comparison
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{| style="color:#000000; border:solid 2px #73B2C7; background-color:#ededed;font-size:95%; vertical-align:middle;"
 
{| style="color:#000000; border:solid 2px #73B2C7; background-color:#ededed;font-size:95%; vertical-align:middle;"
 
| [[File:TBD.png|30px]]
 
| [[File:TBD.png|30px]]
−
| '''Section not completed yet'''
+
| '''Not available yet'''
 
|}
 
|}
  
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| '''CPU connection'''||Raw NAND flash controller
 
| '''CPU connection'''||Raw NAND flash controller
 
|-
 
|-
−
| '''Page size'''|| TBD
+
| '''Page size'''|| 512 byte, 2 kbyte or 4 kbyte
 
|-
 
|-
−
| '''Size min'''||TBD
+
| '''Size min'''||512MB
 
|-
 
|-
−
| '''Size max'''||TBD
+
| '''Size max'''||2GB
 
|-
 
|-
 
| '''Width'''||8 bit  
 
| '''Width'''||8 bit  
 
|-
 
|-
−
| '''Chip select'''||TBD
+
| '''Chip select'''||NANC_CE0
 
|-
 
|-
 
| '''Bootable'''||Yes  
 
| '''Bootable'''||Yes  

Latest revision as of 19:05, 27 December 2023

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History
Issue Date Notes

2021/02/24

First release
2022/10/07 Added Solo version


Processor and memory subsystem[edit | edit source]

The heart of MITO 8M Nano module is composed by the following components:

  • i.MX8M Nano SoC application processor
  • Power supply unit
  • LPDDR4 memory bank
  • eMMC or NAND flash banks
  • Connectors:
    • 1 x 204 pins SO-DIMM edge connector with interfaces signals

This chapter shortly describes the main MITO 8M Nano components.

Processor Info[edit | edit source]

Processor i.MX8M Nano Solo i.MX8M Nano Dual i.MX8M Nano Quad
# Cores 1x Arm® Cortex®-A53

1x Arm® Cortex®-M7

2x Arm® Cortex®-A53

1x Arm® Cortex®-M7

4x Arm® Cortex®-A53

1x Arm® Cortex®-M7

Clock 1.4 GHz (Industrial)
1.5 GHz (Commercial)
L2

Cache

1 MB
LPDDR4 16 bit @ 1600 MHz

(LPDDR4-3200)

GPU Vivante GC 7000UL (2 Shader)

OpenGL ES 3.1
Vulkan
Open VG 1.1
Open CL 1.2

Display

Controller

Dual Independent LVDS channel

Display Support up to 1080p60

Video

Output

1x MIPI-DSI (with MIPI to LVDS bridge)
Camera

Input

1x MIPI CSI (4-lanes)
USB 2x USB 2.0 OTG
Table: i.MX8M Nano models comparison

RAM memory bank[edit | edit source]

LPDD4 SDRAM memory bank is composed by 1x 16-bit width chip. The following table reports the SDRAM specifications:

CPU connection Multi-mode DDR controller (MMDC)
Size max 4 GB
Width 16 bit
Speed 1600 MHz

eMMC flash bank[edit | edit source]

On board main storage memory eMMC is connected to the SDIO1 interface and it can act as boot peripheral. The following table reports the eMMC flash specifications:

CPU connection SDIO1
Size min 4 GB
Size max 64 GB
Bootable Yes

NAND flash bank[edit | edit source]

TBD.png Not available yet

Alternative option for main storage memory can be a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. It can act as boot peripheral. The following table reports the NAND flash specifications:

CPU connection Raw NAND flash controller
Page size 512 byte, 2 kbyte or 4 kbyte
Size min 512MB
Size max 2GB
Width 8 bit
Chip select NANC_CE0
Bootable Yes

Memory map[edit | edit source]

For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX8M Nano Applications Processor Reference Manual

Power supply unit[edit | edit source]

MITO 8M Nano embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters.

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