Integration guide (Maya)

Contents

Carrier board specific design guidelinesEdit

Please refer first to Carrier board design guidelines.
In this section hardware guidelines valid for MAYA are analized. The information provided here complete the Carrier board design guidelines for some specific interfaces.

Interfaces GuidelinesEdit

For interfaces not mentioned in this section, refer to the generic guidelines.

USBEdit

PCBEdit

Table listeb below integrated the general basic guidelines table

Parameter for USB Differential Pairs	Min	Typ	Max
Max traces length	-	-	17"

LCD InterfaceEdit

PCBEdit

• Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
• Place series terminator near Maya Connector

VIN InterfaceEdit

PCBEdit

• Matching depends from Pixel Clock. As general rule, match lines at 500-800 mils
• Place series terminator near VIN source

RMII InterfaceEdit

SchematicEdit

• use a standard RMII PHY device that support 50MHz Clock input mode
• Set PHY address different from integrated PHY