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[['''''Reference project with I2C glitch filter implemented in FPGA is available on request.'']]'''
→How to implement workaround suggested by Xilinx on BoraEVB
==== How to implement workaround suggested by Xilinx on BoraEVB====
This project, built with Vivado 2014.4, is based on the default project for BELK (BORA rev.B and BORAevb rev.A).
