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Integration guide (Bora/BoraX/BoraLite)

79 bytes added, 17:26, 5 February 2015
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How to implement workaround suggested by Xilinx on BoraEVB
==== How to implement workaround suggested by Xilinx on BoraEVB====
'''''Reference Plase note that the reference project with I2C glitch filter implemented in FPGA is available on request.'''Plase contact [mailto:support-bora@dave.eu support-bora@dave.eu]''
This project, built with Vivado 2014.4, is based on the default project for BELK (BORA rev.B and BORAevb rev.A).

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