Difference between revisions of "ETRA SOM/ETRA Hardware/Power and Reset/JTAG"

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<section begin="Body" />
  
 
==On board JTAG connector==
 
==On board JTAG connector==
  
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''TBD: sostituire con le informazioni del connettore e del pinout''
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JTAG signals are routed to the primary ETRA connector J1, see the [[ETRA SOM/ETRA Hardware/Pinout Table|Connectors and Pinout Table]]
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JTAG signals are routed to a dedicated connector on the ETRA PCB.
 
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The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).
 
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[[File:ETRA-jtag-conn.png|500px|frameless|border]]
 
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== ''TBD:CONN-REF'' - Connector's pinout ==
 
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''TBD:CONN-REF'' footprint mates with ''TBD:CONN-TYPE'' connector. The following table reports the connector's pinout:
 
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{| class="wikitable"
 
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!Pin#
 
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!Pin name
 
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!Function
 
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!Notes
 
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|1 || DGND || - || -
 
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|2 || JTAG_TCK || - || -
 
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|3 || JTAG_TMS || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
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|4 || JTAG_TDO || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
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|5 || JTAG_TDI || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
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|6 || JTAG_nTRST || - || 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
 
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|7 || CPU_PORn || - || -
 
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|8 || N.C. || - || -
 
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|9 || N.C. || - || -
 
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|10 || JTAG_VREF || - || 3V3 (BOARD_PGOOD driven signal)
 
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[[Category:ETRA]]
 
[[Category:ETRA]]

Revision as of 08:29, 30 December 2020

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History
Version Issue Date Notes
0.9.0 Dec 2020 First Draft
[TBD_link X.Y.Z] Month Year TBD
... ... ...


On board JTAG connector[edit | edit source]

JTAG signals are routed to the primary ETRA connector J1, see the Connectors and Pinout Table

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