Difference between revisions of "ETRA SOM/ETRA Hardware/Pinout Table"

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(Add alternate function for EVEN pins)
(Add pinout notes for internal use)
Line 20: Line 20:
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
 
|-
 
|-
−
|}
+
|}<section end="History" /><section begin="Body" />
−
<section end="History" />
 
−
<section begin="Body" />
 
−
''TBD:  modificare la tabella seguente con le caratteristiche dei pin del SOM''
 
−
 
 
−
''TBD:  modificare le due tabelle ODD e EVEN con la mappa completa dei pins''
 
−
 
 
−
'''TBD:  nella tabella naming conventions,  inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)'''
 
  
 
==Connectors and Pinout Table==
 
==Connectors and Pinout Table==
Line 52: Line 45:
 
===Pinout table naming conventions ===
 
===Pinout table naming conventions ===
  
−
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the ''TBD: connector type'' ETRA connector.
+
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the SODIMM-DDR3 ETRA connector.
  
 
Each row in the pinout tables contains the following information:
 
Each row in the pinout tables contains the following information:
Line 299: Line 292:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |
+
| rowspan="10" |internally used for
 +
 
 +
NAND flash
 
|Pin AF2
 
|Pin AF2
 
|I2C6_SCL
 
|I2C6_SCL
Line 325: Line 320:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD3/FMC_D3
+
|'''FMC_AD3/FMC_D3'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 336: Line 331:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
NAND flash
 
|Pin AF6
 
|Pin AF6
 
|SAI3_FS_A
 
|SAI3_FS_A
Line 350: Line 346:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_NOE
+
|'''FMC_NOE'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 361: Line 357:
 
| rowspan="4" |VDD
 
| rowspan="4" |VDD
 
| rowspan="4" |I/O
 
| rowspan="4" |I/O
−
| rowspan="4" |TBD
+
| rowspan="4" |internally used for
 +
NAND flash
 
|Pin AF7
 
|Pin AF7
 
|USART2_TX
 
|USART2_TX
Line 369: Line 366:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_NWE
+
|'''FMC_NWE'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 380: Line 377:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED6
 
|TRACED6
Line 414: Line 411:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |internally used for
 +
NAND flash
 
|Pin AF2
 
|Pin AF2
 
|I2C6_SDA
 
|I2C6_SDA
Line 440: Line 438:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD2/FMC_D2
+
|'''FMC_AD2/FMC_D2'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 451: Line 449:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED7
 
|TRACED7
Line 482: Line 480:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |internally used for
 +
NOR flash
 
|Pin AF1
 
|Pin AF1
 
|TIM16_BKIN
 
|TIM16_BKIN
Line 496: Line 495:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|QUADSPI_CLK
+
|'''QUADSPI_CLK'''
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
Line 516: Line 515:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |internally used for
 +
NAND flash
 
|Pin AF1
 
|Pin AF1
 
|TIM1_ETR
 
|TIM1_ETR
Line 533: Line 533:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD4/FMC_D4
+
|'''FMC_AD4/FMC_D4'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 544: Line 544:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
NAND flash
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH1N
 
|TIM1_CH1N
Line 558: Line 559:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD5/FMC_D5
+
|'''FMC_AD5/FMC_D5'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 599: Line 600:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |internally used for
 +
eMMC flash
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2N
 
|TIM1_CH2N
Line 622: Line 624:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D0
+
|'''SDMMC2_D0'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 633: Line 635:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |internally used for
 +
eMMC flash
 
|Pin AF0
 
|Pin AF0
 
|RTC_REFIN
 
|RTC_REFIN
Line 656: Line 659:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D1
+
|'''SDMMC2_D1'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 667: Line 670:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |internally used for
 +
eMMC flash
 
|Pin AF0
 
|Pin AF0
 
|TRACED9
 
|TRACED9
Line 687: Line 691:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D2
+
|'''SDMMC2_D2'''
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
Line 704: Line 708:
 
| rowspan="12" |VDD
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |I/O
−
| rowspan="12" |TBD
+
| rowspan="12" |internally used for
 +
eMMC flash
 
|Pin AF0
 
|Pin AF0
 
|TRACED8
 
|TRACED8
Line 730: Line 735:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D3
+
|'''SDMMC2_D3'''
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
Line 747: Line 752:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
eMMC flash
 
|Pin AF0
 
|Pin AF0
 
|TRACED14
 
|TRACED14
Line 755: Line 761:
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|SDMMC2_CMD
+
|'''SDMMC2_CMD'''
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
Line 772: Line 778:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
eMMC flash
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 783: Line 790:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_CK
+
|'''SDMMC2_CK'''
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
Line 807: Line 814:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 841: Line 848:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
−
| rowspan="11" |TBD
+
| rowspan="11" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED1
 
|TRACED1
Line 881: Line 888:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |for LCD_G1
 +
use pin J1.180
 +
 
 +
(RGB lenght match)
 
|Pin AF0
 
|Pin AF0
 
|TRACED2
 
|TRACED2
Line 927: Line 937:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED3
 
|TRACED3
Line 964: Line 974:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |
 
|Pin AF2
 
|Pin AF2
 
|TIM3_ETR
 
|TIM3_ETR
Line 992: Line 1,002:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF0
 
|Pin AF0
 
|TRACECLK
 
|TRACECLK
Line 1,039: Line 1,049:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_CKIN3
 
|DFSDM1_CKIN3
Line 1,067: Line 1,077:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_DATIN3
 
|DFSDM1_DATIN3
Line 1,095: Line 1,105:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
I/O EXP interrupt
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_CKIN1
 
|DFSDM1_CKIN1
Line 1,124: Line 1,135:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF1
 
|Pin AF1
 
|TIM2_CH1/TIM2_ETR
 
|TIM2_CH1/TIM2_ETR
Line 1,163: Line 1,174:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_OUT
 
|LPTIM1_OUT
Line 1,209: Line 1,220:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |internally used for
 +
NAND flash
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_IN1
 
|LPTIM1_IN1
Line 1,235: Line 1,247:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_A17/FMC_ALE
+
|'''FMC_A17/FMC_ALE'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 1,246: Line 1,258:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |internally used for
 +
NAND flash
 
|Pin AF3
 
|Pin AF3
 
|LPTIM2_IN2
 
|LPTIM2_IN2
Line 1,266: Line 1,279:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_A16/FMC_CLE
+
|'''FMC_A16/FMC_CLE'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 1,287: Line 1,300:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |internally used for
 +
NAND flash
 
|Pin AF0
 
|Pin AF0
 
|DBTRGO
 
|DBTRGO
Line 1,304: Line 1,318:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_NE2/FMC_NCE
+
|'''FMC_NE2/FMC_NCE'''
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
Line 1,451: Line 1,465:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 7
 
|Keypad row 7
Line 1,464: Line 1,478:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 6
 
|Keypad row 6
Line 1,477: Line 1,491:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 5
 
|Keypad row 5
Line 1,490: Line 1,504:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 4
 
|Keypad row 4
Line 1,506: Line 1,520:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 3
 
|Keypad row 3
Line 1,528: Line 1,542:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 2
 
|Keypad row 2
Line 1,544: Line 1,558:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 1
 
|Keypad row 1
Line 1,560: Line 1,574:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 0
 
|Keypad row 0
Line 1,576: Line 1,590:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 0
 
|Keypad column 0
Line 1,589: Line 1,603:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 1
 
|Keypad column 1
Line 1,612: Line 1,626:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 2
 
|Keypad column 2
Line 1,625: Line 1,639:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 3
 
|Keypad column 3
Line 1,638: Line 1,652:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 4
 
|Keypad column 4
Line 1,654: Line 1,668:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 5
 
|Keypad column 5
Line 1,667: Line 1,681:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 6
 
|Keypad column 6
Line 1,689: Line 1,703:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 7
 
|Keypad column 7
Line 1,705: Line 1,719:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 8
 
|Keypad column 8
Line 1,721: Line 1,735:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
−
| rowspan="3" |TBD
+
| rowspan="3" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 9
 
|Keypad column 9
Line 1,737: Line 1,751:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
−
| rowspan="2" |TBD
+
| rowspan="2" |
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 10
 
|Keypad column 10
Line 1,770: Line 1,784:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
NAND flash
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH1
 
|TIM1_CH1
Line 1,784: Line 1,799:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD6/FMC_D6
+
|'''FMC_AD6/FMC_D6'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 1,795: Line 1,810:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |internally used for
 +
I/O EXP reset
 
|Pin AF0
 
|Pin AF0
 
|TRACECLK
 
|TRACECLK
Line 1,819: Line 1,835:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
−
| rowspan="11" |TBD
+
| rowspan="11" |internally used for
 +
NAND flash
 
|Pin AF1
 
|Pin AF1
 
|TIM16_CH1N
 
|TIM16_CH1N
Line 1,842: Line 1,859:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_NWAIT
+
|'''FMC_NWAIT'''
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
Line 1,859: Line 1,876:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
NAND flash
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2N
 
|TIM1_CH2N
Line 1,873: Line 1,891:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD7/FMC_D7
+
|'''FMC_AD7/FMC_D7'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 1,894: Line 1,912:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED11
 
|TRACED11
Line 1,931: Line 1,949:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
−
| rowspan="11" |TBD
+
| rowspan="11" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED4
 
|TRACED4
Line 1,971: Line 1,989:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_IN2
 
|LPTIM1_IN2
Line 1,999: Line 2,017:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_ETR
 
|LPTIM1_ETR
Line 2,036: Line 2,054:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |internally used for
 +
LAN PHY interrupt
 
|Pin AF0
 
|Pin AF0
 
|TRACECLK
 
|TRACECLK
Line 2,074: Line 2,093:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |internally used for
 +
LAN PHY reset
 
|Pin AF0
 
|Pin AF0
 
|DBTRGO
 
|DBTRGO
Line 2,096: Line 2,116:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |internally used for
 +
NAND flash
 
|Pin AF2
 
|Pin AF2
 
|TIM4_CH3
 
|TIM4_CH3
Line 2,107: Line 2,128:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD0/FMC_D0
+
|'''FMC_AD0/FMC_D0'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 2,118: Line 2,139:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |internally used for
 +
NAND flash
 
|Pin AF2
 
|Pin AF2
 
|TIM4_CH4
 
|TIM4_CH4
Line 2,129: Line 2,151:
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|FMC_AD1/FMC_D1
+
|'''FMC_AD1/FMC_D1'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 2,254: Line 2,276:
 
|VDD
 
|VDD
 
|I
 
|I
−
|internall pull-up or pull-down
+
|internal pull-up or pull-down
 
according to specific model
 
according to specific model
 
|
 
|
Line 2,285: Line 2,307:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|internal 10k pull-up to VDD
 
|
 
|
 
|
 
|
Line 2,295: Line 2,317:
 
|VDD
 
|VDD
 
|I
 
|I
−
|internall pull-up or pull-down
+
|internal pull-up or pull-down
 
according to specific model
 
according to specific model
 
|
 
|
Line 2,306: Line 2,328:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2
 
|TIM1_CH2
Line 2,360: Line 2,382:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH1N
 
|TIM1_CH1N
Line 2,403: Line 2,425:
 
|VDD
 
|VDD
 
|I
 
|I
−
|internall pull-up or pull-down
+
|internal pull-up or pull-down
 
according to specific model
 
according to specific model
 
|
 
|
Line 2,414: Line 2,436:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH4
 
|TIM1_CH4
Line 2,449: Line 2,471:
 
C4
 
C4
 
|VDD
 
|VDD
−
|I
+
|I/O
 
|internal pull-up to VDD
 
|internal pull-up to VDD
 
|
 
|
Line 2,460: Line 2,482:
 
| rowspan="12" |VDD
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |I/O
−
| rowspan="12" |TBD
+
| rowspan="12" |internally used for
 +
PMIC I2C
 
|Pin AF1
 
|Pin AF1
 
|TIM16_CH1N
 
|TIM16_CH1N
Line 2,468: Line 2,491:
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
−
|I2C1_SCL
+
|'''I2C1_SCL'''
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
Line 2,503: Line 2,526:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |internally used for
 +
PMIC I2C
 
|Pin AF1
 
|Pin AF1
 
|TIM17_CH1N
 
|TIM17_CH1N
Line 2,511: Line 2,535:
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
−
|I2C1_SDA
+
|'''I2C1_SDA'''
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
Line 2,540: Line 2,564:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH4
 
|TIM1_CH4
Line 2,574: Line 2,598:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_ETR
 
|TIM1_ETR
Line 2,648: Line 2,672:
 
| rowspan="4" |VDD
 
| rowspan="4" |VDD
 
| rowspan="4" |I/O
 
| rowspan="4" |I/O
−
| rowspan="4" |TBD
+
| rowspan="4" |
 
|Pin AF0
 
|Pin AF0
 
|DBTRGO
 
|DBTRGO
Line 2,697: Line 2,721:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
−
| rowspan="11" |TBD
+
| rowspan="11" |
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_IN1
 
|LPTIM1_IN1
Line 2,737: Line 2,761:
 
| rowspan="16" |VDD
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |I/O
−
| rowspan="16" |TBD
+
| rowspan="16" |
 
|Pin AF0
 
|Pin AF0
 
|ETH_CLK
 
|ETH_CLK
Line 2,792: Line 2,816:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED15
 
|TRACED15
Line 2,838: Line 2,862:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |
 
|Pin AF0
 
|Pin AF0
 
|MCO1
 
|MCO1
Line 2,884: Line 2,908:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
−
| rowspan="6" |TBD
+
| rowspan="6" |internally used for
 +
NOR flash
 
|Pin AF1
 
|Pin AF1
 
|TIM17_CH1
 
|TIM17_CH1
Line 2,909: Line 2,934:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |internally used for
 +
NOR flash
 
|Pin AF0
 
|Pin AF0
 
|TRACED13
 
|TRACED13
Line 2,929: Line 2,955:
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|QUADSPI_BK1_IO1
+
|'''QUADSPI_BK1_IO1'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 2,940: Line 2,966:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |internally used for
 +
NOR flash
 
|Pin AF0
 
|Pin AF0
 
|TRACED12
 
|TRACED12
Line 2,960: Line 2,987:
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|QUADSPI_BK1_IO0
+
|'''QUADSPI_BK1_IO0'''
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 2,971: Line 2,998:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |internally used for
 +
NOR flash
 
|Pin AF1
 
|Pin AF1
 
|TIM16_CH1
 
|TIM16_CH1
Line 3,039: Line 3,067:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|
 
|
 
|
 
|
 
|
Line 3,049: Line 3,077:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|
 
|
 
|
 
|
 
|
Line 3,059: Line 3,087:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|
 
|
 
|
 
|
 
|
Line 3,069: Line 3,097:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|
 
|
 
|
 
|
 
|
Line 3,079: Line 3,107:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|
 
|
 
|
 
|
 
|
Line 3,209: Line 3,237:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF0
 
|Pin AF0
 
|HDP2
 
|HDP2
Line 3,243: Line 3,271:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
Line 3,253: Line 3,281:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
−
| rowspan="11" |TBD
+
| rowspan="11" |
 
|Pin AF0
 
|Pin AF0
 
|HDP0
 
|HDP0
Line 3,293: Line 3,321:
 
| rowspan="14" |VDD
 
| rowspan="14" |VDD
 
| rowspan="14" |I/O
 
| rowspan="14" |I/O
−
| rowspan="14" |TBD
+
| rowspan="14" |internally used for
 +
eMMC flash
 +
 
 +
(when configured as
 +
 
 +
8 bit SDMMC BUS)
 
|Pin AF0
 
|Pin AF0
 
|HDP1
 
|HDP1
Line 3,319: Line 3,352:
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|SDMMC2_D6
+
|'''SDMMC2_D6'''
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
Line 3,342: Line 3,375:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED5
 
|TRACED5
Line 3,376: Line 3,409:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED10
 
|TRACED10
Line 3,410: Line 3,443:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF0
 
|Pin AF0
 
|RTC_REFIN
 
|RTC_REFIN
Line 3,447: Line 3,480:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH3N
 
|TIM1_CH3N
Line 3,478: Line 3,511:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM2_CH4
 
|TIM2_CH4
Line 3,514: Line 3,547:
 
| rowspan="16" |VDD
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |I/O
−
| rowspan="16" |TBD
+
| rowspan="16" |
 
|Pin AF0
 
|Pin AF0
 
|HDP6
 
|HDP6
Line 3,573: Line 3,606:
 
| rowspan="16" |VDD
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |I/O
−
| rowspan="16" |TBD
+
| rowspan="16" |
 
|Pin AF0
 
|Pin AF0
 
|HDP7
 
|HDP7
Line 3,638: Line 3,671:
 
| rowspan="12" |VDD
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |I/O
−
| rowspan="12" |TBD
+
| rowspan="12" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_BKIN
 
|TIM1_BKIN
Line 3,681: Line 3,714:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2
 
|TIM1_CH2
Line 3,715: Line 3,748:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF1
 
|Pin AF1
 
|TIM2_CH3
 
|TIM2_CH3
Line 3,754: Line 3,787:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |
 
|Pin AF5
 
|Pin AF5
 
|SPI5_MOS
 
|SPI5_MOS
Line 3,776: Line 3,809:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |
 
|Pin AF0
 
|Pin AF0
 
|HDP4
 
|HDP4
Line 3,822: Line 3,855:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |internally used for
 +
eMMC flash
 +
 
 +
(when configured as
 +
 
 +
8 bit SDMMC BUS)
 
|Pin AF0
 
|Pin AF0
 
|HDP5
 
|HDP5
Line 3,842: Line 3,880:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D7
+
|'''SDMMC2_D7'''
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
Line 3,868: Line 3,906:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
−
| rowspan="11" |TBD
+
| rowspan="11" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED2
 
|TRACED2
Line 3,908: Line 3,946:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
−
| rowspan="10" |TBD
+
| rowspan="10" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2N
 
|TIM1_CH2N
Line 3,959: Line 3,997:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |
 
|Pin AF1
 
|Pin AF1
 
|TIM2_CH1/TIM2_ETR
 
|TIM2_CH1/TIM2_ETR
Line 3,990: Line 4,028:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
−
| rowspan="7" |TBD
+
| rowspan="7" |
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_CKIN0
 
|DFSDM1_CKIN0
Line 4,018: Line 4,056:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH3N
 
|TIM1_CH3N
Line 4,056: Line 4,094:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
−
| rowspan="9" |TBD
+
| rowspan="9" |
 
|Pin AF0
 
|Pin AF0
 
|HDP3
 
|HDP3
Line 4,090: Line 4,128:
 
| rowspan="14" |VDD
 
| rowspan="14" |VDD
 
| rowspan="14" |I/O
 
| rowspan="14" |I/O
−
| rowspan="14" |TBD
+
| rowspan="14" |internally used for
 +
eMMC flash
 +
 
 +
(when configured as
 +
 
 +
8 bit SDMMC BUS)
 
|Pin AF0
 
|Pin AF0
 
|TRACED1
 
|TRACED1
Line 4,116: Line 4,159:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D4
+
|'''SDMMC2_D4'''
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
Line 4,139: Line 4,182:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
−
| rowspan="8" |TBD
+
| rowspan="8" |
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH3
 
|TIM1_CH3
Line 4,170: Line 4,213:
 
| rowspan="14" |VDD
 
| rowspan="14" |VDD
 
| rowspan="14" |I/O
 
| rowspan="14" |I/O
−
| rowspan="14" |TBD
+
| rowspan="14" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED3
 
|TRACED3
Line 4,219: Line 4,262:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
−
| rowspan="13" |TBD
+
| rowspan="13" |for SDMMC1_D2
 +
use pin J1.79
 +
 
 +
(SDMMC lenght match)
 
|Pin AF0
 
|Pin AF0
 
|TRACED2
 
|TRACED2
Line 4,265: Line 4,311:
 
| rowspan="12" |VDD
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |I/O
−
| rowspan="12" |TBD
+
| rowspan="12" |
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 4,314: Line 4,360:
 
| rowspan="16" |VDD
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |I/O
−
| rowspan="16" |TBD
+
| rowspan="16" |internally used for
 +
eMMC flash
 +
 
 +
(when configured as
 +
 
 +
8 bit SDMMC BUS)
 
|Pin AF0
 
|Pin AF0
 
|DBTRGI
 
|DBTRGI
Line 4,343: Line 4,394:
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|SDMMC2_D5
+
|'''SDMMC2_D5'''
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
Line 4,369: Line 4,420:
 
|VBUS_OTG_IN
 
|VBUS_OTG_IN
 
|S
 
|S
−
|TBD
+
|
 
|
 
|
 
|
 
|
Line 4,379: Line 4,430:
 
|VBUS_SW
 
|VBUS_SW
 
|S
 
|S
−
|TBD
+
|
 
|
 
|
 
|
 
|

Revision as of 10:15, 29 December 2020

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History
Version Issue Date Notes
0.9.0 Dec 2020 First Draft
[TBD_link X.Y.Z] Month Year TBD
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Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ETRA:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR3 edge connector 204 pin TE Connectivity 2-2013289-1

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:

File:ETRA-top.png
ETRA TOP view
File:ETRA-bottom.png
ETRA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the SODIMM-DDR3 ETRA connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ETRA connectors
Internal
connections 		Connections to the ETRA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • PMIC.<x> : pin connected to the Power Manager IC STPMIC1APQR
  • LAN.<x> : pin connected to the LAN PHY KSZ8091RNAIA
  • NOR.<x>: pin connected to the flash NOR
  • NAND.<x>: pin connected to the flash NAND
  • eMMC.<x>: pin connected to the flash eMMC
  • EXP.<x>: pin connected to the I/O EXPANDER ADP5589ACPZ
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 DGND DGND - - G
J1.3 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.5 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.7 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.9 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.11 DGND DGND - - G
J1.13 ETH_LED LAN.LED0/PME_N1 23 VDD I/O
J1.15 - NC - - -
J1.17 DGND DGND - - G
J1.19 ETH_TX_P LAN.TXP 6 - D
J1.21 ETH_TX_M LAN.TXM 5 - D
J1.23 ETH_RX_P LAN.RXP 4 - D
J1.25 ETH_RX_M LAN.RXM 3 - D
J1.27 LDO2 PMIC.LDO2OUT 18 LDO2 S Spare LDO output
J1.29 LDO5 PMIC.LDO5OUT 20 LDO5 S Spare LDO output
J1.31 - NC - - -
J1.33 - NC - - -
J1.35 DGND DGND - - G
J1.37 PD1 CPU.PD1 A4 VDD I/O internally used for

NAND flash

Pin AF2 I2C6_SCL
Pin AF3 DFSDM1_DATIN6
Pin AF4 I2C5_SCL
Pin AF6 SAI3_SD_A
Pin AF8 UART4_TX
Pin AF9 FDCAN1_TX
Pin AF10 SDMMC3_D0
Pin AF11 DFSDM1_CKIN7
Pin AF12 FMC_AD3/FMC_D3
Pin AF15 EVENTOUT
J1.39 PD4 CPU.PD4 D6 VDD I/O internally used for

NAND flash

Pin AF6 SAI3_FS_A
Pin AF7 USART2_RTS/USART2_DE
Pin AF10 SDMMC3_D1
Pin AF11 DFSDM1_CKIN0
Pin AF12 FMC_NOE
Pin AF15 EVENTOUT
J1.41 PD5 CPU.PD5 D7 VDD I/O internally used for

NAND flash

Pin AF7 USART2_TX
Pin AF10 SDMMC3_D2
Pin AF12 FMC_NWE
Pin AF15 EVENTOUT
J1.43 PD7 CPU.PD7 B4 VDD I/O Pin AF0 TRACED6
Pin AF3 DFSDM1_DATIN4
Pin AF4 I2C2_SCL
Pin AF6 DFSDM1_CKIN1
Pin AF7 USART2_CK
Pin AF9 SPDIFRX_IN1
Pin AF10 SDMMC3_D3
Pin AF12 FMC_NE1
Pin AF15 EVENTOUT
J1.45 PD0 CPU.PD0 A3 VDD I/O internally used for

NAND flash

Pin AF2 I2C6_SDA
Pin AF3 DFSDM1_CKIN6
Pin AF4 I2C5_SDA
Pin AF6 SAI3_SCK_A
Pin AF8 UART4_RX
Pin AF9 FDCAN1_RX
Pin AF10 SDMMC3_CMD
Pin AF11 DFSDM1_DATIN7
Pin AF12 FMC_AD2/FMC_D2
Pin AF15 EVENTOUT
J1.47 PG15 CPU.PG15 A2 VDD I/O Pin AF0 TRACED7
Pin AF2 SAI1_D2
Pin AF4 I2C2_SDA
Pin AF6 SAI1_FS_A
Pin AF7 USART6_CTS/USART6_NSS
Pin AF10 SDMMC3_CK
Pin AF13 DCMI_D13
Pin AF15 EVENTOUT
J1.49 PF10 CPU.PF10 U9 VDD I/O internally used for

NOR flash

Pin AF1 TIM16_BKIN
Pin AF2 SAI1_D3
Pin AF3 SAI4_D4
Pin AF6 SAI1_D4
Pin AF9 QUADSPI_CLK
Pin AF12 SAI4_D3
Pin AF13 DCMI_D11
Pin AF14 LCD_DE
Pin AF15 EVENTOUT
J1.51 PE7 CPU.PE7 T10 VDD I/O internally used for

NAND flash

Pin AF1 TIM1_ETR
Pin AF2 TIM3_ETR
Pin AF3 DFSDM1_DATIN2
Pin AF7 UART7_RX
Pin AF10 QUADSPI_BK2_IO0
Pin AF12 FMC_AD4/FMC_D4
Pin AF15 EVENTOUT
J1.53 PE8 CPU.PE8 T11 VDD I/O internally used for

NAND flash

Pin AF1 TIM1_CH1N
Pin AF3 DFSDM1_CKIN2
Pin AF7 UART7_TX
Pin AF10 QUADSPI_BK2_IO1
Pin AF12 FMC_AD5/FMC_D5
Pin AF15 EVENTOUT
J1.55 - NC - - -
J1.57 DGND DGND - - G
J1.59 - NC - - -
J1.61 PB14 CPU.PB14 C9 VDD I/O internally used for

eMMC flash

Pin AF1 TIM1_CH2N
Pin AF2 TIM12_CH1
Pin AF3 TIM8_CH2N
Pin AF4 USART1_TX
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_DATIN2
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 SDMMC2_D0
Pin AF15 EVENTOUT
J1.63 PB15 CPU.PB15 A8 VDD I/O internally used for

eMMC flash

Pin AF0 RTC_REFIN
Pin AF1 TIM1_CH3N
Pin AF2 TIM12_CH2
Pin AF3 TIM8_CH3N
Pin AF4 USART1_RX
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF6 DFSDM1_CKIN2
Pin AF9 SDMMC2_D1
Pin AF15 EVENTOUT
J1.65 PB3 CPU.PB3 A7 VDD I/O internally used for

eMMC flash

Pin AF0 TRACED9
Pin AF1 TIM2_CH2
Pin AF4 SAI4_CK1
Pin AF5 SPI1_SCK/I2S1_CK
Pin AF6 SPI3_SCK/I2S3_CK
Pin AF8 SPI6_SCK
Pin AF9 SDMMC2_D2
Pin AF12 SAI4_MCLK_A
Pin AF13 UART7_RX
Pin AF15 EVENTOUT
J1.67 PB4 CPU.PB4 B9 VDD I/O internally used for

eMMC flash

Pin AF0 TRACED8
Pin AF1 TIM16_BKIN
Pin AF2 TIM3_CH1
Pin AF4 SAI4_CK2
Pin AF5 SPI1_MISO/I2S1_SDI
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 SPI2_NSS/I2S2_WS
Pin AF8 SPI6_MISO
Pin AF9 SDMMC2_D3
Pin AF12 SAI4_SCK_A
Pin AF13 UART7_TX
Pin AF15 EVENTOUT
J1.69 PG6 CPU.PG6 A6 VDD I/O internally used for

eMMC flash

Pin AF0 TRACED14
Pin AF1 TIM17_BKIN
Pin AF10 SDMMC2_CMD
Pin AF13 DCMI_D12
Pin AF14 LCD_R7
Pin AF15 EVENTOUT
J1.71 PE3 CPU.PE3 A5 VDD I/O internally used for

eMMC flash

Pin AF0 TRACED0
Pin AF4 TIM15_BKIN
Pin AF6 SAI1_SD_B
Pin AF9 SDMMC2_CK
Pin AF12 FMC_A19
Pin AF15 EVENTOUT
J1.73 DGND DGND - - G
J1.75 PC8 CPU.PC8 C11 VDD I/O Pin AF0 TRACED0
Pin AF2 TIM3_CH3
Pin AF3 TIM8_CH3
Pin AF6 UART4_TX
Pin AF7 USART6_CK
Pin AF8 UART5_RTS/UART5_DE
Pin AF12 SDMMC1_D0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.77 PC9 CPU.PC9 A10 VDD I/O Pin AF0 TRACED1
Pin AF2 TIM3_CH4
Pin AF3 TIM8_CH4
Pin AF4 I2C3_SDA
Pin AF5 I2S_CKIN
Pin AF8 UART5_CTS
Pin AF9 QUADSPI_BK1_IO0
Pin AF12 SDMMC1_D1
Pin AF13 DCMI_D3
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.79 PE6 CPU.PE6 B3 VDD I/O for LCD_G1

use pin J1.180

(RGB lenght match)

Pin AF0 TRACED2
Pin AF1 TIM1_BKIN2
Pin AF2 SAI1_D1
Pin AF4 TIM15_CH2
Pin AF5 SPI4_MOSI
Pin AF6 SAI1_SD_A
Pin AF7 SDMMC2_D0
Pin AF8 SDMMC1_D2
Pin AF10 SAI2_MCLK_B
Pin AF12 FMC_A22
Pin AF13 DCMI_D7
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.81 PC11 CPU.PC11 A11 VDD I/O Pin AF0 TRACED3
Pin AF3 DFSDM1_DATIN5
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 USART3_RX
Pin AF8 UART4_RX
Pin AF9 QUADSPI_BK2_NCS
Pin AF10 SAI4_SCK_B
Pin AF12 SDMMC1_D3
Pin AF13 DCMI_D4
Pin AF15 EVENTOUT
J1.83 PD2 CPU.PD2 B10 VDD I/O Pin AF2 TIM3_ETR
Pin AF4 I2C5_SMBA
Pin AF6 UART4_RX
Pin AF8 UART5_RX
Pin AF12 SDMMC1_CMD
Pin AF13 DCMI_D11
Pin AF15 EVENTOUT
J1.85 PC12 CPU.PC12 C10 VDD I/O Pin AF0 TRACECLK
Pin AF1 MCO2
Pin AF2 SAI4_D3
Pin AF6 SPI3_MOSI/I2S3_SDO
Pin AF7 USART3_CK
Pin AF8 UART5_TX
Pin AF10 SAI4_SD_B
Pin AF12 SDMMC1_CK
Pin AF13 DCMI_D9
Pin AF15 EVENTOUT
J1.87 DGND DGND - - G
J1.89 PD8 CPU.PD8 F2 VDD I/O Pin AF3 DFSDM1_CKIN3
Pin AF6 SAI3_SCK_B
Pin AF7 USART3_TX
Pin AF9 SPDIFRX_IN2
Pin AF12 FMC_AD13/FMC_D13
Pin AF14 LCD_B7
Pin AF15 EVENTOUT
J1.91 PD9 CPU.PD9 G3 VDD I/O Pin AF3 DFSDM1_DATIN3
Pin AF6 SAI3_SD_B
Pin AF7 USART3_RX
Pin AF12 FMC_AD14/FMC_D14
Pin AF13 DCMI_HSYNC
Pin AF14 LCD_B0
Pin AF15 EVENTOUT
J1.93 PC2 CPU.PC2 T2 VDD I/O internally used for

I/O EXP interrupt

Pin AF3 DFSDM1_CKIN1
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_CKOUT
Pin AF11 ETH1_GMII_TXD2/

ETH1_MII_TXD2/

ETH1_RGMII_TXD2

Pin AF13 DCMI_PIXCLK
Pin AF15 EVENTOUT
J1.95 PA0 CPU.PA0 R3 VDD I/O Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 TIM5_CH1
Pin AF3 TIM8_ETR
Pin AF4 TIM15_BKIN
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 UART4_TX
Pin AF9 SDMMC2_CMD
Pin AF10 SAI2_SD_B
Pin AF11 ETH1_GMII_CRS/

ETH1_MII_CRS

Pin AF15 EVENTOUT
J1.97 PD13 CPU.PD13 U12 VDD I/O Pin AF1 LPTIM1_OUT
Pin AF2 TIM4_CH2
Pin AF4 I2C4_SDA
Pin AF5 I2C1_SDA
Pin AF6 I2S3_MCK
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D7
Pin AF10 SDMMC2_D123DIR
Pin AF11 SDMMC1_D7
Pin AF12 FMC_CLK
Pin AF13 DCMI_D5
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.99 PD12 CPU.PD12 U11 VDD I/O internally used for

NAND flash

Pin AF1 LPTIM1_IN1
Pin AF2 TIM4_CH1
Pin AF3 LPTIM2_IN1
Pin AF4 I2C4_SCL
Pin AF5 I2C1_SCL
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 QUADSPI_BK1_IO1
Pin AF10 SAI2_FS_A
Pin AF12 FMC_A17/FMC_ALE
Pin AF15 EVENTOUT
J1.101 PD11 CPU.PD11 V8 VDD I/O internally used for

NAND flash

Pin AF3 LPTIM2_IN2
Pin AF4 I2C4_SMBA
Pin AF5 I2C1_SMBA
Pin AF7 USART3_CTS/USART3_NSS
Pin AF9 QUADSPI_BK1_IO0
Pin AF10 SAI2_SD_A
Pin AF12 FMC_A16/FMC_CLE
Pin AF15 EVENTOUT
J1.103 - NC - - -
J1.105 PG9 CPU.PG9 T14 VDD I/O internally used for

NAND flash

Pin AF0 DBTRGO
Pin AF7 USART6_RX
Pin AF8 SPDIFRX_IN4
Pin AF9 QUADSPI_BK2_IO2
Pin AF10 SAI2_FS_B
Pin AF12 FMC_NE2/FMC_NCE
Pin AF13 DCMI_VSYNC
Pin AF14 LCD_R1
Pin AF15 EVENTOUT
J1.107 - NC - - -
J1.109 DGND DGND - - G
J1.111 DSI_CKN CPU.DSI_CKN A14 - D
J1.113 DSI_CKP CPU.DSI_CKP B14 - D
J1.115 DSI_D0N CPU.DSI_D0N A13 - D
J1.117 DSI_D0P DSI_D0P B13 - D
J1.119 DSI_D1N CPU.DSI_D1N A15 - D
J1.121 DSI_D1P CPU.DSI_D1P B15 - D
J1.123 - NC - - -
J1.125 - NC - - -
J1.127 - NC - - -
J1.129 - NC - - -
J1.131 DGND DGND - - G
J1.133 ADP5589_R7 EXP.R7 1 VDD I/O Pin AF0 Keypad row 7
Pin AF5 GPIO 8
J1.135 ADP5589_R6 EXP.R6 2 VDD I/O Pin AF0 Keypad row 6
Pin AF5 GPIO 7
J1.137 ADP5589_R5 EXP.R5 3 VDD I/O Pin AF0 Keypad row 5
Pin AF5 GPIO 6
J1.139 ADP5589_R4 EXP.R4 4 VDD I/O Pin AF0 Keypad row 4
Pin AF1 RESET1
Pin AF5 GPIO 5
J1.141 ADP5589_R3 EXP.R3 5 VDD I/O Pin AF0 Keypad row 3
Pin AF1 Logic LC1
Pin AF2 PWM_OUT
Pin AF3 CLK_OUT
Pin AF5 GPIO 4
J1.143 ADP5589_R2 EXP.R2 6 VDD I/O Pin AF0 Keypad row 2
Pin AF1 LOGIC LB1
Pin AF5 GPIO 3
J1.145 ADP5589_R1 EXP.R1 7 VDD I/O Pin AF0 Keypad row 1
Pin AF1 Logic LA1
Pin AF5 GPIO 2
J1.147 ADP5589_R0 EXP.R0 8 VDD I/O Pin AF0 Keypad row 0
Pin AF1 Logic LY1
Pin AF5 GPIO 1
J1.149 ADP5589_C0 EXP.C0 9 VDD I/O Pin AF0 Keypad column 0
Pin AF5 GPIO 9
J1.151 ADP5589_C1 EXP.C1 10 VDD I/O Pin AF0 Keypad column 1
Pin AF5 GPIO 10
J1.153 DGND DGND - - G
J1.155 ADP5589_C2 EXP.C2 11 VDD I/O Pin AF0 Keypad column 2
Pin AF5 GPIO 11
J1.157 ADP5589_C3 EXP.C3 12 VDD I/O Pin AF0 Keypad column 3
Pin AF5 GPIO 12
J1.159 ADP5589_C4 EXP.C4 13 VDD I/O Pin AF0 Keypad column 4
Pin AF1 RESET2
Pin AF5 GPIO 13
J1.161 ADP5589_C5 EXP.C5 14 VDD I/O Pin AF0 Keypad column 5
Pin AF5 GPIO 14
J1.163 ADP5589_C6 EXP.C6 15 VDD I/O Pin AF0 Keypad column 6
Pin AF1 Logic LC2
Pin AF2 PWM_IN
Pin AF3 CLK_IN
Pin AF5 GPIO 15
J1.165 ADP5589_C7 EXP.C7 16 VDD I/O Pin AF0 Keypad column 7
Pin AF1 Logic LB2
Pin AF5 GPIO 16
J1.167 ADP5589_C8 EXP.C8 19 VDD I/O Pin AF0 Keypad column 8
Pin AF1 Logic LA2
Pin AF5 GPIO 17
J1.169 ADP5589_C9 EXP.C9 20 VDD I/O Pin AF0 Keypad column 9
Pin AF1 Logic LY2
Pin AF5 GPIO 18
J1.171 ADP5589_C10 EXP.C10 21 VDD I/O Pin AF0 Keypad column 10
Pin AF5 GPIO 19
J1.173 - NC - - -
J1.175 DGND DGND - - G
J1.177 PE9 CPU.PE9 W7 VDD I/O internally used for

NAND flash

Pin AF1 TIM1_CH1
Pin AF3 DFSDM1_CKOUT
Pin AF7 UART7_RTS/UART7_DE
Pin AF10 QUADSPI_BK2_IO2
Pin AF12 FMC_AD6/FMC_D6
Pin AF15 EVENTOUT
J1.179 PC3 CPU.PC3 T3 VDD I/O internally used for

I/O EXP reset

Pin AF0 TRACECLK
Pin AF3 DFSDM1_DATIN1
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF11 ETH1_GMII_TX_CLK/

ETH1_MII_TX_CLK

Pin AF15 EVENTOUT
J1.181 PD6 CPU.PD6 E3 VDD I/O internally used for

NAND flash

Pin AF1 TIM16_CH1N
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN4
Pin AF4 DFSDM1_DATIN1
Pin AF5 SPI3_MOSI/I2S3_SDO
Pin AF6 SAI1_SD_A
Pin AF7 USART2_RX
Pin AF12 FMC_NWAIT
Pin AF13 DCMI_D10
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.183 PE10 CPU.PE10 V10 VDD I/O internally used for

NAND flash

Pin AF1 TIM1_CH2N
Pin AF3 DFSDM1_DATIN4
Pin AF7 UART7_CTS
Pin AF10 QUADSPI_BK2_IO3
Pin AF12 FMC_AD7/FMC_D7
Pin AF15 EVENTOUT
J1.185 VBUS_OTG_OUT PMIC.VBUSOTG 35 VBUSOTG S USB OTG VOUT
J1.187 PG11 CPU.PG11 V6 VDD I/O Pin AF0 TRACED11
Pin AF4 USART1_TX
Pin AF6 UART4_TX
Pin AF8 SPDIFRX_IN1
Pin AF11 ETH1_GMII_TX_EN/

ETH1_MII_TX_EN/

ETH1_RGMII_TX_CTL/

ETH1_RMII_TX_EN

Pin AF13 DCMI_D3
Pin AF14 LCD_B3
Pin AF15 EVENTOUT
J1.189 PB2 CPU.PB2 T13 VDD I/O Pin AF0 TRACED4
Pin AF1 RTC_OUT2
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN1
Pin AF4 USART1_RX
Pin AF5 I2S_CKIN
Pin AF6 SAI1_SD_A
Pin AF7 SPI3_MOSI/I2S3_SDO
Pin AF8 UART4_RX
Pin AF9 QUADSPI_CLK
Pin AF15 EVENTOUT
J1.191 PE1 CPU.PE1 B1 VDD I/O Pin AF1 LPTIM1_IN2
Pin AF5 I2S2_MCK
Pin AF6 SAI3_SD_B
Pin AF8 UART8_TX
Pin AF12 FMC_NBL1
Pin AF13 DCMI_D3
Pin AF15 EVENTOUT
J1.193 PE0 CPU.PE0 C4 VDD I/O Pin AF1 LPTIM1_ETR
Pin AF2 TIM4_ETR
Pin AF4 LPTIM2_ETR
Pin AF5 SPI3_SCK/I2S3_CK
Pin AF6 SAI4_MCLK_B
Pin AF8 UART8_RX
Pin AF10 SAI2_MCLK_A
Pin AF12 FMC_NBL0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.195 PE2 CPU.PE2 T1 VDD I/O internally used for

LAN PHY interrupt

Pin AF0 TRACECLK
Pin AF2 SAI1_CK1
Pin AF4 I2C4_SCL
Pin AF5 SPI4_SCK
Pin AF6 SAI1_MCLK_A
Pin AF9 QUADSPI_BK1_IO2
Pin AF11 ETH1_GMII_TXD3/

ETH1_MII_TXD3/

ETH1_RGMII_TXD3

Pin AF12 FMC_A23
Pin AF15 EVENTOUT
J1.197 PA13 CPU.PA13 P2 VDD I/O internally used for

LAN PHY reset

Pin AF0 DBTRGO
Pin AF1 DBTRGI
Pin AF2 MCO1
Pin AF8 UART4_TX
Pin AF15 EVENTOUT
J1.199 PD14 CPU.PD14 F3 VDD I/O internally used for

NAND flash

Pin AF2 TIM4_CH3
Pin AF6 SAI3_MCLK_B
Pin AF8 UART8_CTS
Pin AF12 FMC_AD0/FMC_D0
Pin AF15 EVENTOUT
J1.201 PD15 CPU.PD15 G1 VDD I/O internally used for

NAND flash

Pin AF2 TIM4_CH4
Pin AF6 SAI3_MCLK_A
Pin AF8 UART8_CTS
Pin AF12 FMC_AD1/FMC_D1
Pin AF15 EVENTOUT
J1.203 DGND DGND - - G

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.2 DGND DGND - - G
J1.4 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.6 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.8 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.10 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.12 DGND DGND - - G
J1.14 VBAT CPU.VBAT H3 VBAT S BACKUP VOLTAGE
J1.16 PONKEYn PMIC.PONKEYN 17 3.3VIN I
J1.18 SOM_PGOOD - - VDD O
J1.20 BOOT_MODE0 CPU.BOOT0 K1 VDD I internal pull-up or pull-down

according to specific model

J1.22 PWR_ON CPU.PWR_ON L1 VDD O
J1.24 NRST CPU.NRST

PMIC.RSTN

eMMC.RST_n

NOR.NRESET

J1

1

K5

A4

VDD I/O internal 10k pull-up to VDD
J1.26 BOOT_MODE1 CPU.BOOT1 K4 VDD I internal pull-up or pull-down

according to specific model

J1.28 PA9 CPU.PA9 C8 VDD I/O Pin AF1 TIM1_CH2
Pin AF4 I2C3_SMBA
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF7 USART1_TX
Pin AF8 SDMMC2_CDIR
Pin AF10 SDMMC2_D5
Pin AF13 DCMI_D0
Pin AF14 LCD_R5
Pin AF15 EVENTOUT
J1.30 DGND DGND - - G
J1.32 WAKEUP PMIC.WAKEUP 2 VINTLDO I
J1.34 PB13 CPU.PB13 T9 VDD I/O Pin AF1 TIM1_CH1N
Pin AF3 DFSDM1_CKOUT
Pin AF4 LPTIM2_OUT
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF6 DFSDM1_CKIN1
Pin AF7 USART3_CTS/USART3_NSS
Pin AF9 FDCAN2_TX
Pin AF11 ETH1_GMII_TXD1/

ETH1_MII_TXD1/

ETH1_RGMII_TXD1/

ETH1_RMII_TXD1

Pin AF14 UART5_TX
Pin AF15 EVENTOUT
J1.36 BOOT_MODE2 CPU-BOOT2 L2 VDD I internal pull-up or pull-down

according to specific model

J1.38 PA11 CPU.PA11 V17 VDD I/O Pin AF1 TIM1_CH4
Pin AF2 I2C6_SCL
Pin AF4 I2C5_SCL
Pin AF5 SPI2_NSS/I2S2_WS
Pin AF6 UART4_RX
Pin AF7 USART1_CTS/USART1_NSS
Pin AF9 FDCAN1_RX
Pin AF14 LCD_R4
Pin AF15 EVENTOUT
J1.40 MEM_WP# NAND.NWP

NOR.NWP

19

C4

VDD I/O internal pull-up to VDD
J1.42 PB6 CPU.PB6 T12 VDD I/O internally used for

PMIC I2C

Pin AF1 TIM16_CH1N
Pin AF2 TIM4_CH1
Pin AF4 I2C1_SCL
Pin AF5 CEC
Pin AF6 I2C4_SCL
Pin AF7 USART1_TX
Pin AF9 FDCAN2_TX
Pin AF10 QUADSPI_BK1_NCS
Pin AF11 DFSDM1_DATIN5
Pin AF12 UART5_TX
Pin AF13 DCMI_D5
Pin AF15 EVENTOUT
J1.44 PB7 CPU.PB7 B5 VDD I/O internally used for

PMIC I2C

Pin AF1 TIM17_CH1N
Pin AF2 TIM4_CH2
Pin AF4 I2C1_SDA
Pin AF6 I2C4_SDA
Pin AF7 USART1_RX
Pin AF10 SDMMC2_D1
Pin AF11 DFSDM1_CKIN5
Pin AF12 FMC_NL
Pin AF13 DCMI_VSYNC
Pin AF15 EVENTOUT
J1.46 PE14 CPU.PE14 D3 VDD I/O Pin AF1 TIM1_CH4
Pin AF5 SPI4_MOSI
Pin AF8 UART8_RTS/UART8_DE
Pin AF10 SAI2_MCLK_B
Pin AF11 SDMMC1_D123DIR
Pin AF12 FMC_AD11/FMC_D11
Pin AF13 LCD_G0
Pin AF14 LCD_CLK
Pin AF15 EVENTOUT
J1.48 PA12 CPU.PA12 U16 VDD I/O Pin AF1 TIM1_ETR
Pin AF2 I2C6_SDA
Pin AF4 I2C5_SDA
Pin AF6 UART4_TX
Pin AF7 USART1_RTS/USART1_DE
Pin AF8 SAI2_FS_B
Pin AF9 FDCAN1_TX
Pin AF14 LCD_R5
Pin AF15 EVENTOUT
J1.50 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.52 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.54 PMIC_INT# PMIC-INTN 43 VDD O
J1.56 DGND DGND - - G
J1.58 PA14 CPU.PA14 R1 VDD I/O Pin AF0 DBTRGO
Pin AF1 DBTRGI
Pin AF2 MCO2
Pin AF15 EVENTOUT
J1.60 VDD VOLTAGE OUTPUT - VDD S
J1.62 VDD VOLTAGE OUTPUT - VDD S
J1.64 1V8 PMIC.LDO6OUT 21 1V8 S Spare LDO output
J1.66 PG12 CPU.PG12 F1 VDD I/O Pin AF1 LPTIM1_IN1
Pin AF5 SPI6_MISO
Pin AF6 SAI4_CK2
Pin AF7 USART6_RTS/USART6_DE
Pin AF8 SPDIFRX_IN2
Pin AF9 LCD_B4
Pin AF10 SAI4_SCK_A
Pin AF11 ETH1_PHY_INTN
Pin AF12 FMC_NE4
Pin AF14 LCD_B1
Pin AF15 EVENTOUT
J1.68 PB5 CPU.PB5 T8 VDD I/O Pin AF0 ETH_CLK
Pin AF1 TIM17_BKIN
Pin AF2 TIM3_CH2
Pin AF3 SAI4_D1
Pin AF4 I2C1_SMBA
Pin AF5 SPI1_MOSI/I2S1_SDO
Pin AF6 I2C4_SMBA
Pin AF7 SPI3_MOSI/I2S3_SDO
Pin AF8 SPI6_MOSI
Pin AF9 FDCAN2_RX
Pin AF10 SAI4_SD_A
Pin AF11 ETH1_PPS_OUT
Pin AF12 UART5_RX
Pin AF13 DCMI_D10
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.70 PG8 CPU.PG8 U7 VDD I/O Pin AF0 TRACED15
Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 ETH_CLK
Pin AF3 TIM8_ETR
Pin AF5 SPI6_NSS
Pin AF6 SAI4_D2
Pin AF7 USART6_RTS/USART6_DE
Pin AF8 USART3_RTS/USART3_DE
Pin AF9 SPDIFRX_IN3
Pin AF10 SAI4_FS_A
Pin AF11 ETH1_PPS_OUT
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.72 PA8 CPU.PA8 B8 VDD I/O Pin AF0 MCO1
Pin AF1 TIM1_CH1
Pin AF3 TIM8_BKIN2
Pin AF4 I2C3_SCL
Pin AF5 SPI3_MOSI/I2S3_SDO
Pin AF7 USART1_CK
Pin AF8 SDMMC2_CKIN
Pin AF9 SDMMC2_D4
Pin AF10 OTG_FS_SOF/OTG_HS_SOF
Pin AF12 SAI4_SD_B
Pin AF13 UART7_RX
Pin AF14 LCD_R6
Pin AF15 EVENTOUT
J1.74 PF7 CPU.PF7 W8 VDD I/O internally used for

NOR flash

Pin AF1 TIM17_CH1
Pin AF5 SPI5_SCK
Pin AF6 SAI1_MCLK_B
Pin AF7 UART7_TX
Pin AF9 QUADSPI_BK1_IO2
Pin AF15 EVENTOUT
J1.76 PF9 CPU.PF9 W9 VDD I/O internally used for

NOR flash

Pin AF0 TRACED13
Pin AF1 TIM17_CH1N
Pin AF5 SPI5_MOSI
Pin AF6 SAI1_FS_B
Pin AF7 UART7_CTS
Pin AF9 TIM14_CH1
Pin AF10 QUADSPI_BK1_IO1
Pin AF15 EVENTOUT
J1.78 PF8 CPU.PF8 U10 VDD I/O internally used for

NOR flash

Pin AF0 TRACED12
Pin AF1 TIM16_CH1N
Pin AF5 SPI5_MISO
Pin AF6 SAI1_SCK_B
Pin AF7 UART7_RTS/UART7_DE
Pin AF9 TIM13_CH1
Pin AF10 QUADSPI_BK1_IO0
Pin AF15 EVENTOUT
J1.80 PF6 CPU.PF6 V9 VDD I/O internally used for

NOR flash

Pin AF1 TIM16_CH1
Pin AF5 SPI5_NSS
Pin AF6 SAI1_SD_B
Pin AF7 UART7_RX
Pin AF9 QUADSPI_BK1_IO3
Pin AF12 SAI4_SCK_B
Pin AF15 EVENTOUT
J1.82 DGND DGND - - G
J1.84 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.86 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.88 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.90 JTMS-SWDIO CPU.JTMS-SWDIO D15 VDD I/O
J1.92 JTDI CPU.JTDI D13 VDD I/O
J1.94 NJTRST CPU.NJTRST D12 VDD I/O
J1.96 JTDO-TRACESWOO CPU.JTDO-TRACESWOO D14 VDD I/O
J1.98 JTCK-SWCLK CPU.JTCK-SWCLK D16 VDD I/O
J1.100 DGND DGND - - G
J1.102 NRST_CORE CPU.NRST_CORE J2 VDD I internally connected to NRST
J1.104 PDR_ON CPU.PDR_ON N2 VDD I
J1.106 PDR_ON_CORE CPU.PDR_ON_CORE N1 VDD I
J1.108 PWR_LP CPU.PWR_LP P1 VDD O
J1.110 - NC - - -
J1.112 - NC - - -
J1.114 - NC - - -
J1.116 - NC - - -
J1.118 - NC - - -
J1.120 - NC - - -
J1.122 DGND DGND - - G
J1.124 PE13 CPU.PE13 C2 VDD I/O Pin AF0 HDP2
Pin AF1 TIM1_CH3
Pin AF3 DFSDM1_CKIN5
Pin AF5 SPI4_MISO
Pin AF10 SAI2_FS_B
Pin AF12 FMC_AD10/FMC_D10
Pin AF13 DCMI_D6
Pin AF14 LCD_DE
Pin AF15 EVENTOUT
J1.126 PC13 CPU.PC13 K3 VDD I/O Pin AF15 EVENTOUT
J1.128 PA4 CPU.PA4 R4 VDD I/O Pin AF0 HDP0
Pin AF2 TIM5_ETR
Pin AF4 SAI4_D2
Pin AF5 SPI1_NSS/I2S1_WS
Pin AF6 SPI3_NSS/I2S3_WS
Pin AF7 USART2_CK
Pin AF8 SPI6_NSS
Pin AF12 SAI4_FS_A
Pin AF13 DCMI_HSYNC
Pin AF14 LCD_VSYNC
Pin AF15 EVENTOUT
J1.130 PC6_OPT CPU.PC6 D10 VDD I/O internally used for

eMMC flash

(when configured as

8 bit SDMMC BUS)

Pin AF0 HDP1
Pin AF2 TIM3_CH1
Pin AF3 TIM8_CH1
Pin AF4 DFSDM1_CKIN3
Pin AF5 I2S2_MCK
Pin AF7 USART6_TX
Pin AF8 SDMMC1_D0DIR
Pin AF9 SDMMC2_D0DIR
Pin AF10 SDMMC2_D6
Pin AF11 DSI_TE
Pin AF12 SDMMC1_D6
Pin AF13 DCMI_D0
Pin AF14 LCD_HSYNC
Pin AF15 EVENTOUT
J1.132 PG7 CPU.PG7 W10 VDD I/O Pin AF0 TRACED5
Pin AF6 SAI1_MCLK_A
Pin AF7 USART6_CK
Pin AF8 UART8_RTS/UART8_DE
Pin AF9 QUADSPI_CLK
Pin AF11 QUADSPI_BK2_IO3
Pin AF13 DCMI_D13
Pin AF14 LCD_CLK
Pin AF15 EVENTOUT
J1.134 PG10 CPU.PG10 V7 VDD I/O Pin AF0 TRACED10
Pin AF8 UART8_CTS
Pin AF9 LCD_G3
Pin AF10 SAI2_SD_B
Pin AF11 QUADSPI_BK2_IO2
Pin AF12 FMC_NE3
Pin AF13 DCMI_D2
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.136 PD10 CPU.PD10 C5 VDD I/O Pin AF0 RTC_REFIN
Pin AF1 TIM16_BKIN
Pin AF3 DFSDM1_CKOUT
Pin AF4 I2C5_SMBA
Pin AF5 SPI3_MISO/I2S3_SDI
Pin AF6 SAI3_FS_B
Pin AF7 USART3_CK
Pin AF12 FMC_AD15/FMC_D15
Pin AF14 LCD_B3
Pin AF15 EVENTOUT
J1.138 PE12 CPU.PE12 D2 VDD I/O Pin AF1 TIM1_CH3N
Pin AF3 DFSDM1_DATIN5
Pin AF5 SPI4_SCK
Pin AF8 SDMMC1_D0DIR
Pin AF10 SAI2_SCK_B
Pin AF12 FMC_AD9/FMC_D9
Pin AF14 LCD_B4
Pin AF15 EVENTOUT
J1.140 PA3 CPU.PA3 P3 VDD I/O Pin AF1 TIM2_CH4
Pin AF2 TIM5_CH4
Pin AF3 LPTIM5_OUT
Pin AF4 TIM15_CH2
Pin AF7 USART2_RX
Pin AF9 LCD_B2
Pin AF11 ETH1_GMII_COL/

ETH1_MII_COL

Pin AF14 LCD_B5
Pin AF15 EVENTOUT
J1.142 PB8 CPU.PB8 W6 VDD I/O Pin AF0 HDP6
Pin AF1 TIM16_CH1
Pin AF2 TIM4_CH3
Pin AF3 DFSDM1_CKIN7
Pin AF4 I2C1_SCL
Pin AF5 SDMMC1_CKIN
Pin AF6 I2C4_SCL
Pin AF7 SDMMC2_CKIN
Pin AF8 UART4_RX
Pin AF9 FDCAN1_RX
Pin AF10 SDMMC2_D4
Pin AF11 ETH1_GMII_TXD3/

ETH1_MII_TXD3/

ETH1_RGMII_TXD3

Pin AF12 SDMMC1_D4
Pin AF13 DCMI_D6
Pin AF14 LCD_B6
Pin AF15 EVENTOUT
J1.144 PB9 CPU.PB9 D9 VDD I/O Pin AF0 HDP7
Pin AF1 TIM17_CH1
Pin AF2 TIM4_CH4
Pin AF3 DFSDM1_DATIN7
Pin AF4 I2C1_SDA
Pin AF5 SPI2_NSS/I2S2_WS
Pin AF6 I2C4_SDA
Pin AF7 SDMMC2_CDIR
Pin AF8 UART4_TX
Pin AF9 FDCAN1_TX
Pin AF10 SDMMC2_D5
Pin AF11 SDMMC1_CDIR
Pin AF12 SDMMC1_D5
Pin AF13 DCMI_D7
Pin AF14 LCD_B7
Pin AF15 EVENTOUT
J1.146 DGND DGND - - G
J1.148 PA6 CPU.PA6 T5 VDD I/O Pin AF1 TIM1_BKIN
Pin AF2 TIM3_CH1
Pin AF3 TIM8_BKIN
Pin AF4 SAI4_CK2
Pin AF5 SPI1_MISO/I2S1_SDI
Pin AF8 SPI6_MISO
Pin AF9 TIM13_CH1
Pin AF11 MDIOS_MDC
Pin AF12 SAI4_SCK_A
Pin AF13 DCMI_PIXCLK
Pin AF14 LCD_G2
Pin AF15 EVENTOUT
J1.150 PE11 CPU.PE11 C1 VDD I/O Pin AF1 TIM1_CH2
Pin AF3 DFSDM1_CKIN4
Pin AF5 SPI4_NSS
Pin AF7 USART6_CK
Pin AF10 SAI2_SD_B
Pin AF12 FMC_AD8/FMC_D8
Pin AF13 DCMI_D4
Pin AF14 LCD_G3
Pin AF15 EVENTOUT
J1.152 PB10 CPU.PB10 W5 VDD I/O Pin AF1 TIM2_CH3
Pin AF3 LPTIM2_IN1
Pin AF4 I2C2_SCL
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF6 DFSDM1_DATIN7
Pin AF7 USART3_TX
Pin AF9 QUADSPI_BK1_NCS
Pin AF11 ETH1_GMII_RX_ER/

ETH1_MII_RX_ER

Pin AF14 LCD_G4
Pin AF15 EVENTOUT
J1.154 PF11 CPU.PF11 U5 VDD I/O Pin AF5 SPI5_MOS
Pin AF10 SAI2_SD_B
Pin AF13 DCMI_D12
Pin AF14 LCD_G5
Pin AF15 EVENTOUT
J1.156 PC7 CPU.PC7 A9 VDD I/O Pin AF0 HDP4
Pin AF2 TIM3_CH2
Pin AF3 TIM8_CH2
Pin AF4 DFSDM1_DATIN3
Pin AF6 I2S3_MCK
Pin AF7 USART6_RX
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D123DIR
Pin AF10 SDMMC2_D7
Pin AF12 SDMMC1_D7
Pin AF13 DCMI_D1
Pin AF14 LCD_G6
Pin AF15 EVENTOUT
J1.158 PD3_OPT CPU.PD3 C6 VDD I/O internally used for

eMMC flash

(when configured as

8 bit SDMMC BUS)

Pin AF0 HDP5
Pin AF3 DFSDM1_CKOUT
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF6 DFSDM1_DATIN0
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D7
Pin AF10 SDMMC2_D123DIR
Pin AF11 SDMMC1_D7
Pin AF12 FMC_CLK
Pin AF13 DCMI_D5
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.160 PC10 CPU.PC10 D11 VDD I/O Pin AF0 TRACED2
Pin AF3 DFSDM1_CKIN5
Pin AF6 SPI3_SCK/I2S3_CK
Pin AF7 USART3_TX
Pin AF8 UART4_TX
Pin AF9 QUADSPI_BK1_IO1
Pin AF10 SAI4_MCLK_B
Pin AF12 SDMMC1_D2
Pin AF13 DCMI_D8
Pin AF14 LCD_R2
Pin AF15 EVENTOUT
J1.162 PB0 CPU.PB0 W3 VDD I/O Pin AF1 TIM1_CH2N
Pin AF2 TIM3_CH3
Pin AF3 TIM8_CH2N
Pin AF6 DFSDM1_CKOUT
Pin AF8 UART4_CTS
Pin AF9 LCD_R3
Pin AF11 ETH1_GMII_RXD2/

ETH1_MII_RXD2/

ETH1_RGMII_RXD2

Pin AF12 MDIOS_MDIO
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.164 DGND DGND - - G
J1.166 PA5 CPU.PA5 P4 VDD I/O Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF3 TIM8_CH1N
Pin AF4 SAI4_CK1
Pin AF5 SPI1_SCK/I2S1_CK
Pin AF8 SPI6_SCK
Pin AF12 SAI4_MCLK_A
Pin AF14 LCD_R4
Pin AF15 EVENTOUT
J1.168 PC0 CPU.PC0 T7 VDD I/O Pin AF3 DFSDM1_CKIN0
Pin AF4 LPTIM2_IN2
Pin AF6 DFSDM1_DATIN4
Pin AF8 SAI2_FS_B
Pin AF10 QUADSPI_BK2_NCS
Pin AF14 LCD_R5
Pin AF15 EVENTOUT
J1.170 PB1 CPU.PB1 V3 VDD I/O Pin AF1 TIM1_CH3N
Pin AF2 TIM3_CH4
Pin AF3 TIM8_CH3N
Pin AF6 DFSDM1_DATIN1
Pin AF9 LCD_R6
Pin AF11 ETH1_GMII_RXD3/

ETH1_MII_RXD3/

ETH1_RGMII_RXD3

Pin AF12 MDIOS_MDC
Pin AF14 LCD_G0
Pin AF15 EVENTOUT
J1.172 PE15 CPU.PE15 E1 VDD I/O Pin AF0 HDP3
Pin AF1 TIM1_BKIN
Pin AF4 TIM15_BKIN
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 UART8_CTS
Pin AF10 FMC_NCE2
Pin AF12 FMC_AD12/FMC_D12
Pin AF14 LCD_R7
Pin AF15 EVENTOUT
J1.174 PE4_OPT CPU.PE4 B11 VDD I/O internally used for

eMMC flash

(when configured as

8 bit SDMMC BUS)

Pin AF0 TRACED1
Pin AF2 SAI1_D2
Pin AF3 DFSDM1_DATIN3
Pin AF4 TIM15_CH1N
Pin AF5 SPI4_NSS
Pin AF6 SAI1_FS_A
Pin AF7 SDMMC2_CKIN
Pin AF8 SDMMC1_CKIN
Pin AF9 SDMMC2_D4
Pin AF11 SDMMC1_D4
Pin AF12 FMC_A20
Pin AF13 DCMI_D4
Pin AF14 LCD_B0
Pin AF15 EVENTOUT
J1.176 PA10 CPU.PA10 T16 VDD I/O Pin AF1 TIM1_CH3
Pin AF5 SPI3_NSS/I2S3_WS
Pin AF7 USART1_RX
Pin AF11 MDIOS_MDIO
Pin AF12 SAI4_FS_B
Pin AF13 DCMI_D1
Pin AF14 LCD_B1
Pin AF15 EVENTOUT
J1.178 PE5 CPU.PE5 B7 VDD I/O Pin AF0 TRACED3
Pin AF2 SAI1_CK2
Pin AF3 DFSDM1_CKIN3
Pin AF4 TIM15_CH1
Pin AF5 SPI4_MISO
Pin AF6 SAI1_SCK_A
Pin AF7 SDMMC2_D0DIR
Pin AF8 SDMMC1_D0DIR
Pin AF9 SDMMC2_D6
Pin AF11 SDMMC1_D6
Pin AF12 FMC_A21
Pin AF13 DCMI_D6
Pin AF14 LCD_G0
Pin AF15 EVENTOUT
J1.180 PE6_OPT CPU.PE6 B3 VDD I/O for SDMMC1_D2

use pin J1.79

(SDMMC lenght match)

Pin AF0 TRACED2
Pin AF1 TIM1_BKIN2
Pin AF2 SAI1_D1
Pin AF4 TIM15_CH2
Pin AF5 SPI4_MOSI
Pin AF6 SAI1_SD_A
Pin AF7 SDMMC2_D0
Pin AF8 SDMMC1_D2
Pin AF10 SAI2_MCLK_B
Pin AF12 FMC_A22
Pin AF13 DCMI_D7
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.182 PG13 CPU.PG13 U2 VDD I/O Pin AF0 TRACED0
Pin AF1 LPTIM1_OUT
Pin AF2 SAI1_CK2
Pin AF4 SAI4_CK1
Pin AF5 SPI6_SCK
Pin AF6 SAI1_SCK_A
Pin AF7 USART6_CTS/USART6_NSS
Pin AF10 SAI4_MCLK_A
Pin AF11 ETH1_GMII_TXD0/

ETH1_MII_TXD0/

ETH1_RGMII_TXD0/

ETH1_RMII_TXD0

Pin AF12 FMC_A24
Pin AF14 LCD_R0
Pin AF15 EVENTOUT
J1.184 PA15_OPT CPU.PA15 C7 VDD I/O internally used for

eMMC flash

(when configured as

8 bit SDMMC BUS)

Pin AF0 DBTRGI
Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 SAI4_D2
Pin AF3 SDMMC1_CDIR
Pin AF4 CEC
Pin AF5 SPI1_NSS/I2S1_WS
Pin AF6 SPI3_NSS/I2S3_WS
Pin AF7 SPI6_NSS
Pin AF8 UART4_RTS/UART4_DE
Pin AF9 SDMMC2_D5
Pin AF10 SDMMC2_CDIR
Pin AF11 SDMMC1_D5
Pin AF12 SAI4_FS_A
Pin AF13 UART7_TX
Pin AF14 LCD_R1
Pin AF15 EVENTOUT
J1.186 VBUS_OTG_IN CPU.OTG_VBUS U15 VBUS_OTG_IN S
J1.188 VBUS_SW PMIC.SWOUT 38 VBUS_SW S
J1.190 DGND DGND - - G
J1.192 - NC - - -
J1.194 - NC - - -
J1.196 USB_DM2 CPU.USB_DM2 V13 - D
J1.198 USB_DP2 CPU.USB_DP2 W13 - D
J1.200 USB_DP1 CPU.USB_DP1 V14 - D
J1.202 USB_DM1 CPU.USB_DM1 W14 - D
J1.204 DGND DGND - - G

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