Difference between revisions of "ETRA SOM/ETRA Hardware/Pinout Table"

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(WIP: Populate Alternate Function)
(Alternate function for ODD pins)
Line 293: Line 293:
 
|
 
|
 
|-
 
|-
−
| rowspan="12" |J1.37
+
| rowspan="10" |J1.37
−
| rowspan="12" |PD1
+
| rowspan="10" |PD1
−
| rowspan="12" |CPU.PD1
+
| rowspan="10" |CPU.PD1
−
| rowspan="12" |A4
+
| rowspan="10" |A4
−
| rowspan="12" |VDD
+
| rowspan="10" |VDD
−
| rowspan="12" |I/O
+
| rowspan="10" |I/O
−
| rowspan="12" |
+
| rowspan="10" |
 
|Pin AF2
 
|Pin AF2
 
|I2C6_SCL
 
|I2C6_SCL
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_DATIN6
−
 
 
−
DATIN6
 
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
Line 315: Line 313:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART4_TX
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|FDCAN1_TX
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SDMMC3_D0
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|DFSDM1_CKIN7
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD3/FMC_D3
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="10" |J1.39
+
| rowspan="6" |J1.39
−
| rowspan="10" |PD4
+
| rowspan="6" |PD4
−
| rowspan="10" |CPU.PD4
+
| rowspan="6" |CPU.PD4
−
| rowspan="10" |D6
+
| rowspan="6" |D6
−
| rowspan="10" |VDD
+
| rowspan="6" |VDD
−
| rowspan="10" |I/O
+
| rowspan="6" |I/O
−
| rowspan="10" |TBD
+
| rowspan="6" |TBD
 
|Pin AF6
 
|Pin AF6
 
|SAI3_FS_A
 
|SAI3_FS_A
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|USART2_RTS/
+
|USART2_RTS/USART2_DE
−
 
 
−
USART2_DE
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SDMMC3_D1
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|DFSDM1_CKIN0
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_NOE
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="9" |J1.41
+
| rowspan="4" |J1.41
−
| rowspan="9" |PD5
+
| rowspan="4" |PD5
−
| rowspan="9" |CPU.PD5
+
| rowspan="4" |CPU.PD5
−
| rowspan="9" |D7
+
| rowspan="4" |D7
−
| rowspan="9" |VDD
+
| rowspan="4" |VDD
−
| rowspan="9" |I/O
+
| rowspan="4" |I/O
−
| rowspan="9" |TBD
+
| rowspan="4" |TBD
 
|Pin AF7
 
|Pin AF7
 
|USART2_TX
 
|USART2_TX
 
|-
 
|-
−
|Pin AF8
+
|Pin AF10
−
|TBD
+
|SDMMC3_D2
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_NWE
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="13" |J1.43
+
| rowspan="9" |J1.43
−
| rowspan="13" |PD7
+
| rowspan="9" |PD7
−
| rowspan="13" |CPU.PD7
+
| rowspan="9" |CPU.PD7
−
| rowspan="13" |B4
+
| rowspan="9" |B4
−
| rowspan="13" |VDD
+
| rowspan="9" |VDD
−
| rowspan="13" |I/O
+
| rowspan="9" |I/O
−
| rowspan="13" |TBD
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED6
 
|TRACED6
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_DATIN4
−
 
 
−
DATIN4
 
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
Line 430: Line 391:
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|DFSDM1_
+
|DFSDM1_CKIN1
−
 
 
−
CKIN1
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
 
|USART2_CK
 
|USART2_CK
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SPDIFRX_IN1
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SDMMC3_D3
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_NE1
 
|-
 
|-
−
|Pin AF13
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin AF14
+
| rowspan="10" |J1.45
−
|TBD
+
| rowspan="10" |PD0
−
|-
+
| rowspan="10" |CPU.PD0
−
|Pin AF15
+
| rowspan="10" |A3
−
|TBD
+
| rowspan="10" |VDD
−
|-
+
| rowspan="10" |I/O
−
| rowspan="12" |J1.45
+
| rowspan="10" |TBD
−
| rowspan="12" |PD0
 
−
| rowspan="12" |CPU.PD0
 
−
| rowspan="12" |A3
 
−
| rowspan="12" |VDD
 
−
| rowspan="12" |I/O
 
−
| rowspan="12" |TBD
 
 
|Pin AF2
 
|Pin AF2
 
|I2C6_SDA
 
|I2C6_SDA
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_CKIN6
−
 
 
−
CKIN6
 
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
Line 483: Line 428:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART4_RX
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|FDCAN1_RX
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SDMMC3_CMD
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|DFSDM1_DATIN7
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD2/FMC_D2
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="13" |J1.47
+
| rowspan="8" |J1.47
−
| rowspan="13" |PG15
+
| rowspan="8" |PG15
−
| rowspan="13" |CPU.PG15
+
| rowspan="8" |CPU.PG15
−
| rowspan="13" |A2
+
| rowspan="8" |A2
−
| rowspan="13" |VDD
+
| rowspan="8" |VDD
−
| rowspan="13" |I/O
+
| rowspan="8" |I/O
−
| rowspan="13" |TBD
+
| rowspan="8" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED7
 
|TRACED7
Line 526: Line 465:
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|USART6_CTS/
+
|USART6_CTS/USART6_NSS
−
 
 
−
USART6_NSS
 
 
|-
 
|-
−
|Pin AF8
+
|Pin AF10
−
|TBD
+
|SDMMC3_CK
 
|-
 
|-
−
|Pin AF9
+
|Pin AF13
−
|TBD
+
|DCMI_D13
 
|-
 
|-
−
|Pin AF10
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin AF11
+
| rowspan="9" |J1.49
−
|TBD
+
| rowspan="9" |PF10
−
|-
+
| rowspan="9" |CPU.PF10
−
|Pin AF12
+
| rowspan="9" |U9
−
|TBD
+
| rowspan="9" |VDD
−
|-
+
| rowspan="9" |I/O
−
|Pin AF13
+
| rowspan="9" |TBD
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="12" |J1.49
 
−
| rowspan="12" |PF10
 
−
| rowspan="12" |CPU.PF10
 
−
| rowspan="12" |U9
 
−
| rowspan="12" |VDD
 
−
| rowspan="12" |I/O
 
−
| rowspan="12" |TBD
 
 
|Pin AF1
 
|Pin AF1
 
|TIM16_BKIN
 
|TIM16_BKIN
Line 572: Line 494:
 
|Pin AF6
 
|Pin AF6
 
|SAI1_D4
 
|SAI1_D4
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_CLK
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SAI4_D3
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D11
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_DE
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="12" |J1.51
+
| rowspan="7" |J1.51
−
| rowspan="12" |PE7
+
| rowspan="7" |PE7
−
| rowspan="12" |CPU.PE7
+
| rowspan="7" |CPU.PE7
−
| rowspan="12" |T10
+
| rowspan="7" |T10
−
| rowspan="12" |VDD
+
| rowspan="7" |VDD
−
| rowspan="12" |I/O
+
| rowspan="7" |I/O
−
| rowspan="12" |TBD
+
| rowspan="7" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_ETR
 
|TIM1_ETR
Line 611: Line 524:
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_DATIN2
−
 
 
−
DATIN2
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
 
|UART7_RX
 
|UART7_RX
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|QUADSPI_BK2_IO0
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD4/FMC_D4
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="11" |J1.53
+
| rowspan="6" |J1.53
−
| rowspan="11" |PE8
+
| rowspan="6" |PE8
−
| rowspan="11" |CPU.PE8
+
| rowspan="6" |CPU.PE8
−
| rowspan="11" |T11
+
| rowspan="6" |T11
−
| rowspan="11" |VDD
+
| rowspan="6" |VDD
−
| rowspan="11" |I/O
+
| rowspan="6" |I/O
−
| rowspan="11" |TBD
+
| rowspan="6" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH1N
 
|TIM1_CH1N
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_CKIN2
−
 
 
−
CKIN2
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
 
|UART7_TX
 
|UART7_TX
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|QUADSPI_BK2_IO1
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD5/FMC_D5
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
|J1.55
 
|J1.55
Line 714: Line 593:
 
|
 
|
 
|-
 
|-
−
| rowspan="15" |J1.61
+
| rowspan="9" |J1.61
−
| rowspan="15" |PB14
+
| rowspan="9" |PB14
−
| rowspan="15" |CPU.PB14
+
| rowspan="9" |CPU.PB14
−
| rowspan="15" |C9
+
| rowspan="9" |C9
−
| rowspan="15" |VDD
+
| rowspan="9" |VDD
−
| rowspan="15" |I/O
+
| rowspan="9" |I/O
−
| rowspan="15" |TBD
+
| rowspan="9" |TBD
−
|Pin AF1
+
|Pin AF1
 
|TIM1_CH2N
 
|TIM1_CH2N
 
|-
 
|-
Line 734: Line 613:
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI2_MISO/
+
|SPI2_MISO/I2S2_SDI
−
 
 
−
I2S2_SDI
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|DFSDM1_
+
|DFSDM1_DATIN2
−
 
 
−
DATIN2
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|USART3_RTS/
+
|USART3_RTS/USART3_DE
−
 
 
−
USART3_DE
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_D0
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="15" |J1.63
+
| rowspan="9" |J1.63
−
| rowspan="15" |PB15
+
| rowspan="9" |PB15
−
| rowspan="15" |CPU.PB15
+
| rowspan="9" |CPU.PB15
−
| rowspan="15" |A8
+
| rowspan="9" |A8
−
| rowspan="15" |VDD
+
| rowspan="9" |VDD
−
| rowspan="15" |I/O
+
| rowspan="9" |I/O
−
| rowspan="15" |TBD
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|RTC_REFIN
 
|RTC_REFIN
Line 795: Line 650:
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI2_MOSI/
+
|SPI2_MOSI/I2S2_SDO
−
 
 
−
I2S2_SDO
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|DFSDM1_
+
|DFSDM1_CKIN2
−
 
 
−
CKIN2
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_D1
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="13" |J1.65
+
| rowspan="10" |J1.65
−
| rowspan="13" |PB3
+
| rowspan="10" |PB3
−
| rowspan="13" |CPU.PB3
+
| rowspan="10" |CPU.PB3
−
| rowspan="13" |A7
+
| rowspan="10" |A7
−
| rowspan="13" |VDD
+
| rowspan="10" |VDD
−
| rowspan="13" |I/O
+
| rowspan="10" |I/O
−
| rowspan="13" |TBD
+
| rowspan="10" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED9
 
|TRACED9
Line 845: Line 678:
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI1_SCK/
+
|SPI1_SCK/I2S1_CK
−
 
 
−
I2S1_CK
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|SPI3_SCK/
+
|SPI3_SCK/I2S3_CK
−
 
 
−
I2S3_CK
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|SPI6_SCK
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_D2
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SAI4_MCLK_A
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|UART7_RX
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="15" |J1.67
+
| rowspan="12" |J1.67
−
| rowspan="15" |PB4
+
| rowspan="12" |PB4
−
| rowspan="15" |CPU.PB4
+
| rowspan="12" |CPU.PB4
−
| rowspan="15" |B9
+
| rowspan="12" |B9
−
| rowspan="15" |VDD
+
| rowspan="12" |VDD
−
| rowspan="15" |I/O
+
| rowspan="12" |I/O
−
| rowspan="15" |TBD
+
| rowspan="12" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED8
 
|TRACED8
Line 898: Line 718:
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI1_MISO/
+
|SPI1_MISO/I2S1_SDI
−
 
 
−
I2S1_SDI
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|SPI3_MISO/
+
|SPI3_MISO/I2S3_SDI
−
 
 
−
I2S3_SDI
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|SPI2_NSS/
+
|SPI2_NSS/I2S2_WS
−
 
 
−
I2S2_WS
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|SPI6_MISO
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_D3
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SAI4_SCK_A
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|UART7_TX
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="10" |J1.69
+
| rowspan="6" |J1.69
−
| rowspan="10" |PG6
+
| rowspan="6" |PG6
−
| rowspan="10" |CPU.PG6
+
| rowspan="6" |CPU.PG6
−
| rowspan="10" |A6
+
| rowspan="6" |A6
−
| rowspan="10" |VDD
+
| rowspan="6" |VDD
−
| rowspan="10" |I/O
+
| rowspan="6" |I/O
−
| rowspan="10" |TBD
+
| rowspan="6" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED14
 
|TRACED14
Line 948: Line 753:
 
|Pin AF1
 
|Pin AF1
 
|TIM17_BKIN
 
|TIM17_BKIN
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SDMMC2_CMD
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D12
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_R7
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="11" |J1.71
+
| rowspan="6" |J1.71
−
| rowspan="11" |PE3
+
| rowspan="6" |PE3
−
| rowspan="11" |CPU.PE3
+
| rowspan="6" |CPU.PE3
−
| rowspan="11" |A5
+
| rowspan="6" |A5
−
| rowspan="11" |VDD
+
| rowspan="6" |VDD
−
| rowspan="11" |I/O
+
| rowspan="6" |I/O
−
| rowspan="11" |TBD
+
| rowspan="6" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 988: Line 781:
 
|Pin AF6
 
|Pin AF6
 
|SAI1_SD_B
 
|SAI1_SD_B
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_CK
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_A19
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
|J1.73
 
|J1.73
Line 1,023: Line 801:
 
|
 
|
 
|-
 
|-
−
| rowspan="13" |J1.75
+
| rowspan="9" |J1.75
−
| rowspan="13" |PC8
+
| rowspan="9" |PC8
−
| rowspan="13" |CPU.PC8
+
| rowspan="9" |CPU.PC8
−
| rowspan="13" |C11
+
| rowspan="9" |C11
−
| rowspan="13" |VDD
+
| rowspan="9" |VDD
−
| rowspan="13" |I/O
+
| rowspan="9" |I/O
−
| rowspan="13" |TBD
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 1,046: Line 824:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART5_RTS/UART5_DE
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SDMMC1_D0
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D2
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="13" |J1.77
+
| rowspan="11" |J1.77
−
| rowspan="13" |PC9
+
| rowspan="11" |PC9
−
| rowspan="13" |CPU.PC9
+
| rowspan="11" |CPU.PC9
−
| rowspan="13" |A10
+
| rowspan="11" |A10
−
| rowspan="13" |VDD
+
| rowspan="11" |VDD
−
| rowspan="13" |I/O
+
| rowspan="11" |I/O
−
| rowspan="13" |TBD
+
| rowspan="11" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED1
 
|TRACED1
Line 1,092: Line 858:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART5_CTS
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO0
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SDMMC1_D1
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D3
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_B2
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="15" |J1.79
+
| rowspan="13" |J1.79
−
| rowspan="15" |PE6
+
| rowspan="13" |PE6
−
| rowspan="15" |CPU.PE6
+
| rowspan="13" |CPU.PE6
−
| rowspan="15" |B3
+
| rowspan="13" |B3
−
| rowspan="15" |VDD
+
| rowspan="13" |VDD
−
| rowspan="15" |I/O
+
| rowspan="13" |I/O
−
| rowspan="15" |TBD
+
| rowspan="13" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED2
 
|TRACED2
Line 1,144: Line 904:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|SDMMC1_D2
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI2_MCLK_B
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_A22
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D7
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_G1
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="12" |J1.81
+
| rowspan="10" |J1.81
−
| rowspan="12" |PC11
+
| rowspan="10" |PC11
−
| rowspan="12" |CPU.PC11
+
| rowspan="10" |CPU.PC11
−
| rowspan="12" |A11
+
| rowspan="10" |A11
−
| rowspan="12" |VDD
+
| rowspan="10" |VDD
−
| rowspan="12" |I/O
+
| rowspan="10" |I/O
−
| rowspan="12" |TBD
+
| rowspan="10" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED3
 
|TRACED3
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_DATIN5
−
 
 
−
DATIN5
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|SPI3_MISO/
+
|SPI3_MISO/I2S3_SDI
−
 
 
−
I2S3_SDI
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
Line 1,191: Line 941:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART4_RX
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_BK2_NCS
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI4_SCK_B
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SDMMC1_D3
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D4
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="11" |J1.83
+
| rowspan="7" |J1.83
−
| rowspan="11" |PD2
+
| rowspan="7" |PD2
−
| rowspan="11" |CPU.PD2
+
| rowspan="7" |CPU.PD2
−
| rowspan="11" |B10
+
| rowspan="7" |B10
−
| rowspan="11" |VDD
+
| rowspan="7" |VDD
−
| rowspan="11" |I/O
+
| rowspan="7" |I/O
−
| rowspan="11" |TBD
+
| rowspan="7" |TBD
 
|Pin AF2
 
|Pin AF2
 
|TIM3_ETR
 
|TIM3_ETR
Line 1,231: Line 975:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART5_RX
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SDMMC1_CMD
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D11
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="13" |J1.85
+
| rowspan="10" |J1.85
−
| rowspan="13" |PC12
+
| rowspan="10" |PC12
−
| rowspan="13" |CPU.PC12
+
| rowspan="10" |CPU.PC12
−
| rowspan="13" |C10
+
| rowspan="10" |C10
−
| rowspan="13" |VDD
+
| rowspan="10" |VDD
−
| rowspan="13" |I/O
+
| rowspan="10" |I/O
−
| rowspan="13" |TBD
+
| rowspan="10" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACECLK
 
|TRACECLK
Line 1,271: Line 1,003:
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|SPI3_MOSI/
+
|SPI3_MOSI/I2S3_SDO
−
 
 
−
I2S3_SDO
 
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
Line 1,279: Line 1,009:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART5_TX
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI4_SD_B
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|SDMMC1_CK
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D9
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
|J1.87
 
|J1.87
Line 1,312: Line 1,033:
 
|
 
|
 
|-
 
|-
−
| rowspan="11" |J1.89
+
| rowspan="7" |J1.89
−
| rowspan="11" |PD8
+
| rowspan="7" |PD8
−
| rowspan="11" |CPU.PD8
+
| rowspan="7" |CPU.PD8
−
| rowspan="11" |F2
+
| rowspan="7" |F2
−
| rowspan="11" |VDD
+
| rowspan="7" |VDD
−
| rowspan="11" |I/O
+
| rowspan="7" |I/O
−
| rowspan="11" |TBD
+
| rowspan="7" |TBD
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_CKIN3
−
 
 
−
CKIN3
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
Line 1,329: Line 1,048:
 
|Pin AF7
 
|Pin AF7
 
|USART3_TX
 
|USART3_TX
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SPDIFRX_IN2
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD13/FMC_D13
−
|-
 
−
|Pin AF13
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_B7
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="11" |J1.91
+
| rowspan="7" |J1.91
−
| rowspan="11" |PD9
+
| rowspan="7" |PD9
−
| rowspan="11" |CPU.PD9
+
| rowspan="7" |CPU.PD9
−
| rowspan="11" |G3
+
| rowspan="7" |G3
−
| rowspan="11" |VDD
+
| rowspan="7" |VDD
−
| rowspan="11" |I/O
+
| rowspan="7" |I/O
−
| rowspan="11" |TBD
+
| rowspan="7" |TBD
 
|Pin AF3
 
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_DATIN3
−
 
 
−
DATIN3
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
Line 1,371: Line 1,076:
 
|Pin AF7
 
|Pin AF7
 
|USART3_RX
 
|USART3_RX
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD14/FMC_D14
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_HSYNC
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_B0
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="11" |J1.93
+
| rowspan="6" |J1.93
−
| rowspan="11" |PC2
+
| rowspan="6" |PC2
−
| rowspan="11" |CPU.PC2
+
| rowspan="6" |CPU.PC2
−
| rowspan="11" |T2
+
| rowspan="6" |T2
−
| rowspan="11" |VDD
+
| rowspan="6" |VDD
−
| rowspan="11" |I/O
+
| rowspan="6" |I/O
−
| rowspan="11" |TBD
+
| rowspan="6" |TBD
−
|Pin AF3
+
|Pin AF3
−
|DFSDM1_
+
|DFSDM1_CKIN1
−
 
 
−
CKIN1
 
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI2_MISO/
+
|SPI2_MISO/I2S2_SDI
−
 
 
−
I2S2_SDI
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|DFSDM1_
+
|DFSDM1_CKOUT
−
 
 
−
CKOUT
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|ETH1_GMII_TXD2/
−
|-
+
 
−
|Pin AF12
+
ETH1_MII_TXD2/
−
|TBD
+
 
 +
ETH1_RGMII_TXD2
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_PIXCLK
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="13" |J1.95
+
| rowspan="10" |J1.95
−
| rowspan="13" |PA0
+
| rowspan="10" |PA0
−
| rowspan="13" |CPU.PA0
+
| rowspan="10" |CPU.PA0
−
| rowspan="13" |R3
+
| rowspan="10" |R3
−
| rowspan="13" |VDD
+
| rowspan="10" |VDD
−
| rowspan="13" |I/O
+
| rowspan="10" |I/O
−
| rowspan="13" |TBD
+
| rowspan="10" |TBD
 
|Pin AF1
 
|Pin AF1
−
|TIM2_CH1/
+
|TIM2_CH1/TIM2_ETR
−
 
 
−
TIM2_ETR
 
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
Line 1,464: Line 1,138:
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|USART2_CTS/
+
|USART2_CTS/USART2_NSS
−
 
 
−
USART2_NSS
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART4_TX
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_CMD
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI2_SD_B
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|ETH1_GMII_CRS/
−
|-
+
 
−
|Pin AF12
+
ETH1_MII_CRS
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
| rowspan="13" |J1.97
 
| rowspan="13" |J1.97
Line 1,515: Line 1,180:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|SDMMC1_D123DIR
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|SDMMC2_D7
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SDMMC2_D123DIR
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|SDMMC1_D7
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_CLK
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D5
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_G7
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="14" |J1.99
+
| rowspan="10" |J1.99
−
| rowspan="14" |PD12
+
| rowspan="10" |PD12
−
| rowspan="14" |CPU.PD12
+
| rowspan="10" |CPU.PD12
−
| rowspan="14" |U11
+
| rowspan="10" |U11
−
| rowspan="14" |VDD
+
| rowspan="10" |VDD
−
| rowspan="14" |I/O
+
| rowspan="10" |I/O
−
| rowspan="14" |TBD
+
| rowspan="10" |TBD
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_IN1
 
|LPTIM1_IN1
Line 1,561: Line 1,226:
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|USART3_RTS/
+
|USART3_RTS/USART3_DE
−
 
 
−
USART3_DE
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO1
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI2_FS_A
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_A17/FMC_ALE
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="12" |J1.101
+
| rowspan="8" |J1.101
−
| rowspan="12" |PD11
+
| rowspan="8" |PD11
−
| rowspan="12" |CPU.PD11
+
| rowspan="8" |CPU.PD11
−
| rowspan="12" |V8
+
| rowspan="8" |V8
−
| rowspan="12" |VDD
+
| rowspan="8" |VDD
−
| rowspan="12" |I/O
+
| rowspan="8" |I/O
−
| rowspan="12" |TBD
+
| rowspan="8" |TBD
 
|Pin AF3
 
|Pin AF3
 
|LPTIM2_IN2
 
|LPTIM2_IN2
Line 1,606: Line 1,257:
 
|-
 
|-
 
|Pin AF7
 
|Pin AF7
−
|USART3_CTS/
+
|USART3_CTS/USART3_NSS
−
 
 
−
USART3_NSS
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO0
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI2_SD_A
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_A16/FMC_CLE
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
|J1.103
 
|J1.103
Line 1,644: Line 1,281:
 
|
 
|
 
|-
 
|-
−
| rowspan="10" |J1.105
+
| rowspan="9" |J1.105
−
| rowspan="10" |PG9
+
| rowspan="9" |PG9
−
| rowspan="10" |CPU.PG9
+
| rowspan="9" |CPU.PG9
−
| rowspan="10" |T14
+
| rowspan="9" |T14
−
| rowspan="10" |VDD
+
| rowspan="9" |VDD
−
| rowspan="10" |I/O
+
| rowspan="9" |I/O
−
| rowspan="10" |TBD
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|DBTRGO
 
|DBTRGO
Line 1,658: Line 1,295:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|SPDIFRX_IN4
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_BK2_IO2
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI2_FS_B
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_NE2/FMC_NCE
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_VSYNC
 
|-
 
|-
 
|Pin AF14
 
|Pin AF14
−
|TBD
+
|LCD_R1
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
|J1.107
 
|J1.107
Line 1,811: Line 1,445:
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.133
+
| rowspan="2" |J1.133
−
| rowspan="5" |ADP5589_R7
+
| rowspan="2" |ADP5589_R7
−
| rowspan="5" |EXP.R7
+
| rowspan="2" |EXP.R7
−
| rowspan="5" |1
+
| rowspan="2" |1
−
| rowspan="5" |VDD
+
| rowspan="2" |VDD
−
| rowspan="5" |I/O
+
| rowspan="2" |I/O
−
| rowspan="5" |TBD
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad row 7
 
|-
 
|-
−
|Pin AF1
+
|Pin AF5
−
|TBD
+
|GPIO 8
 
|-
 
|-
−
|Pin AF2
+
| rowspan="2" |J1.135
−
|TBD
+
| rowspan="2" |ADP5589_R6
−
|-
+
| rowspan="2" |EXP.R6
−
|Pin AF3
+
| rowspan="2" |2
−
|TBD
+
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |TBD
 +
|Pin AF0
 +
|Keypad row 6
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 7
 
|-
 
|-
−
| rowspan="5" |J1.135
+
| rowspan="2" |J1.137
−
| rowspan="5" |ADP5589_R6
+
| rowspan="2" |ADP5589_R5
−
| rowspan="5" |EXP.R6
+
| rowspan="2" |EXP.R5
−
| rowspan="5" |2
+
| rowspan="2" |3
−
| rowspan="5" |VDD
+
| rowspan="2" |VDD
−
| rowspan="5" |I/O
+
| rowspan="2" |I/O
−
| rowspan="5" |TBD
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad row 5
 
|-
 
|-
−
|Pin AF1
+
|Pin AF5
−
|TBD
+
|GPIO 6
 
|-
 
|-
−
|Pin AF2
+
| rowspan="3" |J1.139
−
|TBD
+
| rowspan="3" |ADP5589_R4
 +
| rowspan="3" |EXP.R4
 +
| rowspan="3" |4
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |TBD
 +
|Pin AF0
 +
|Keypad row 4
 
|-
 
|-
−
|Pin AF3
+
|Pin AF1
−
|TBD
+
|RESET1
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 5
 
|-
 
|-
−
| rowspan="5" |J1.137
+
| rowspan="5" |J1.141
−
| rowspan="5" |ADP5589_R5
+
| rowspan="5" |ADP5589_R3
−
| rowspan="5" |EXP.R5
+
| rowspan="5" |EXP.R3
−
| rowspan="5" |3
+
| rowspan="5" |5
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad row 3
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|Logic LC1
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
−
|TBD
+
|PWM_OUT
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|TBD
+
|CLK_OUT
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 4
 
|-
 
|-
−
| rowspan="5" |J1.139
+
| rowspan="3" |J1.143
−
| rowspan="5" |ADP5589_R4
+
| rowspan="3" |ADP5589_R2
−
| rowspan="5" |EXP.R4
+
| rowspan="3" |EXP.R2
−
| rowspan="5" |4
+
| rowspan="3" |6
−
| rowspan="5" |VDD
+
| rowspan="3" |VDD
−
| rowspan="5" |I/O
+
| rowspan="3" |I/O
−
| rowspan="5" |TBD
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad row 2
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|LOGIC LB1
 +
|-
 +
|Pin AF5
 +
|GPIO 3
 
|-
 
|-
−
|Pin AF2
+
| rowspan="3" |J1.145
−
|TBD
+
| rowspan="3" |ADP5589_R1
 +
| rowspan="3" |EXP.R1
 +
| rowspan="3" |7
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |TBD
 +
|Pin AF0
 +
|Keypad row 1
 
|-
 
|-
−
|Pin AF3
+
|Pin AF1
−
|TBD
+
|Logic LA1
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 2
 
|-
 
|-
−
| rowspan="5" |J1.141
+
| rowspan="3" |J1.147
−
| rowspan="5" |ADP5589_R3
+
| rowspan="3" |ADP5589_R0
−
| rowspan="5" |EXP.R3
+
| rowspan="3" |EXP.R0
−
| rowspan="5" |5
+
| rowspan="3" |8
−
| rowspan="5" |VDD
+
| rowspan="3" |VDD
−
| rowspan="5" |I/O
+
| rowspan="3" |I/O
−
| rowspan="5" |TBD
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad row 0
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|Logic LY1
 
|-
 
|-
−
|Pin AF2
+
|Pin AF5
−
|TBD
+
|GPIO 1
 
|-
 
|-
−
|Pin AF3
+
| rowspan="2" |J1.149
−
|TBD
+
| rowspan="2" |ADP5589_C0
 +
| rowspan="2" |EXP.C0
 +
| rowspan="2" |9
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |TBD
 +
|Pin AF0
 +
|Keypad column 0
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 9
 
|-
 
|-
−
| rowspan="5" |J1.143
+
| rowspan="2" |J1.151
−
| rowspan="5" |ADP5589_R2
+
| rowspan="2" |ADP5589_C1
−
| rowspan="5" |EXP.R2
+
| rowspan="2" |EXP.C1
−
| rowspan="5" |6
+
| rowspan="2" |10
−
| rowspan="5" |VDD
+
| rowspan="2" |VDD
−
| rowspan="5" |I/O
+
| rowspan="2" |I/O
−
| rowspan="5" |TBD
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad column 1
 
|-
 
|-
−
|Pin AF1
+
|Pin AF5
−
|TBD
+
|GPIO 10
 
|-
 
|-
−
|Pin AF2
+
|J1.153
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin AF3
+
| rowspan="2" |J1.155
−
|TBD
+
| rowspan="2" |ADP5589_C2
 +
| rowspan="2" |EXP.C2
 +
| rowspan="2" |11
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |TBD
 +
|Pin AF0
 +
|Keypad column 2
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 11
 
|-
 
|-
−
| rowspan="5" |J1.145
+
| rowspan="2" |J1.157
−
| rowspan="5" |ADP5589_R1
+
| rowspan="2" |ADP5589_C3
−
| rowspan="5" |EXP.R1
+
| rowspan="2" |EXP.C3
−
| rowspan="5" |7
+
| rowspan="2" |12
−
| rowspan="5" |VDD
+
| rowspan="2" |VDD
−
| rowspan="5" |I/O
+
| rowspan="2" |I/O
−
| rowspan="5" |TBD
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad column 3
 
|-
 
|-
−
|Pin AF1
+
|Pin AF5
−
|TBD
+
|GPIO 12
 
|-
 
|-
−
|Pin AF2
+
| rowspan="3" |J1.159
−
|TBD
+
| rowspan="3" |ADP5589_C4
 +
| rowspan="3" |EXP.C4
 +
| rowspan="3" |13
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |TBD
 +
|Pin AF0
 +
|Keypad column 4
 +
|-
 +
|Pin AF1
 +
|RESET2
 +
|-
 +
|Pin AF5
 +
|GPIO 13
 
|-
 
|-
−
|Pin AF3
+
| rowspan="2" |J1.161
−
|TBD
+
| rowspan="2" |ADP5589_C5
 +
| rowspan="2" |EXP.C5
 +
| rowspan="2" |14
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |TBD
 +
|Pin AF0
 +
|Keypad column 5
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 14
 
|-
 
|-
−
| rowspan="5" |J1.147
+
| rowspan="5" |J1.163
−
| rowspan="5" |ADP5589_R0
+
| rowspan="5" |ADP5589_C6
−
| rowspan="5" |EXP.R0
+
| rowspan="5" |EXP.C6
−
| rowspan="5" |8
+
| rowspan="5" |15
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad column 6
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|Logic LC2
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
−
|TBD
+
|PWM_IN
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|TBD
+
|CLK_IN
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 15
 
|-
 
|-
−
| rowspan="5" |J1.149
+
| rowspan="3" |J1.165
−
| rowspan="5" |ADP5589_C0
+
| rowspan="3" |ADP5589_C7
−
| rowspan="5" |EXP.C0
+
| rowspan="3" |EXP.C7
−
| rowspan="5" |9
+
| rowspan="3" |16
−
| rowspan="5" |VDD
+
| rowspan="3" |VDD
−
| rowspan="5" |I/O
+
| rowspan="3" |I/O
−
| rowspan="5" |TBD
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad column 7
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|Logic LB2
 +
|-
 +
|Pin AF5
 +
|GPIO 16
 
|-
 
|-
−
|Pin AF2
+
| rowspan="3" |J1.167
−
|TBD
+
| rowspan="3" |ADP5589_C8
 +
| rowspan="3" |EXP.C8
 +
| rowspan="3" |19
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |TBD
 +
|Pin AF0
 +
|Keypad column 8
 
|-
 
|-
−
|Pin AF3
+
|Pin AF1
−
|TBD
+
|Logic LA2
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 17
 
|-
 
|-
−
| rowspan="5" |J1.151
+
| rowspan="3" |J1.169
−
| rowspan="5" |ADP5589_C1
+
| rowspan="3" |ADP5589_C9
−
| rowspan="5" |EXP.C1
+
| rowspan="3" |EXP.C9
−
| rowspan="5" |10
+
| rowspan="3" |20
−
| rowspan="5" |VDD
+
| rowspan="3" |VDD
−
| rowspan="5" |I/O
+
| rowspan="3" |I/O
−
| rowspan="5" |TBD
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|Keypad column 9
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|Logic LY2
 
|-
 
|-
−
|Pin AF2
+
|Pin AF5
−
|TBD
+
|GPIO 18
 
|-
 
|-
−
|Pin AF3
+
| rowspan="2" |J1.171
−
|TBD
+
| rowspan="2" |ADP5589_C10
 +
| rowspan="2" |EXP.C10
 +
| rowspan="2" |21
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |TBD
 +
|Pin AF0
 +
|Keypad column 10
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|GPIO 19
 
|-
 
|-
−
|J1.153
+
|J1.173
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.175
 
|DGND
 
|DGND
 
|DGND
 
|DGND
Line 2,041: Line 1,764:
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.155
+
| rowspan="6" |J1.177
−
| rowspan="5" |ADP5589_C2
+
| rowspan="6" |PE9
−
| rowspan="5" |EXP.C2
+
| rowspan="6" |CPU.PE9
−
| rowspan="5" |11
+
| rowspan="6" |W7
−
| rowspan="5" |VDD
+
| rowspan="6" |VDD
−
| rowspan="5" |I/O
+
| rowspan="6" |I/O
−
| rowspan="5" |TBD
+
| rowspan="6" |TBD
−
|Pin AF0
 
−
|TBD
 
−
|-
 
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|TIM1_CH1
−
|-
 
−
|Pin AF2
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|TBD
+
|DFSDM1_CKOUT
 
|-
 
|-
−
|Pin AF5
+
|Pin AF7
−
|TBD
+
|UART7_RTS/UART7_DE
 
|-
 
|-
−
| rowspan="5" |J1.157
+
|Pin AF10
−
| rowspan="5" |ADP5589_C3
+
|QUADSPI_BK2_IO2
−
| rowspan="5" |EXP.C3
+
|-
−
| rowspan="5" |12
+
|Pin AF12
−
| rowspan="5" |VDD
+
|FMC_AD6/FMC_D6
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="5" |J1.179
 +
| rowspan="5" |PC3
 +
| rowspan="5" |CPU.PC3
 +
| rowspan="5" |T3
 +
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin AF0
 
|Pin AF0
−
|TBD
+
|TRACECLK
−
|-
 
−
|Pin AF1
 
−
|TBD
 
−
|-
 
−
|Pin AF2
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|TBD
+
|DFSDM1_DATIN1
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|SPI2_MOSI/I2S2_SDO
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_TX_CLK/
 +
 
 +
ETH1_MII_TX_CLK
 
|-
 
|-
−
| rowspan="5" |J1.159
+
|Pin AF15
−
| rowspan="5" |ADP5589_C4
+
|EVENTOUT
−
| rowspan="5" |EXP.C4
 
−
| rowspan="5" |13
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin AF0
 
−
|TBD
 
 
|-
 
|-
 +
| rowspan="11" |J1.181
 +
| rowspan="11" |PD6
 +
| rowspan="11" |CPU.PD6
 +
| rowspan="11" |E3
 +
| rowspan="11" |VDD
 +
| rowspan="11" |I/O
 +
| rowspan="11" |TBD
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|TIM16_CH1N
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
−
|TBD
+
|SAI1_D1
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|TBD
+
|DFSDM1_CKIN4
 +
|-
 +
|Pin AF4
 +
|DFSDM1_DATIN1
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|SPI3_MOSI/I2S3_SDO
 
|-
 
|-
−
| rowspan="5" |J1.161
+
|Pin AF6
−
| rowspan="5" |ADP5589_C5
+
|SAI1_SD_A
−
| rowspan="5" |EXP.C5
 
−
| rowspan="5" |14
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin AF0
 
−
|TBD
 
 
|-
 
|-
−
|Pin AF1
+
|Pin AF7
−
|TBD
+
|USART2_RX
 
|-
 
|-
−
|Pin AF2
+
|Pin AF12
−
|TBD
+
|FMC_NWAIT
 
|-
 
|-
−
|Pin AF3
+
|Pin AF13
−
|TBD
+
|DCMI_D10
 
|-
 
|-
−
|Pin AF5
+
|Pin AF14
−
|TBD
+
|LCD_B2
 
|-
 
|-
−
| rowspan="5" |J1.163
+
|Pin AF15
−
| rowspan="5" |ADP5589_C6
+
|EVENTOUT
−
| rowspan="5" |EXP.C6
 
−
| rowspan="5" |15
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin AF0
 
−
|TBD
 
 
|-
 
|-
 +
| rowspan="6" |J1.183
 +
| rowspan="6" |PE10
 +
| rowspan="6" |CPU.PE10
 +
| rowspan="6" |V10
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |TBD
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|TIM1_CH2N
 
|-
 
|-
−
|Pin AF2
+
|Pin AF3
−
|TBD
+
|DFSDM1_DATIN4
 
|-
 
|-
−
|Pin AF3
+
|Pin AF7
−
|TBD
+
|UART7_CTS
 
|-
 
|-
−
|Pin AF5
+
|Pin AF10
−
|TBD
+
|QUADSPI_BK2_IO3
 
|-
 
|-
−
| rowspan="5" |J1.165
+
|Pin AF12
−
| rowspan="5" |ADP5589_C7
+
|FMC_AD7/FMC_D7
−
| rowspan="5" |EXP.C7
 
−
| rowspan="5" |16
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin AF0
 
−
|TBD
 
 
|-
 
|-
−
|Pin AF1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin AF2
+
|J1.185
−
|TBD
+
|VBUS_OTG_OUT
 +
|PMIC.VBUSOTG
 +
|35
 +
|VBUSOTG
 +
|S
 +
|USB OTG VOUT
 +
|
 +
|
 
|-
 
|-
−
|Pin AF3
+
| rowspan="8" |J1.187
−
|TBD
+
| rowspan="8" |PG11
 +
| rowspan="8" |CPU.PG11
 +
| rowspan="8" |V6
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |TBD
 +
|Pin AF0
 +
|TRACED11
 
|-
 
|-
−
|Pin AF5
+
|Pin AF4
−
|TBD
+
|USART1_TX
 
|-
 
|-
−
| rowspan="5" |J1.167
+
|Pin AF6
−
| rowspan="5" |ADP5589_C8
+
|UART4_TX
−
| rowspan="5" |EXP.C8
 
−
| rowspan="5" |19
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin AF0
 
−
|TBD
 
 
|-
 
|-
−
|Pin AF1
+
|Pin AF8
−
|TBD
+
|SPDIFRX_IN1
 
|-
 
|-
−
|Pin AF2
+
|Pin AF11
−
|TBD
+
|ETH1_GMII_TX_EN/
 +
 
 +
ETH1_MII_TX_EN/
 +
 
 +
ETH1_RGMII_TX_CTL/
 +
 
 +
ETH1_RMII_TX_EN
 
|-
 
|-
−
|Pin AF3
+
|Pin AF13
−
|TBD
+
|DCMI_D3
 
|-
 
|-
−
|Pin AF5
+
|Pin AF14
−
|TBD
+
|LCD_B3
 
|-
 
|-
−
| rowspan="5" |J1.169
+
|Pin AF15
−
| rowspan="5" |ADP5589_C9
+
|EVENTOUT
−
| rowspan="5" |EXP.C9
+
|-
−
| rowspan="5" |20
+
| rowspan="11" |J1.189
−
| rowspan="5" |VDD
+
| rowspan="11" |PB2
−
| rowspan="5" |I/O
+
| rowspan="11" |CPU.PB2
−
| rowspan="5" |TBD
+
| rowspan="11" |T13
−
|Pin AF0
+
| rowspan="11" |VDD
−
|TBD
+
| rowspan="11" |I/O
 +
| rowspan="11" |TBD
 +
|Pin AF0
 +
|TRACED4
 
|-
 
|-
 
|Pin AF1
 
|Pin AF1
−
|TBD
+
|RTC_OUT2
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
−
|TBD
+
|SAI1_D1
 
|-
 
|-
 
|Pin AF3
 
|Pin AF3
−
|TBD
+
|DFSDM1_CKIN1
 +
|-
 +
|Pin AF4
 +
|USART1_RX
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|TBD
+
|I2S_CKIN
 
|-
 
|-
−
| rowspan="5" |J1.171
+
|Pin AF6
−
| rowspan="5" |ADP5589_C10
+
|SAI1_SD_A
−
| rowspan="5" |EXP.C10
 
−
| rowspan="5" |21
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin AF0
 
−
|TBD
 
 
|-
 
|-
−
|Pin AF1
+
|Pin AF7
−
|TBD
+
|SPI3_MOSI/I2S3_SDO
 
|-
 
|-
−
|Pin AF2
+
|Pin AF8
−
|TBD
+
|UART4_RX
 
|-
 
|-
−
|Pin AF3
+
|Pin AF9
−
|TBD
+
|QUADSPI_CLK
 
|-
 
|-
−
|Pin AF5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|J1.173
+
| rowspan="7" |J1.191
−
| -
+
| rowspan="7" |PE1
−
|NC
+
| rowspan="7" |CPU.PE1
−
| -
+
| rowspan="7" |B1
−
| -
+
| rowspan="7" |VDD
−
| -
+
| rowspan="7" |I/O
−
|
+
| rowspan="7" |TBD
−
|
+
|Pin AF1
−
|
+
|LPTIM1_IN2
 
|-
 
|-
−
|J1.175
+
|Pin AF5
−
|DGND
+
|I2S2_MCK
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="11" |J1.177
+
|Pin AF6
−
| rowspan="11" |PE9
+
|SAI3_SD_B
−
| rowspan="11" |CPU.PE9
 
−
| rowspan="11" |W7
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |TBD
 
−
|Pin AF1
 
−
|TIM1_CH1
 
−
|-
 
−
|Pin AF3
 
−
|DFSDM1_
 
−
 
 
−
CKOUT
 
−
|-
 
−
|Pin AF7
 
−
|UART7_RTS/
 
−
 
 
−
UART7_DE
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART8_TX
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_NBL1
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D3
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="11" |J1.179
+
| rowspan="10" |J1.193
−
| rowspan="11" |PC3
+
| rowspan="10" |PE0
−
| rowspan="11" |CPU.PC3
+
| rowspan="10" |CPU.PE0
−
| rowspan="11" |T3
+
| rowspan="10" |C4
−
| rowspan="11" |VDD
+
| rowspan="10" |VDD
−
| rowspan="11" |I/O
+
| rowspan="10" |I/O
−
| rowspan="11" |TBD
+
| rowspan="10" |TBD
−
|Pin AF0
+
|Pin AF1
−
|TRACECLK
+
|LPTIM1_ETR
 +
|-
 +
|Pin AF2
 +
|TIM4_ETR
 
|-
 
|-
−
|Pin AF3
+
|Pin AF4
−
|DFSDM1_
+
|LPTIM2_ETR
−
 
 
−
DATIN1
 
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI2_MOSI/
+
|SPI3_SCK/I2S3_CK
−
 
+
|-
−
I2S2_SDO
+
|Pin AF6
 +
|SAI4_MCLK_B
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART8_RX
−
|-
 
−
|Pin AF9
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
−
|TBD
+
|SAI2_MCLK_A
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_NBL0
 
|-
 
|-
 
|Pin AF13
 
|Pin AF13
−
|TBD
+
|DCMI_D2
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="15" |J1.181
+
| rowspan="9" |J1.195
−
| rowspan="15" |PD6
+
| rowspan="9" |PE2
−
| rowspan="15" |CPU.PD6
+
| rowspan="9" |CPU.PE2
−
| rowspan="15" |E3
+
| rowspan="9" |T1
−
| rowspan="15" |VDD
+
| rowspan="9" |VDD
−
| rowspan="15" |I/O
+
| rowspan="9" |I/O
−
| rowspan="15" |TBD
+
| rowspan="9" |TBD
−
|Pin AF1
+
|Pin AF0
−
|TIM16_CH1N
+
|TRACECLK
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
−
|SAI1_D1
+
|SAI1_CK1
−
|-
 
−
|Pin AF3
 
−
|DFSDM1_
 
−
 
 
−
CKIN4
 
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
−
|DFSDM1_
+
|I2C4_SCL
−
 
 
−
DATIN1
 
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
−
|SPI3_MOSI/
+
|SPI4_SCK
−
 
 
−
I2S3_SDO
 
 
|-
 
|-
 
|Pin AF6
 
|Pin AF6
−
|SAI1_SD_A
+
|SAI1_MCLK_A
−
|-
 
−
|Pin AF7
 
−
|USART2_RX
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO2
−
|-
 
−
|Pin AF10
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF11
 
|Pin AF11
−
|TBD
+
|ETH1_GMII_TXD3/
 +
 
 +
ETH1_MII_TXD3/
 +
 
 +
ETH1_RGMII_TXD3
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_A23
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 +
|-
 +
| rowspan="5" |J1.197
 +
| rowspan="5" |PA13
 +
| rowspan="5" |CPU.PA13
 +
| rowspan="5" |P2
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin AF0
 +
|DBTRGO
 
|-
 
|-
−
| rowspan="11" |J1.183
 
−
| rowspan="11" |PE10
 
−
| rowspan="11" |CPU.PE10
 
−
| rowspan="11" |V10
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |TBD
 
 
|Pin AF1
 
|Pin AF1
−
|TIM1_CH2N
+
|DBTRGI
 
|-
 
|-
−
|Pin AF3
+
|Pin AF2
−
|DFSDM1_
+
|MCO1
−
 
 
−
DATIN4
 
−
|-
 
−
|Pin AF7
 
−
|UART7_CTS
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART4_TX
 
|-
 
|-
−
|Pin AF9
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin AF10
+
| rowspan="5" |J1.199
−
|TBD
+
| rowspan="5" |PD14
 +
| rowspan="5" |CPU.PD14
 +
| rowspan="5" |F3
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin AF2
 +
|TIM4_CH3
 
|-
 
|-
−
|Pin AF11
+
|Pin AF6
−
|TBD
+
|SAI3_MCLK_B
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
|J1.185
 
−
|VBUS_OTG_OUT
 
−
|PMIC.VBUSOTG
 
−
|35
 
−
|VBUSOTG
 
−
|S
 
−
|USB OTG VOUT
 
−
|
 
−
|
 
−
|-
 
−
| rowspan="11" |J1.187
 
−
| rowspan="11" |PG11
 
−
| rowspan="11" |CPU.PG11
 
−
| rowspan="11" |V6
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |TBD
 
−
|Pin AF0
 
−
|TRACED11
 
−
|-
 
−
|Pin AF4
 
−
|USART1_TX
 
−
|-
 
−
|Pin AF6
 
−
|UART4_TX
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="16" |J1.189
 
−
| rowspan="16" |PB2
 
−
| rowspan="16" |CPU.PB2
 
−
| rowspan="16" |T13
 
−
| rowspan="16" |VDD
 
−
| rowspan="16" |I/O
 
−
| rowspan="16" |TBD
 
−
|Pin AF0
 
−
|TRACED4
 
−
|-
 
−
|Pin AF1
 
−
|RTC_OUT2
 
−
|-
 
−
|Pin AF2
 
−
|SAI1_D1
 
−
|-
 
−
|Pin AF3
 
−
|DFSDM1_
 
−
 
 
−
CKIN1
 
−
|-
 
−
|Pin AF4
 
−
|USART1_RX
 
−
|-
 
−
|Pin AF5
 
−
|I2S_CKIN
 
−
|-
 
−
|Pin AF6
 
−
|SAI1_SD_A
 
−
|-
 
−
|Pin AF7
 
−
|SPI3_MOSI/
 
−
 
 
−
I2S3_SDO
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="11" |J1.191
 
−
| rowspan="11" |PE1
 
−
| rowspan="11" |CPU.PE1
 
−
| rowspan="11" |B1
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |TBD
 
−
|Pin AF1
 
−
|LPTIM1_IN2
 
−
|-
 
−
|Pin AF5
 
−
|I2S2_MCK
 
−
|-
 
−
|Pin AF6
 
−
|SAI3_SD_B
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="13" |J1.193
 
−
| rowspan="13" |PE0
 
−
| rowspan="13" |CPU.PE0
 
−
| rowspan="13" |C4
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |TBD
 
−
|Pin AF1
 
−
|LPTIM1_ETR
 
−
|-
 
−
|Pin AF2
 
−
|TIM4_ETR
 
−
|-
 
−
|Pin AF4
 
−
|LPTIM2_ETR
 
−
|-
 
−
|Pin AF5
 
−
|SPI3_SCK/
 
−
 
 
−
I2S3_CK
 
−
|-
 
−
|Pin AF6
 
−
|SAI4_MCLK_B
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="13" |J1.195
 
−
| rowspan="13" |PE2
 
−
| rowspan="13" |CPU.PE2
 
−
| rowspan="13" |T1
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |TBD
 
−
|Pin AF0
 
−
|TRACECLK
 
−
|-
 
−
|Pin AF2
 
−
|SAI1_CK1
 
−
|-
 
−
|Pin AF4
 
−
|I2C4_SCL
 
−
|-
 
−
|Pin AF5
 
−
|SPI4_SCK
 
−
|-
 
−
|Pin AF6
 
−
|SAI1_MCLK_A
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="11" |J1.197
 
−
| rowspan="11" |PA13
 
−
| rowspan="11" |CPU.PA13
 
−
| rowspan="11" |P2
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |TBD
 
−
|Pin AF0
 
−
|DBTRGO
 
−
|-
 
−
|Pin AF1
 
−
|DBTRGI
 
−
|-
 
−
|Pin AF2
 
−
|MCO1
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART8_CTS
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD0/FMC_D0
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="10" |J1.199
+
| rowspan="5" |J1.201
−
| rowspan="10" |PD14
+
| rowspan="5" |PD15
−
| rowspan="10" |CPU.PD14
+
| rowspan="5" |CPU.PD15
−
| rowspan="10" |F3
+
| rowspan="5" |G1
−
| rowspan="10" |VDD
+
| rowspan="5" |VDD
−
| rowspan="10" |I/O
+
| rowspan="5" |I/O
−
| rowspan="10" |TBD
+
| rowspan="5" |TBD
−
|Pin AF2
 
−
|TIM4_CH3
 
−
|-
 
−
|Pin AF6
 
−
|SAI3_MCLK_B
 
−
|-
 
−
|Pin AF8
 
−
|TBD
 
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
−
|-
 
−
|Pin AF12
 
−
|TBD
 
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
−
|-
 
−
|Pin AF15
 
−
|TBD
 
−
|-
 
−
| rowspan="10" |J1.201
 
−
| rowspan="10" |PD15
 
−
| rowspan="10" |CPU.PD15
 
−
| rowspan="10" |G1
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |TBD
 
 
|Pin AF2
 
|Pin AF2
 
|TIM4_CH4
 
|TIM4_CH4
Line 2,781: Line 2,126:
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
−
|TBD
+
|UART8_CTS
−
|-
 
−
|Pin AF9
 
−
|TBD
 
−
|-
 
−
|Pin AF10
 
−
|TBD
 
−
|-
 
−
|Pin AF11
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
−
|TBD
+
|FMC_AD1/FMC_D1
−
|-
 
−
|Pin AF13
 
−
|TBD
 
−
|-
 
−
|Pin AF14
 
−
|TBD
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
 
|J1.203
 
|J1.203

Revision as of 07:40, 29 December 2020

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Version Issue Date Notes
X.Y.Z Month Year TBD
[TBD_link X.Y.Z] Month Year TBD
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TBD: modificare la tabella seguente con le caratteristiche dei pin del SOM

TBD: modificare le due tabelle ODD e EVEN con la mappa completa dei pins

TBD: nella tabella naming conventions, inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)

Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ETRA:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR3 edge connector 204 pin TE Connectivity 2-2013289-1

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:

File:ETRA-top.png
ETRA TOP view
File:ETRA-bottom.png
ETRA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the TBD: connector type ETRA connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ETRA connectors
Internal
connections 		Connections to the ETRA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • PMIC.<x> : pin connected to the Power Manager IC STPMIC1APQR
  • LAN.<x> : pin connected to the LAN PHY KSZ8091RNAIA
  • NOR.<x>: pin connected to the flash NOR
  • NAND.<x>: pin connected to the flash NAND
  • eMMC.<x>: pin connected to the flash eMMC
  • EXP.<x>: pin connected to the I/O EXPANDER ADP5589ACPZ
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 DGND DGND - - G
J1.3 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.5 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.7 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.9 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.11 DGND DGND - - G
J1.13 ETH_LED LAN.LED0/PME_N1 23 VDD I/O
J1.15 - NC - - -
J1.17 DGND DGND - - G
J1.19 ETH_TX_P LAN.TXP 6 - D
J1.21 ETH_TX_M LAN.TXM 5 - D
J1.23 ETH_RX_P LAN.RXP 4 - D
J1.25 ETH_RX_M LAN.RXM 3 - D
J1.27 LDO2 PMIC.LDO2OUT 18 LDO2 S Spare LDO output
J1.29 LDO5 PMIC.LDO5OUT 20 LDO5 S Spare LDO output
J1.31 - NC - - -
J1.33 - NC - - -
J1.35 DGND DGND - - G
J1.37 PD1 CPU.PD1 A4 VDD I/O Pin AF2 I2C6_SCL
Pin AF3 DFSDM1_DATIN6
Pin AF4 I2C5_SCL
Pin AF6 SAI3_SD_A
Pin AF8 UART4_TX
Pin AF9 FDCAN1_TX
Pin AF10 SDMMC3_D0
Pin AF11 DFSDM1_CKIN7
Pin AF12 FMC_AD3/FMC_D3
Pin AF15 EVENTOUT
J1.39 PD4 CPU.PD4 D6 VDD I/O TBD Pin AF6 SAI3_FS_A
Pin AF7 USART2_RTS/USART2_DE
Pin AF10 SDMMC3_D1
Pin AF11 DFSDM1_CKIN0
Pin AF12 FMC_NOE
Pin AF15 EVENTOUT
J1.41 PD5 CPU.PD5 D7 VDD I/O TBD Pin AF7 USART2_TX
Pin AF10 SDMMC3_D2
Pin AF12 FMC_NWE
Pin AF15 EVENTOUT
J1.43 PD7 CPU.PD7 B4 VDD I/O TBD Pin AF0 TRACED6
Pin AF3 DFSDM1_DATIN4
Pin AF4 I2C2_SCL
Pin AF6 DFSDM1_CKIN1
Pin AF7 USART2_CK
Pin AF9 SPDIFRX_IN1
Pin AF10 SDMMC3_D3
Pin AF12 FMC_NE1
Pin AF15 EVENTOUT
J1.45 PD0 CPU.PD0 A3 VDD I/O TBD Pin AF2 I2C6_SDA
Pin AF3 DFSDM1_CKIN6
Pin AF4 I2C5_SDA
Pin AF6 SAI3_SCK_A
Pin AF8 UART4_RX
Pin AF9 FDCAN1_RX
Pin AF10 SDMMC3_CMD
Pin AF11 DFSDM1_DATIN7
Pin AF12 FMC_AD2/FMC_D2
Pin AF15 EVENTOUT
J1.47 PG15 CPU.PG15 A2 VDD I/O TBD Pin AF0 TRACED7
Pin AF2 SAI1_D2
Pin AF4 I2C2_SDA
Pin AF6 SAI1_FS_A
Pin AF7 USART6_CTS/USART6_NSS
Pin AF10 SDMMC3_CK
Pin AF13 DCMI_D13
Pin AF15 EVENTOUT
J1.49 PF10 CPU.PF10 U9 VDD I/O TBD Pin AF1 TIM16_BKIN
Pin AF2 SAI1_D3
Pin AF3 SAI4_D4
Pin AF6 SAI1_D4
Pin AF9 QUADSPI_CLK
Pin AF12 SAI4_D3
Pin AF13 DCMI_D11
Pin AF14 LCD_DE
Pin AF15 EVENTOUT
J1.51 PE7 CPU.PE7 T10 VDD I/O TBD Pin AF1 TIM1_ETR
Pin AF2 TIM3_ETR
Pin AF3 DFSDM1_DATIN2
Pin AF7 UART7_RX
Pin AF10 QUADSPI_BK2_IO0
Pin AF12 FMC_AD4/FMC_D4
Pin AF15 EVENTOUT
J1.53 PE8 CPU.PE8 T11 VDD I/O TBD Pin AF1 TIM1_CH1N
Pin AF3 DFSDM1_CKIN2
Pin AF7 UART7_TX
Pin AF10 QUADSPI_BK2_IO1
Pin AF12 FMC_AD5/FMC_D5
Pin AF15 EVENTOUT
J1.55 - NC - - -
J1.57 DGND DGND - - G
J1.59 - NC - - -
J1.61 PB14 CPU.PB14 C9 VDD I/O TBD Pin AF1 TIM1_CH2N
Pin AF2 TIM12_CH1
Pin AF3 TIM8_CH2N
Pin AF4 USART1_TX
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_DATIN2
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 SDMMC2_D0
Pin AF15 EVENTOUT
J1.63 PB15 CPU.PB15 A8 VDD I/O TBD Pin AF0 RTC_REFIN
Pin AF1 TIM1_CH3N
Pin AF2 TIM12_CH2
Pin AF3 TIM8_CH3N
Pin AF4 USART1_RX
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF6 DFSDM1_CKIN2
Pin AF9 SDMMC2_D1
Pin AF15 EVENTOUT
J1.65 PB3 CPU.PB3 A7 VDD I/O TBD Pin AF0 TRACED9
Pin AF1 TIM2_CH2
Pin AF4 SAI4_CK1
Pin AF5 SPI1_SCK/I2S1_CK
Pin AF6 SPI3_SCK/I2S3_CK
Pin AF8 SPI6_SCK
Pin AF9 SDMMC2_D2
Pin AF12 SAI4_MCLK_A
Pin AF13 UART7_RX
Pin AF15 EVENTOUT
J1.67 PB4 CPU.PB4 B9 VDD I/O TBD Pin AF0 TRACED8
Pin AF1 TIM16_BKIN
Pin AF2 TIM3_CH1
Pin AF4 SAI4_CK2
Pin AF5 SPI1_MISO/I2S1_SDI
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 SPI2_NSS/I2S2_WS
Pin AF8 SPI6_MISO
Pin AF9 SDMMC2_D3
Pin AF12 SAI4_SCK_A
Pin AF13 UART7_TX
Pin AF15 EVENTOUT
J1.69 PG6 CPU.PG6 A6 VDD I/O TBD Pin AF0 TRACED14
Pin AF1 TIM17_BKIN
Pin AF10 SDMMC2_CMD
Pin AF13 DCMI_D12
Pin AF14 LCD_R7
Pin AF15 EVENTOUT
J1.71 PE3 CPU.PE3 A5 VDD I/O TBD Pin AF0 TRACED0
Pin AF4 TIM15_BKIN
Pin AF6 SAI1_SD_B
Pin AF9 SDMMC2_CK
Pin AF12 FMC_A19
Pin AF15 EVENTOUT
J1.73 DGND DGND - - G
J1.75 PC8 CPU.PC8 C11 VDD I/O TBD Pin AF0 TRACED0
Pin AF2 TIM3_CH3
Pin AF3 TIM8_CH3
Pin AF6 UART4_TX
Pin AF7 USART6_CK
Pin AF8 UART5_RTS/UART5_DE
Pin AF12 SDMMC1_D0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.77 PC9 CPU.PC9 A10 VDD I/O TBD Pin AF0 TRACED1
Pin AF2 TIM3_CH4
Pin AF3 TIM8_CH4
Pin AF4 I2C3_SDA
Pin AF5 I2S_CKIN
Pin AF8 UART5_CTS
Pin AF9 QUADSPI_BK1_IO0
Pin AF12 SDMMC1_D1
Pin AF13 DCMI_D3
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.79 PE6 CPU.PE6 B3 VDD I/O TBD Pin AF0 TRACED2
Pin AF1 TIM1_BKIN2
Pin AF2 SAI1_D1
Pin AF4 TIM15_CH2
Pin AF5 SPI4_MOSI
Pin AF6 SAI1_SD_A
Pin AF7 SDMMC2_D0
Pin AF8 SDMMC1_D2
Pin AF10 SAI2_MCLK_B
Pin AF12 FMC_A22
Pin AF13 DCMI_D7
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.81 PC11 CPU.PC11 A11 VDD I/O TBD Pin AF0 TRACED3
Pin AF3 DFSDM1_DATIN5
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 USART3_RX
Pin AF8 UART4_RX
Pin AF9 QUADSPI_BK2_NCS
Pin AF10 SAI4_SCK_B
Pin AF12 SDMMC1_D3
Pin AF13 DCMI_D4
Pin AF15 EVENTOUT
J1.83 PD2 CPU.PD2 B10 VDD I/O TBD Pin AF2 TIM3_ETR
Pin AF4 I2C5_SMBA
Pin AF6 UART4_RX
Pin AF8 UART5_RX
Pin AF12 SDMMC1_CMD
Pin AF13 DCMI_D11
Pin AF15 EVENTOUT
J1.85 PC12 CPU.PC12 C10 VDD I/O TBD Pin AF0 TRACECLK
Pin AF1 MCO2
Pin AF2 SAI4_D3
Pin AF6 SPI3_MOSI/I2S3_SDO
Pin AF7 USART3_CK
Pin AF8 UART5_TX
Pin AF10 SAI4_SD_B
Pin AF12 SDMMC1_CK
Pin AF13 DCMI_D9
Pin AF15 EVENTOUT
J1.87 DGND DGND - - G
J1.89 PD8 CPU.PD8 F2 VDD I/O TBD Pin AF3 DFSDM1_CKIN3
Pin AF6 SAI3_SCK_B
Pin AF7 USART3_TX
Pin AF9 SPDIFRX_IN2
Pin AF12 FMC_AD13/FMC_D13
Pin AF14 LCD_B7
Pin AF15 EVENTOUT
J1.91 PD9 CPU.PD9 G3 VDD I/O TBD Pin AF3 DFSDM1_DATIN3
Pin AF6 SAI3_SD_B
Pin AF7 USART3_RX
Pin AF12 FMC_AD14/FMC_D14
Pin AF13 DCMI_HSYNC
Pin AF14 LCD_B0
Pin AF15 EVENTOUT
J1.93 PC2 CPU.PC2 T2 VDD I/O TBD Pin AF3 DFSDM1_CKIN1
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_CKOUT
Pin AF11 ETH1_GMII_TXD2/

ETH1_MII_TXD2/

ETH1_RGMII_TXD2

Pin AF13 DCMI_PIXCLK
Pin AF15 EVENTOUT
J1.95 PA0 CPU.PA0 R3 VDD I/O TBD Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 TIM5_CH1
Pin AF3 TIM8_ETR
Pin AF4 TIM15_BKIN
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 UART4_TX
Pin AF9 SDMMC2_CMD
Pin AF10 SAI2_SD_B
Pin AF11 ETH1_GMII_CRS/

ETH1_MII_CRS

Pin AF15 EVENTOUT
J1.97 PD13 CPU.PD13 U12 VDD I/O TBD Pin AF1 LPTIM1_OUT
Pin AF2 TIM4_CH2
Pin AF4 I2C4_SDA
Pin AF5 I2C1_SDA
Pin AF6 I2S3_MCK
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D7
Pin AF10 SDMMC2_D123DIR
Pin AF11 SDMMC1_D7
Pin AF12 FMC_CLK
Pin AF13 DCMI_D5
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.99 PD12 CPU.PD12 U11 VDD I/O TBD Pin AF1 LPTIM1_IN1
Pin AF2 TIM4_CH1
Pin AF3 LPTIM2_IN1
Pin AF4 I2C4_SCL
Pin AF5 I2C1_SCL
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 QUADSPI_BK1_IO1
Pin AF10 SAI2_FS_A
Pin AF12 FMC_A17/FMC_ALE
Pin AF15 EVENTOUT
J1.101 PD11 CPU.PD11 V8 VDD I/O TBD Pin AF3 LPTIM2_IN2
Pin AF4 I2C4_SMBA
Pin AF5 I2C1_SMBA
Pin AF7 USART3_CTS/USART3_NSS
Pin AF9 QUADSPI_BK1_IO0
Pin AF10 SAI2_SD_A
Pin AF12 FMC_A16/FMC_CLE
Pin AF15 EVENTOUT
J1.103 - NC - - -
J1.105 PG9 CPU.PG9 T14 VDD I/O TBD Pin AF0 DBTRGO
Pin AF7 USART6_RX
Pin AF8 SPDIFRX_IN4
Pin AF9 QUADSPI_BK2_IO2
Pin AF10 SAI2_FS_B
Pin AF12 FMC_NE2/FMC_NCE
Pin AF13 DCMI_VSYNC
Pin AF14 LCD_R1
Pin AF15 EVENTOUT
J1.107 - NC - - -
J1.109 DGND DGND - - G
J1.111 DSI_CKN CPU.DSI_CKN A14 - D
J1.113 DSI_CKP CPU.DSI_CKP B14 - D
J1.115 DSI_D0N CPU.DSI_D0N A13 - D
J1.117 DSI_D0P DSI_D0P B13 - D
J1.119 DSI_D1N CPU.DSI_D1N A15 - D
J1.121 DSI_D1P CPU.DSI_D1P B15 - D
J1.123 - NC - - -
J1.125 - NC - - -
J1.127 - NC - - -
J1.129 - NC - - -
J1.131 DGND DGND - - G
J1.133 ADP5589_R7 EXP.R7 1 VDD I/O TBD Pin AF0 Keypad row 7
Pin AF5 GPIO 8
J1.135 ADP5589_R6 EXP.R6 2 VDD I/O TBD Pin AF0 Keypad row 6
Pin AF5 GPIO 7
J1.137 ADP5589_R5 EXP.R5 3 VDD I/O TBD Pin AF0 Keypad row 5
Pin AF5 GPIO 6
J1.139 ADP5589_R4 EXP.R4 4 VDD I/O TBD Pin AF0 Keypad row 4
Pin AF1 RESET1
Pin AF5 GPIO 5
J1.141 ADP5589_R3 EXP.R3 5 VDD I/O TBD Pin AF0 Keypad row 3
Pin AF1 Logic LC1
Pin AF2 PWM_OUT
Pin AF3 CLK_OUT
Pin AF5 GPIO 4
J1.143 ADP5589_R2 EXP.R2 6 VDD I/O TBD Pin AF0 Keypad row 2
Pin AF1 LOGIC LB1
Pin AF5 GPIO 3
J1.145 ADP5589_R1 EXP.R1 7 VDD I/O TBD Pin AF0 Keypad row 1
Pin AF1 Logic LA1
Pin AF5 GPIO 2
J1.147 ADP5589_R0 EXP.R0 8 VDD I/O TBD Pin AF0 Keypad row 0
Pin AF1 Logic LY1
Pin AF5 GPIO 1
J1.149 ADP5589_C0 EXP.C0 9 VDD I/O TBD Pin AF0 Keypad column 0
Pin AF5 GPIO 9
J1.151 ADP5589_C1 EXP.C1 10 VDD I/O TBD Pin AF0 Keypad column 1
Pin AF5 GPIO 10
J1.153 DGND DGND - - G
J1.155 ADP5589_C2 EXP.C2 11 VDD I/O TBD Pin AF0 Keypad column 2
Pin AF5 GPIO 11
J1.157 ADP5589_C3 EXP.C3 12 VDD I/O TBD Pin AF0 Keypad column 3
Pin AF5 GPIO 12
J1.159 ADP5589_C4 EXP.C4 13 VDD I/O TBD Pin AF0 Keypad column 4
Pin AF1 RESET2
Pin AF5 GPIO 13
J1.161 ADP5589_C5 EXP.C5 14 VDD I/O TBD Pin AF0 Keypad column 5
Pin AF5 GPIO 14
J1.163 ADP5589_C6 EXP.C6 15 VDD I/O TBD Pin AF0 Keypad column 6
Pin AF1 Logic LC2
Pin AF2 PWM_IN
Pin AF3 CLK_IN
Pin AF5 GPIO 15
J1.165 ADP5589_C7 EXP.C7 16 VDD I/O TBD Pin AF0 Keypad column 7
Pin AF1 Logic LB2
Pin AF5 GPIO 16
J1.167 ADP5589_C8 EXP.C8 19 VDD I/O TBD Pin AF0 Keypad column 8
Pin AF1 Logic LA2
Pin AF5 GPIO 17
J1.169 ADP5589_C9 EXP.C9 20 VDD I/O TBD Pin AF0 Keypad column 9
Pin AF1 Logic LY2
Pin AF5 GPIO 18
J1.171 ADP5589_C10 EXP.C10 21 VDD I/O TBD Pin AF0 Keypad column 10
Pin AF5 GPIO 19
J1.173 - NC - - -
J1.175 DGND DGND - - G
J1.177 PE9 CPU.PE9 W7 VDD I/O TBD Pin AF1 TIM1_CH1
Pin AF3 DFSDM1_CKOUT
Pin AF7 UART7_RTS/UART7_DE
Pin AF10 QUADSPI_BK2_IO2
Pin AF12 FMC_AD6/FMC_D6
Pin AF15 EVENTOUT
J1.179 PC3 CPU.PC3 T3 VDD I/O TBD Pin AF0 TRACECLK
Pin AF3 DFSDM1_DATIN1
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF11 ETH1_GMII_TX_CLK/

ETH1_MII_TX_CLK

Pin AF15 EVENTOUT
J1.181 PD6 CPU.PD6 E3 VDD I/O TBD Pin AF1 TIM16_CH1N
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN4
Pin AF4 DFSDM1_DATIN1
Pin AF5 SPI3_MOSI/I2S3_SDO
Pin AF6 SAI1_SD_A
Pin AF7 USART2_RX
Pin AF12 FMC_NWAIT
Pin AF13 DCMI_D10
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.183 PE10 CPU.PE10 V10 VDD I/O TBD Pin AF1 TIM1_CH2N
Pin AF3 DFSDM1_DATIN4
Pin AF7 UART7_CTS
Pin AF10 QUADSPI_BK2_IO3
Pin AF12 FMC_AD7/FMC_D7
Pin AF15 EVENTOUT
J1.185 VBUS_OTG_OUT PMIC.VBUSOTG 35 VBUSOTG S USB OTG VOUT
J1.187 PG11 CPU.PG11 V6 VDD I/O TBD Pin AF0 TRACED11
Pin AF4 USART1_TX
Pin AF6 UART4_TX
Pin AF8 SPDIFRX_IN1
Pin AF11 ETH1_GMII_TX_EN/

ETH1_MII_TX_EN/

ETH1_RGMII_TX_CTL/

ETH1_RMII_TX_EN

Pin AF13 DCMI_D3
Pin AF14 LCD_B3
Pin AF15 EVENTOUT
J1.189 PB2 CPU.PB2 T13 VDD I/O TBD Pin AF0 TRACED4
Pin AF1 RTC_OUT2
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN1
Pin AF4 USART1_RX
Pin AF5 I2S_CKIN
Pin AF6 SAI1_SD_A
Pin AF7 SPI3_MOSI/I2S3_SDO
Pin AF8 UART4_RX
Pin AF9 QUADSPI_CLK
Pin AF15 EVENTOUT
J1.191 PE1 CPU.PE1 B1 VDD I/O TBD Pin AF1 LPTIM1_IN2
Pin AF5 I2S2_MCK
Pin AF6 SAI3_SD_B
Pin AF8 UART8_TX
Pin AF12 FMC_NBL1
Pin AF13 DCMI_D3
Pin AF15 EVENTOUT
J1.193 PE0 CPU.PE0 C4 VDD I/O TBD Pin AF1 LPTIM1_ETR
Pin AF2 TIM4_ETR
Pin AF4 LPTIM2_ETR
Pin AF5 SPI3_SCK/I2S3_CK
Pin AF6 SAI4_MCLK_B
Pin AF8 UART8_RX
Pin AF10 SAI2_MCLK_A
Pin AF12 FMC_NBL0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.195 PE2 CPU.PE2 T1 VDD I/O TBD Pin AF0 TRACECLK
Pin AF2 SAI1_CK1
Pin AF4 I2C4_SCL
Pin AF5 SPI4_SCK
Pin AF6 SAI1_MCLK_A
Pin AF9 QUADSPI_BK1_IO2
Pin AF11 ETH1_GMII_TXD3/

ETH1_MII_TXD3/

ETH1_RGMII_TXD3

Pin AF12 FMC_A23
Pin AF15 EVENTOUT
J1.197 PA13 CPU.PA13 P2 VDD I/O TBD Pin AF0 DBTRGO
Pin AF1 DBTRGI
Pin AF2 MCO1
Pin AF8 UART4_TX
Pin AF15 EVENTOUT
J1.199 PD14 CPU.PD14 F3 VDD I/O TBD Pin AF2 TIM4_CH3
Pin AF6 SAI3_MCLK_B
Pin AF8 UART8_CTS
Pin AF12 FMC_AD0/FMC_D0
Pin AF15 EVENTOUT
J1.201 PD15 CPU.PD15 G1 VDD I/O TBD Pin AF2 TIM4_CH4
Pin AF6 SAI3_MCLK_A
Pin AF8 UART8_CTS
Pin AF12 FMC_AD1/FMC_D1
Pin AF15 EVENTOUT
J1.203 DGND DGND - - G

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.2 DGND DGND - - G
J1.4 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.6 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.8 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.10 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.12 DGND DGND - - G
J1.14 VBAT CPU.VBAT H3 VBAT S BACKUP VOLTAGE
J1.16 PONKEYn PMIC.PONKEYN 17 3.3VIN I
J1.18 SOM_PGOOD - - VDD O
J1.20 BOOT_MODE0 CPU.BOOT0 K1 VDD I internall pull-up or pull-down

according to specific model

J1.22 PWR_ON CPU.PWR_ON L1 VDD O
J1.24 NRST CPU.NRST

PMIC.RSTN

eMMC.RST_n

NOR.NRESET

J1

1

K5

A4

VDD I/O TBD
J1.26 BOOT_MODE1 CPU.BOOT1 K4 VDD I internall pull-up or pull-down

according to specific model

J1.28 PA9 CPU.PA9 C8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.30 DGND DGND - - G
J1.32 WAKEUP PMIC.WAKEUP 2 VINTLDO I
J1.34 PB13 CPU.PB13 T9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.36 BOOT_MODE2 CPU-BOOT2 L2 VDD I internall pull-up or pull-down

according to specific model

J1.38 PA11 CPU.PA11 V17 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.40 MEM_WP# NAND.NWP

NOR.NWP

19

C4

VDD I internal pull-up to VDD
J1.42 PB6 CPU.PB6 T12 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.44 PB7 CPU.PB7 B5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.46 PE14 CPU.PE14 D3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.48 PA12 CPU.PA12 U16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.50 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.52 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.54 PMIC_INT# PMIC-INTN 43 VDD O
J1.56 DGND DGND - - G
J1.58 PA14 CPU.PA14 R1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.60 VDD VOLTAGE OUTPUT - VDD S
J1.62 VDD VOLTAGE OUTPUT - VDD S
J1.64 1V8 PMIC.LDO6OUT 21 1V8 S Spare LDO output
J1.66 PG12 CPU.PG12 F1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.68 PB5 CPU.PB5 T8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.70 PG8 CPU.PG8 U7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.72 PA8 CPU.PA8 B8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.74 PF7 CPU.PF7 W8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.76 PF9 CPU.PF9 W9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.78 PF8 CPU.PF8 U10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.80 PF6 CPU.PF6 V9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.82 DGND DGND - - G
J1.84 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.86 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.88 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.90 JTMS-SWDIO CPU.JTMS-SWDIO D15 VDD I/O TBD
J1.92 JTDI CPU.JTDI D13 VDD I/O TBD
J1.94 NJTRST CPU.NJTRST D12 VDD I/O TBD
J1.96 JTDO-TRACESWOO CPU.JTDO-TRACESWOO D14 VDD I/O TBD
J1.98 JTCK-SWCLK CPU.JTCK-SWCLK D16 VDD I/O TBD
J1.100 DGND DGND - - G
J1.102 NRST_CORE CPU.NRST_CORE J2 VDD I internally connected to NRST
J1.104 PDR_ON CPU.PDR_ON N2 VDD I
J1.106 PDR_ON_CORE CPU.PDR_ON_CORE N1 VDD I
J1.108 PWR_LP CPU.PWR_LP P1 VDD O
J1.110 - NC - - -
J1.112 - NC - - -
J1.114 - NC - - -
J1.116 - NC - - -
J1.118 - NC - - -
J1.120 - NC - - -
J1.122 DGND DGND - - G
J1.124 PE13 CPU.PE13 C2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.126 PC13 CPU.PC13 K3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.128 PA4 CPU.PA4 R4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.130 PC6_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.132 PG7 CPU.PG7 W10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.134 PG10 CPU.PG10 V7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.136 PD10 CPU.PD10 C5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.138 PE12 CPU.PE12 D2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.140 PA3 CPU.PA3 P3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.142 PB8 CPU.PB8 W6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.144 PB9 CPU.PB9 D9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.146 DGND DGND - - G
J1.148 PA6 CPU.PA6 T5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.150 PE11 CPU.PE11 C1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.152 PB10 CPU.PB10 W5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.154 PF11 CPU.PF11 U5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.156 PC7 CPU.PC7 A9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.158 PD3_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.160 PC10 CPU.PC10 D11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.162 PB0 CPU.PB0 W3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.164 DGND DGND - - G
J1.166 PA5 CPU.PA5 P4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.168 PC0 CPU.PC0 T7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.170 PB1 CPU.PB1 V3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.172 PE15 CPU.PE15 E1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.174 PE4_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.176 PA10 CPU.PA10 T16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.178 PE5 CPU.PE5 B7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.180 PE6_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.182 PG13 CPU.PG13 U2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.184 PA15_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.186 VBUS_OTG_IN CPU.OTG_VBUS U15 VBUS_OTG_IN S TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.188 VBUS_SW PMIC.SWOUT 38 VBUS_SW S TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.190 DGND DGND - - G
J1.192 - NC - - -
J1.194 - NC - - -
J1.196 USB_DM2 CPU.USB_DM2 V13 - D
J1.198 USB_DP2 CPU.USB_DP2 W13 - D
J1.200 USB_DP1 CPU.USB_DP1 V14 - D
J1.202 USB_DM1 CPU.USB_DM1 W14 - D
J1.204 DGND DGND - - G

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