Difference between revisions of "ETRA SOM/ETRA Hardware/Pinout Table"

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(Add ODD pinout)
(Add EVEN pinout)
Line 70: Line 70:
 
* LAN.<x> : pin connected to the LAN PHY ''KSZ8091RNAIA''
 
* LAN.<x> : pin connected to the LAN PHY ''KSZ8091RNAIA''
 
* NOR.<x>: pin connected to the flash NOR
 
* NOR.<x>: pin connected to the flash NOR
−
* SV.<x>: pin connected to voltage supervisor
+
* NAND.<x>: pin connected to the flash NAND
−
* MTR: pin connected to voltage monitors
+
* eMMC.<x>: pin connected to the flash eMMC
 
* EXP.<x>: pin connected to the I/O EXPANDER ''ADP5589ACPZ''
 
* EXP.<x>: pin connected to the I/O EXPANDER ''ADP5589ACPZ''
 
|-
 
|-
Line 250: Line 250:
 
|S
 
|S
 
|Spare LDO output
 
|Spare LDO output
−
default 1.8V
 
−
 
−
max 350mA
 
 
|
 
|
 
|
 
|
Line 263: Line 260:
 
|S
 
|S
 
|Spare LDO output
 
|Spare LDO output
−
default 2.9V
 
−
 
−
max 350mA
 
 
|
 
|
 
|
 
|
Line 1,670: Line 1,664:
 
|S
 
|S
 
|USB OTG VOUT
 
|USB OTG VOUT
−
5V max 0.5A
 
 
|
 
|
 
|
 
|
Line 1,874: Line 1,867:
 
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
 
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
 
|-
 
|-
−
| rowspan="5" |J1.2
+
|J1.2
−
| rowspan="5" |SD2_CMD
+
|DGND
−
| rowspan="5" |CPU.SD2_CMD
+
|DGND
−
| rowspan="5" |F19
+
| -
−
| rowspan="5" |AXEL_IO_3V3
+
| -
−
| rowspan="5" |IO
+
|G
−
| rowspan="5" |Notes
+
|
−
|Pin ALT-0
+
|
−
|SD2_CMD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.4
−
|ECSPI5_MOSI
+
|3.3VIN
 +
|INPUT VOLTAGE
 +
| -
 +
|3.3VIN
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.6
−
|KEY_ROW5
+
|3.3VIN
 +
|INPUT VOLTAGE
 +
| -
 +
|3.3VIN
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.8
−
|AUD4_RXC
+
|3.3VIN
 +
|INPUT VOLTAGE
 +
| -
 +
|3.3VIN
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.10
−
|GPIO1_IO11
+
|3.3VIN
 +
|INPUT VOLTAGE
 +
| -
 +
|3.3VIN
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.4
+
|J1.12
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.14
−
|TBD
+
|VBAT
 +
|CPU.VBAT
 +
|H3
 +
|VBAT
 +
|S
 +
|BACKUP VOLTAGE
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.16
−
|TBD
+
|PONKEYn
 +
|PMIC.PONKEYN
 +
|17
 +
|3.3VIN
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.18
−
|TBD
+
|SOM_PGOOD
 +
| -
 +
| -
 +
|VDD
 +
|O
 +
|
 +
|
 +
|
 +
|-
 +
|J1.20
 +
|BOOT_MODE0
 +
|CPU.BOOT0
 +
|K1
 +
|VDD
 +
|I
 +
|internall pull-up or pull-down
 +
according to specific model
 +
|
 +
|
 +
|-
 +
|J1.22
 +
|PWR_ON
 +
|CPU.PWR_ON
 +
|L1
 +
|VDD
 +
|O
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.24
 +
|NRST
 +
|CPU.NRST
 +
PMIC.RSTN
 +
 
 +
eMMC.RST_n
 +
 
 +
NOR.NRESET
 +
|J1
 +
1
 +
 
 +
K5
 +
 
 +
A4
 +
|VDD
 +
|I/O
 
|TBD
 
|TBD
 +
|
 +
|
 +
|-
 +
|J1.26
 +
|BOOT_MODE1
 +
|CPU.BOOT1
 +
|K4
 +
|VDD
 +
|I
 +
|internall pull-up or pull-down
 +
according to specific model
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.6
+
| rowspan="5" |J1.28
−
| rowspan="5" |TBD
+
| rowspan="5" |PA9
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PA9
−
| rowspan="5" |TBD
+
| rowspan="5" |C8
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 1,940: Line 2,031:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.8
+
|J1.30
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
 +
|
 +
|
 +
|
 +
|-
 +
|J1.32
 +
|WAKEUP
 +
|PMIC.WAKEUP
 +
|2
 +
|VINTLDO
 +
|I
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.34
 +
| rowspan="5" |PB13
 +
| rowspan="5" |CPU.PB13
 +
| rowspan="5" |T9
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 1,962: Line 2,073:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.10
+
|J1.36
−
| rowspan="5" |TBD
+
|BOOT_MODE2
−
| rowspan="5" |TBD
+
|CPU-BOOT2
−
| rowspan="5" |TBD
+
|L2
−
| rowspan="5" |TBD
+
|VDD
−
| rowspan="5" |TBD
+
|I
 +
|internall pull-up or pull-down
 +
according to specific model
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.38
 +
| rowspan="5" |PA11
 +
| rowspan="5" |CPU.PA11
 +
| rowspan="5" |V17
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 1,984: Line 2,106:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.12
+
|J1.40
 +
|MEM_WP#
 +
|NAND.NWP
 +
NOR.NWP
 +
|19
 +
C4
 +
|VDD
 +
|I
 +
|internal pull-up to VDD
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.42
 +
| rowspan="5" |PB6
 +
| rowspan="5" |CPU.PB6
 +
| rowspan="5" |T12
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
−
| rowspan="5" |TBD
+
|Pin ALT-0
−
| rowspan="5" |TBD
+
|TBD
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
 
|Pin ALT-1
 
|Pin ALT-1
Line 2,006: Line 2,140:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.14
+
| rowspan="5" |J1.44
−
| rowspan="5" |TBD
+
| rowspan="5" |PB7
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PB7
−
| rowspan="5" |TBD
+
| rowspan="5" |B5
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,028: Line 2,162:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.16
+
| rowspan="5" |J1.46
−
| rowspan="5" |TBD
+
| rowspan="5" |PE14
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PE14
−
| rowspan="5" |TBD
+
| rowspan="5" |D3
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,050: Line 2,184:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.18
+
| rowspan="5" |J1.48
−
| rowspan="5" |TBD
+
| rowspan="5" |PA12
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PA12
−
| rowspan="5" |TBD
+
| rowspan="5" |U16
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,072: Line 2,206:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.20
+
|J1.50
−
| rowspan="5" |TBD
+
|BST_OUT
−
| rowspan="5" |TBD
+
|PMIC.BST_OUT
−
| rowspan="5" |TBD
+
|34
−
| rowspan="5" |TBD
+
|BST_OUT
−
| rowspan="5" |TBD
+
|S
−
| rowspan="5" |TBD
+
|BOOST OUTPUT
−
|Pin ALT-0
+
|
−
|TBD
+
|
 +
|-
 +
|J1.52
 +
|BST_OUT
 +
|PMIC.BST_OUT
 +
|34
 +
|BST_OUT
 +
|S
 +
|BOOST OUTPUT
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.54
−
|TBD
+
|PMIC_INT#
 +
|PMIC-INTN
 +
|43
 +
|VDD
 +
|O
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.56
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="5" |J1.58
−
|TBD
+
| rowspan="5" |PA14
−
|-
+
| rowspan="5" |CPU.PA14
−
|Pin ALT-5
+
| rowspan="5" |R1
−
|TBD
+
| rowspan="5" |VDD
−
|-
+
| rowspan="5" |I/O
−
| rowspan="5" |J1.22
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,116: Line 2,268:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.24
+
|J1.60
−
| rowspan="5" |TBD
+
|VDD
−
| rowspan="5" |TBD
+
|VOLTAGE OUTPUT
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|VDD
−
| rowspan="5" |TBD
+
|S
 +
|
 +
|
 +
|
 +
|-
 +
|J1.62
 +
|VDD
 +
|VOLTAGE OUTPUT
 +
| -
 +
|VDD
 +
|S
 +
|
 +
|
 +
|
 +
|-
 +
|J1.64
 +
|1V8
 +
|PMIC.LDO6OUT
 +
|21
 +
|1V8
 +
|S
 +
|Spare LDO output
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.66
 +
| rowspan="5" |PG12
 +
| rowspan="5" |CPU.PG12
 +
| rowspan="5" |F1
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,138: Line 2,320:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.26
+
| rowspan="5" |J1.68
−
| rowspan="5" |TBD
+
| rowspan="5" |PB5
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PB5
−
| rowspan="5" |TBD
+
| rowspan="5" |T8
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,160: Line 2,342:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.28
+
| rowspan="5" |J1.70
 +
| rowspan="5" |PG8
 +
| rowspan="5" |CPU.PG8
 +
| rowspan="5" |U7
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
−
| rowspan="5" |TBD
+
|Pin ALT-0
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
 
|TBD
 
|TBD
 
|-
 
|-
Line 2,182: Line 2,364:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.30
+
| rowspan="5" |J1.72
−
| rowspan="5" |TBD
+
| rowspan="5" |PA8
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PA8
−
| rowspan="5" |TBD
+
| rowspan="5" |B8
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,204: Line 2,386:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.32
+
| rowspan="5" |J1.74
−
| rowspan="5" |TBD
+
| rowspan="5" |PF7
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PF7
−
| rowspan="5" |TBD
+
| rowspan="5" |W8
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,226: Line 2,408:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.34
+
| rowspan="5" |J1.76
−
| rowspan="5" |TBD
+
| rowspan="5" |PF9
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PF9
−
| rowspan="5" |TBD
+
| rowspan="5" |W9
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,248: Line 2,430:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.36
+
| rowspan="5" |J1.78
−
| rowspan="5" |TBD
+
| rowspan="5" |PF8
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PF8
−
| rowspan="5" |TBD
+
| rowspan="5" |U10
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,270: Line 2,452:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.38
+
| rowspan="5" |J1.80
−
| rowspan="5" |TBD
+
| rowspan="5" |PF6
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PF6
−
| rowspan="5" |TBD
+
| rowspan="5" |V9
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,292: Line 2,474:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.40
+
|J1.82
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.84
−
|TBD
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.86
−
|TBD
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.88
−
|TBD
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.90
 +
|JTMS-SWDIO
 +
|CPU.JTMS-SWDIO
 +
|D15
 +
|VDD
 +
|I/O
 
|TBD
 
|TBD
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.42
+
|J1.92
−
| rowspan="5" |TBD
+
|JTDI
−
| rowspan="5" |TBD
+
|CPU.JTDI
−
| rowspan="5" |TBD
+
|D13
−
| rowspan="5" |TBD
+
|VDD
−
| rowspan="5" |TBD
+
|I/O
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
 
|TBD
 
|TBD
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.94
 +
|NJTRST
 +
|CPU.NJTRST
 +
|D12
 +
|VDD
 +
|I/O
 
|TBD
 
|TBD
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.96
 +
|JTDO-TRACESWOO
 +
|CPU.JTDO-TRACESWOO
 +
|D14
 +
|VDD
 +
|I/O
 
|TBD
 
|TBD
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.98
 +
|JTCK-SWCLK
 +
|CPU.JTCK-SWCLK
 +
|D16
 +
|VDD
 +
|I/O
 
|TBD
 
|TBD
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.100
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.44
+
|J1.102
−
| rowspan="5" |TBD
+
|NRST_CORE
−
| rowspan="5" |TBD
+
|CPU.NRST_CORE
−
| rowspan="5" |TBD
+
|J2
−
| rowspan="5" |TBD
+
|VDD
−
| rowspan="5" |TBD
+
|I
−
| rowspan="5" |TBD
+
|internally connected to NRST
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.104
−
|TBD
+
|PDR_ON
 +
|CPU.PDR_ON
 +
|N2
 +
|VDD
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.106
−
|TBD
+
|PDR_ON_CORE
 +
|CPU.PDR_ON_CORE
 +
|N1
 +
|VDD
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.108
−
|TBD
+
|PWR_LP
 +
|CPU.PWR_LP
 +
|P1
 +
|VDD
 +
|O
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.110
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.46
+
|J1.112
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|NC
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.114
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.116
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.118
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.120
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.48
+
|J1.122
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.124
 +
| rowspan="5" |PE13
 +
| rowspan="5" |CPU.PE13
 +
| rowspan="5" |C2
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,402: Line 2,706:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.50
+
| rowspan="5" |J1.126
−
| rowspan="5" |TBD
+
| rowspan="5" |PC13
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PC13
−
| rowspan="5" |TBD
+
| rowspan="5" |K3
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,424: Line 2,728:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.52
+
| rowspan="5" |J1.128
−
| rowspan="5" |TBD
+
| rowspan="5" |PA4
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PA4
−
| rowspan="5" |TBD
+
| rowspan="5" |R4
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,446: Line 2,750:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.54
+
| rowspan="5" |J1.130
−
| rowspan="5" |TBD
+
| rowspan="5" |PC6_OPT
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,468: Line 2,772:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.56
+
| rowspan="5" |J1.132
−
| rowspan="5" |TBD
+
| rowspan="5" |PG7
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PG7
−
| rowspan="5" |TBD
+
| rowspan="5" |W10
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,490: Line 2,794:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.58
+
| rowspan="5" |J1.134
−
| rowspan="5" |TBD
+
| rowspan="5" |PG10
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PG10
−
| rowspan="5" |TBD
+
| rowspan="5" |V7
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,512: Line 2,816:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.60
+
| rowspan="5" |J1.136
−
| rowspan="5" |TBD
+
| rowspan="5" |PD10
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PD10
−
| rowspan="5" |TBD
+
| rowspan="5" |C5
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,534: Line 2,838:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.62
+
| rowspan="5" |J1.138
−
| rowspan="5" |TBD
+
| rowspan="5" |PE12
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PE12
−
| rowspan="5" |TBD
+
| rowspan="5" |D2
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,556: Line 2,860:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.64
+
| rowspan="5" |J1.140
−
| rowspan="5" |TBD
+
| rowspan="5" |PA3
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PA3
−
| rowspan="5" |TBD
+
| rowspan="5" |P3
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,578: Line 2,882:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.66
+
| rowspan="5" |J1.142
 +
| rowspan="5" |PB8
 +
| rowspan="5" |CPU.PB8
 +
| rowspan="5" |W6
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
−
| rowspan="5" |TBD
+
|Pin ALT-0
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
 
|TBD
 
|TBD
 
|-
 
|-
Line 2,600: Line 2,904:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.68
+
| rowspan="5" |J1.144
−
| rowspan="5" |TBD
+
| rowspan="5" |PB9
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PB9
−
| rowspan="5" |TBD
+
| rowspan="5" |D9
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,622: Line 2,926:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.70
+
|J1.146
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.148
 +
| rowspan="5" |PA6
 +
| rowspan="5" |CPU.PA6
 +
| rowspan="5" |T5
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,644: Line 2,958:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.72
+
| rowspan="5" |J1.150
 +
| rowspan="5" |PE11
 +
| rowspan="5" |CPU.PE11
 +
| rowspan="5" |C1
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
−
| rowspan="5" |TBD
+
|Pin ALT-0
−
| rowspan="5" |TBD
+
|TBD
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
 
|Pin ALT-1
 
|Pin ALT-1
Line 2,666: Line 2,980:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.74
+
| rowspan="5" |J1.152
−
| rowspan="5" |TBD
+
| rowspan="5" |PB10
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PB10
−
| rowspan="5" |TBD
+
| rowspan="5" |W5
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,688: Line 3,002:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.76
+
| rowspan="5" |J1.154
−
| rowspan="5" |TBD
+
| rowspan="5" |PF11
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PF11
−
| rowspan="5" |TBD
+
| rowspan="5" |U5
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,710: Line 3,024:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.78
+
| rowspan="5" |J1.156
−
| rowspan="5" |TBD
+
| rowspan="5" |PC7
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PC7
−
| rowspan="5" |TBD
+
| rowspan="5" |A9
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,732: Line 3,046:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.80
+
| rowspan="5" |J1.158
 +
| rowspan="5" |PD3_OPT
 +
| rowspan="5" | -
 +
| rowspan="5" | -
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
−
| rowspan="5" |TBD
+
|Pin ALT-0
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
 
|TBD
 
|TBD
 
|-
 
|-
Line 2,754: Line 3,068:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.82
+
| rowspan="5" |J1.160
−
| rowspan="5" |TBD
+
| rowspan="5" |PC10
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PC10
−
| rowspan="5" |TBD
+
| rowspan="5" |D11
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,776: Line 3,090:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.84
+
| rowspan="5" |J1.162
−
| rowspan="5" |TBD
+
| rowspan="5" |PB0
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PB0
−
| rowspan="5" |TBD
+
| rowspan="5" |W3
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,798: Line 3,112:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.86
+
|J1.164
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="5" |J1.166
 +
| rowspan="5" |PA5
 +
| rowspan="5" |CPU.PA5
 +
| rowspan="5" |P4
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,820: Line 3,144:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.88
+
| rowspan="5" |J1.168
−
| rowspan="5" |TBD
+
| rowspan="5" |PC0
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PC0
−
| rowspan="5" |TBD
+
| rowspan="5" |T7
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,842: Line 3,166:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.90
+
| rowspan="5" |J1.170
−
| rowspan="5" |TBD
+
| rowspan="5" |PB1
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PB1
−
| rowspan="5" |TBD
+
| rowspan="5" |V3
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,864: Line 3,188:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.92
+
| rowspan="5" |J1.172
−
| rowspan="5" |TBD
+
| rowspan="5" |PE15
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PE15
−
| rowspan="5" |TBD
+
| rowspan="5" |E1
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,886: Line 3,210:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.94
+
| rowspan="5" |J1.174
−
| rowspan="5" |TBD
+
| rowspan="5" |PE4_OPT
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,908: Line 3,232:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.96
+
| rowspan="5" |J1.176
−
| rowspan="5" |TBD
+
| rowspan="5" |PA10
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PA10
−
| rowspan="5" |TBD
+
| rowspan="5" |T16
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,930: Line 3,254:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.98
+
| rowspan="5" |J1.178
−
| rowspan="5" |TBD
+
| rowspan="5" |PE5
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PE5
−
| rowspan="5" |TBD
+
| rowspan="5" |B7
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,952: Line 3,276:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.100
+
| rowspan="5" |J1.180
−
| rowspan="5" |TBD
+
| rowspan="5" |PE6_OPT
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,974: Line 3,298:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.102
+
| rowspan="5" |J1.182
−
| rowspan="5" |TBD
+
| rowspan="5" |PG13
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.PG13
−
| rowspan="5" |TBD
+
| rowspan="5" |U2
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 2,996: Line 3,320:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.104
+
| rowspan="5" |J1.184
−
| rowspan="5" |TBD
+
| rowspan="5" |PA15_OPT
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" | -
−
| rowspan="5" |TBD
+
| rowspan="5" |VDD
−
| rowspan="5" |TBD
+
| rowspan="5" |I/O
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 3,018: Line 3,342:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.106
+
| rowspan="5" |J1.186
−
| rowspan="5" |TBD
+
| rowspan="5" |VBUS_OTG_IN
−
| rowspan="5" |TBD
+
| rowspan="5" |CPU.OTG_VBUS
−
| rowspan="5" |TBD
+
| rowspan="5" |U15
−
| rowspan="5" |TBD
+
| rowspan="5" |VBUS_OTG_IN
−
| rowspan="5" |TBD
+
| rowspan="5" |S
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 3,040: Line 3,364:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.108
+
| rowspan="5" |J1.188
−
| rowspan="5" |TBD
+
| rowspan="5" |VBUS_SW
−
| rowspan="5" |TBD
+
| rowspan="5" |PMIC.SWOUT
−
| rowspan="5" |TBD
+
| rowspan="5" |38
−
| rowspan="5" |TBD
+
| rowspan="5" |VBUS_SW
−
| rowspan="5" |TBD
+
| rowspan="5" |S
 
| rowspan="5" |TBD
 
| rowspan="5" |TBD
 
|Pin ALT-0
 
|Pin ALT-0
Line 3,062: Line 3,386:
 
|TBD
 
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.110
+
|J1.190
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
|DGND
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|G
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.192
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.194
−
|TBD
+
| -
−
|-
+
|NC
−
|Pin ALT-3
+
| -
−
|TBD
+
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.196
−
|TBD
+
|USB_DM2
 +
|CPU.USB_DM2
 +
|V13
 +
| -
 +
|D
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.112
+
|J1.198
−
| rowspan="5" |TBD
+
|USB_DP2
−
| rowspan="5" |TBD
+
|CPU.USB_DP2
−
| rowspan="5" |TBD
+
|W13
−
| rowspan="5" |TBD
+
| -
−
| rowspan="5" |TBD
+
|D
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.200
−
|TBD
+
|USB_DP1
 +
|CPU.USB_DP1
 +
|V14
 +
| -
 +
|D
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.202
−
|TBD
+
|USB_DM1
 +
|CPU.USB_DM1
 +
|W14
 +
| -
 +
|D
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.204
−
|TBD
+
|DGND
−
|-
+
|DGND
−
|Pin ALT-5
+
| -
−
|TBD
+
| -
−
|-
+
|G
−
| rowspan="5" |J1.114
+
|
−
| rowspan="5" |TBD
+
|
−
| rowspan="5" |TBD
+
|
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.116
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.118
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.120
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.122
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.124
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.126
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.128
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.130
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.132
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.134
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.136
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.138
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.140
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.142
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.144
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.146
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.148
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.150
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.152
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.154
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.156
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.158
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.160
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.162
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.164
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.166
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.168
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.170
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.172
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.174
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.176
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.178
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.180
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.182
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.184
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.186
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.188
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.190
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.192
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.194
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.196
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.198
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.200
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.202
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.204
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
 
|-
 
|-
 
|}
 
|}

Revision as of 16:33, 28 December 2020

HOME SOMs SBCs ToloMEO Embedded Assistant Sale-tag.pngGET A QUOTE Customer-service.pngONLINE HELPDESK
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History
Version Issue Date Notes
X.Y.Z Month Year TBD
[TBD_link X.Y.Z] Month Year TBD
... ... ...


TBD: modificare la tabella seguente con le caratteristiche dei pin del SOM

TBD: modificare le due tabelle ODD e EVEN con la mappa completa dei pins

TBD: nella tabella naming conventions, inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)

Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ETRA:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR3 edge connector 204 pin TE Connectivity 2-2013289-1

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:

File:ETRA-top.png
ETRA TOP view
File:ETRA-bottom.png
ETRA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the TBD: connector type ETRA connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ETRA connectors
Internal
connections 		Connections to the ETRA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • PMIC.<x> : pin connected to the Power Manager IC STPMIC1APQR
  • LAN.<x> : pin connected to the LAN PHY KSZ8091RNAIA
  • NOR.<x>: pin connected to the flash NOR
  • NAND.<x>: pin connected to the flash NAND
  • eMMC.<x>: pin connected to the flash eMMC
  • EXP.<x>: pin connected to the I/O EXPANDER ADP5589ACPZ
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 DGND DGND - - G
J1.3 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.5 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.7 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.9 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.11 DGND DGND - - G
J1.13 ETH_LED LAN.LED0/PME_N1 23 VDD I/O
J1.15 - NC - - -
J1.17 DGND DGND - - G
J1.19 ETH_TX_P LAN.TXP 6 - D
J1.21 ETH_TX_M LAN.TXM 5 - D
J1.23 ETH_RX_P LAN.RXP 4 - D
J1.25 ETH_RX_M LAN.RXM 3 - D
J1.27 LDO2 PMIC.LDO2OUT 18 LDO2 S Spare LDO output
J1.29 LDO5 PMIC.LDO5OUT 20 LDO5 S Spare LDO output
J1.31 - NC - - -
J1.33 - NC - - -
J1.35 DGND DGND - - G
J1.37 PD1 CPU.PD1 A4 VDD I/O Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.39 PD4 CPU.PD4 D6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.41 PD5 CPU.PD5 D7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.43 PD7 CPU.PD7 B4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.45 PD0 CPU.PD0 A3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.47 PG15 CPU.PG15 A2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.49 PF10 CPU.PF10 U9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.51 PE7 CPU.PE7 T10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.53 PE8 CPU.PE8 T11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.55 - NC - - -
J1.57 DGND DGND - - G
J1.59 - NC - - -
J1.61 PB14 CPU.PB14 C9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.63 PB15 CPU.PB15 A8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.65 PB3 CPU.PB3 A7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.67 PB4 CPU.PB4 B9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.69 PG6 CPU.PG6 A6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.71 PE3 CPU.PE3 A5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.73 DGND DGND - - G
J1.75 PC8 CPU.PC8 C11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.77 PC9 CPU.PC9 A10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.79 PE6 CPU.PE6 B3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.81 PC11 CPU.PC11 A11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.83 PD2 CPU.PD2 B10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.85 PC12 CPU.PC12 C10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.87 DGND DGND - - G
J1.89 PD8 CPU.PD8 F2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.91 PD9 CPU.PD9 G3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.93 PC2 CPU.PC2 T2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.95 PA0 CPU.PA0 R3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.97 PD13 CPU.PD13 U12 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.99 PD12 CPU.PD12 U11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.101 PD11 CPU.PD11 V8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.103 - NC - - -
J1.105 PG9 CPU.PG9 T14 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.107 - NC - - -
J1.109 DGND DGND - - G
J1.111 DSI_CKN CPU.DSI_CKN A14 - D
J1.113 DSI_CKP CPU.DSI_CKP B14 - D
J1.115 DSI_D0N CPU.DSI_D0N A13 - D
J1.117 DSI_D0P DSI_D0P B13 - D
J1.119 DSI_D1N CPU.DSI_D1N A15 - D
J1.121 DSI_D1P CPU.DSI_D1P B15 - D
J1.123 - NC - - -
J1.125 - NC - - -
J1.127 - NC - - -
J1.129 - NC - - -
J1.131 DGND DGND - - G
J1.133 ADP5589_R7 EXP.R7 1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.135 ADP5589_R6 EXP.R6 2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.137 ADP5589_R5 EXP.R5 3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.139 ADP5589_R4 EXP.R4 4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.141 ADP5589_R3 EXP.R3 5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.143 ADP5589_R2 EXP.R2 6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.145 ADP5589_R1 EXP.R1 7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.147 ADP5589_R0 EXP.R0 8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.149 ADP5589_C0 EXP.C0 9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.151 ADP5589_C1 EXP.C1 10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.153 DGND DGND - - G
J1.155 ADP5589_C2 EXP.C2 11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.157 ADP5589_C3 EXP.C3 12 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.159 ADP5589_C4 EXP.C4 13 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.161 ADP5589_C5 EXP.C5 14 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.163 ADP5589_C6 EXP.C6 15 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.165 ADP5589_C7 EXP.C7 16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.167 ADP5589_C8 EXP.C8 19 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.169 ADP5589_C9 EXP.C9 20 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.171 ADP5589_C10 EXP.C10 21 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.173 - NC - - -
J1.175 DGND DGND - - G
J1.177 PE9 CPU.PE9 W7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.179 PC3 CPU.PC3 T3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.181 PD6 CPU.PD6 E3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.183 PE10 CPU.PE10 V10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.185 VBUS_OTG_OUT PMIC.VBUSOTG 35 VBUSOTG S USB OTG VOUT
J1.187 PG11 CPU.PG11 V6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.189 PB2 CPU.PB2 T13 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.191 PE1 CPU.PE1 B1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.193 PE0 CPU.PE0 C4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.195 PE2 CPU.PE2 T1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.197 PA13 CPU.PA13 P2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.199 PD14 CPU.PD14 F3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.201 PD15 CPU.PD15 G1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.203 DGND DGND - - G

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.2 DGND DGND - - G
J1.4 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.6 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.8 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.10 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.12 DGND DGND - - G
J1.14 VBAT CPU.VBAT H3 VBAT S BACKUP VOLTAGE
J1.16 PONKEYn PMIC.PONKEYN 17 3.3VIN I
J1.18 SOM_PGOOD - - VDD O
J1.20 BOOT_MODE0 CPU.BOOT0 K1 VDD I internall pull-up or pull-down

according to specific model

J1.22 PWR_ON CPU.PWR_ON L1 VDD O
J1.24 NRST CPU.NRST

PMIC.RSTN

eMMC.RST_n

NOR.NRESET

J1

1

K5

A4

VDD I/O TBD
J1.26 BOOT_MODE1 CPU.BOOT1 K4 VDD I internall pull-up or pull-down

according to specific model

J1.28 PA9 CPU.PA9 C8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.30 DGND DGND - - G
J1.32 WAKEUP PMIC.WAKEUP 2 VINTLDO I
J1.34 PB13 CPU.PB13 T9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.36 BOOT_MODE2 CPU-BOOT2 L2 VDD I internall pull-up or pull-down

according to specific model

J1.38 PA11 CPU.PA11 V17 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.40 MEM_WP# NAND.NWP

NOR.NWP

19

C4

VDD I internal pull-up to VDD
J1.42 PB6 CPU.PB6 T12 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.44 PB7 CPU.PB7 B5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.46 PE14 CPU.PE14 D3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.48 PA12 CPU.PA12 U16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.50 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.52 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.54 PMIC_INT# PMIC-INTN 43 VDD O
J1.56 DGND DGND - - G
J1.58 PA14 CPU.PA14 R1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.60 VDD VOLTAGE OUTPUT - VDD S
J1.62 VDD VOLTAGE OUTPUT - VDD S
J1.64 1V8 PMIC.LDO6OUT 21 1V8 S Spare LDO output
J1.66 PG12 CPU.PG12 F1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.68 PB5 CPU.PB5 T8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.70 PG8 CPU.PG8 U7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.72 PA8 CPU.PA8 B8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.74 PF7 CPU.PF7 W8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.76 PF9 CPU.PF9 W9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.78 PF8 CPU.PF8 U10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.80 PF6 CPU.PF6 V9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.82 DGND DGND - - G
J1.84 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.86 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.88 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.90 JTMS-SWDIO CPU.JTMS-SWDIO D15 VDD I/O TBD
J1.92 JTDI CPU.JTDI D13 VDD I/O TBD
J1.94 NJTRST CPU.NJTRST D12 VDD I/O TBD
J1.96 JTDO-TRACESWOO CPU.JTDO-TRACESWOO D14 VDD I/O TBD
J1.98 JTCK-SWCLK CPU.JTCK-SWCLK D16 VDD I/O TBD
J1.100 DGND DGND - - G
J1.102 NRST_CORE CPU.NRST_CORE J2 VDD I internally connected to NRST
J1.104 PDR_ON CPU.PDR_ON N2 VDD I
J1.106 PDR_ON_CORE CPU.PDR_ON_CORE N1 VDD I
J1.108 PWR_LP CPU.PWR_LP P1 VDD O
J1.110 - NC - - -
J1.112 - NC - - -
J1.114 - NC - - -
J1.116 - NC - - -
J1.118 - NC - - -
J1.120 - NC - - -
J1.122 DGND DGND - - G
J1.124 PE13 CPU.PE13 C2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.126 PC13 CPU.PC13 K3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.128 PA4 CPU.PA4 R4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.130 PC6_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.132 PG7 CPU.PG7 W10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.134 PG10 CPU.PG10 V7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.136 PD10 CPU.PD10 C5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.138 PE12 CPU.PE12 D2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.140 PA3 CPU.PA3 P3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.142 PB8 CPU.PB8 W6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.144 PB9 CPU.PB9 D9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.146 DGND DGND - - G
J1.148 PA6 CPU.PA6 T5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.150 PE11 CPU.PE11 C1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.152 PB10 CPU.PB10 W5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.154 PF11 CPU.PF11 U5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.156 PC7 CPU.PC7 A9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.158 PD3_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.160 PC10 CPU.PC10 D11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.162 PB0 CPU.PB0 W3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.164 DGND DGND - - G
J1.166 PA5 CPU.PA5 P4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.168 PC0 CPU.PC0 T7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.170 PB1 CPU.PB1 V3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.172 PE15 CPU.PE15 E1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.174 PE4_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.176 PA10 CPU.PA10 T16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.178 PE5 CPU.PE5 B7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.180 PE6_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.182 PG13 CPU.PG13 U2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.184 PA15_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.186 VBUS_OTG_IN CPU.OTG_VBUS U15 VBUS_OTG_IN S TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.188 VBUS_SW PMIC.SWOUT 38 VBUS_SW S TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.190 DGND DGND - - G
J1.192 - NC - - -
J1.194 - NC - - -
J1.196 USB_DM2 CPU.USB_DM2 V13 - D
J1.198 USB_DP2 CPU.USB_DP2 W13 - D
J1.200 USB_DP1 CPU.USB_DP1 V14 - D
J1.202 USB_DM1 CPU.USB_DM1 W14 - D
J1.204 DGND DGND - - G

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