Difference between revisions of "ETRA SOM/ETRA Hardware/Pinout Table"

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(Add EVEN pinout)
 
(25 intermediate revisions by 2 users not shown)
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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
|-  
 
|-  
−
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
 
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
|-
 
|-
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |X.Y.Z
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|13190|2020/12/31}}
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Month Year
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First release
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |TBD
 
 
|-
 
|-
 +
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18542|2023/06/09}}
 +
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
 
|-
 
|-
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |[TBD_link X.Y.Z]
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18979|2023/11/23}}
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Month Year
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |TBD
 
 
|-
 
|-
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
+
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |2023/11/28
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
+
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Add pinmux spreadsheet download
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
 
 
|-
 
|-
 
|}
 
|}
−
<section end="History" />
 
−
<section begin="Body" />
 
−
''TBD:  modificare la tabella seguente con le caratteristiche dei pin del SOM''
 
−
 
−
''TBD:  modificare le due tabelle ODD e EVEN con la mappa completa dei pins''
 
−
 
−
'''TBD:  nella tabella naming conventions,  inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)'''
 
  
 +
<section end="History" /><section begin="Body" /><section end="History" /><section begin="Body" />
 
==Connectors and Pinout Table==
 
==Connectors and Pinout Table==
  
 
=== Connectors description ===
 
=== Connectors description ===
−
In the following table are described all available connectors integrated on [[ETRA]]:
+
In the following table are described all available connectors integrated on [[ETRA SOM]]:
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
Line 47: Line 39:
 
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
 
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
  
−
[[File:ETRA-top.png|500px|thumb|ETRA TOP view|none]]
+
[[File:ETRA_SOM_-_top_pin1_203.png|500px|thumb|ETRA TOP view|none]]
−
[[File:ETRA-bottom.png|500px|thumb|ETRA BOTTOM view|none]]
+
[[File:ETRA_SOM_-_bottom_pin2_204.png|500px|thumb|ETRA BOTTOM view|none]]
  
 
===Pinout table naming conventions ===
 
===Pinout table naming conventions ===
  
−
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the ''TBD: connector type'' ETRA connector.
+
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the SODIMM-DDR3 edge connector.
  
 
Each row in the pinout tables contains the following information:
 
Each row in the pinout tables contains the following information:
Line 100: Line 92:
 
|-
 
|-
 
|}
 
|}
 +
 +
===Pinout table XLS file ===
 +
For your convenience, please find a spreadsheet with the STM32MP15x pinout and pinmux table [https://www.dave.eu/links/p/2hxFRECdQPg6uJOy here].
  
 
==Pinout Table ODD pins declaration ==
 
==Pinout Table ODD pins declaration ==
Line 184: Line 179:
 
|-
 
|-
 
|J1.15
 
|J1.15
−
| -
+
| VINTLDO
−
|NC
+
|PMIC.INTLDO
−
| -
+
|40
−
| -
+
|INTLDO
−
| -
+
|S
−
|
+
|do not connect
 
|
 
|
 
|
 
|
Line 274: Line 269:
 
|-
 
|-
 
|J1.33
 
|J1.33
−
| -
+
|ETH_INT
−
|NC
+
|LAN.INTRP
−
| -
+
|18
−
| -
+
|VDD
−
| -
+
|O
−
|
+
|open drain with internal pull-up to VDD
 
|
 
|
 
|
 
|
Line 293: Line 288:
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.37
+
|J1.37
−
| rowspan="5" |PD1
+
(NAND on board)
−
| rowspan="5" |CPU.PD1
+
|PD1
−
| rowspan="5" |A4
+
|CPU.PD1
−
| rowspan="5" |VDD
+
|A4
−
| rowspan="5" |I/O
+
|VDD
−
| rowspan="5" |
+
|I/O
−
|Pin ALT-0
+
|internally used for NAND flash,
−
|TBD
+
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="10" |J1.37
−
|TBD
+
| rowspan="10" |PD1
 +
| rowspan="10" |CPU.PD1
 +
| rowspan="10" |A4
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF2
 +
|I2C6_SCL
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF3
−
|TBD
+
|DFSDM1_DATIN6
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF4
−
|TBD
+
|I2C5_SCL
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SAI3_SD_A
 
|-
 
|-
−
| rowspan="5" |J1.39
+
|Pin AF8
−
| rowspan="5" |PD4
+
|UART4_TX
−
| rowspan="5" |CPU.PD4
 
−
| rowspan="5" |D6
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|FDCAN1_TX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SDMMC3_D0
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF11
−
|TBD
+
|DFSDM1_CKIN7
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|FMC_AD3/FMC_D3
 
|-
 
|-
−
| rowspan="5" |J1.41
+
|Pin AF15
−
| rowspan="5" |PD5
+
|EVENTOUT
−
| rowspan="5" |CPU.PD5
 
−
| rowspan="5" |D7
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.39
−
|TBD
+
(NAND on board)
 +
|PD4
 +
|CPU.PD4
 +
|D6
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="6" |J1.39
−
|TBD
+
| rowspan="6" |PD4
 +
| rowspan="6" |CPU.PD4
 +
| rowspan="6" |D6
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF6
 +
|SAI3_FS_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF7
−
|TBD
+
|USART2_RTS/USART2_DE
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF10
−
|TBD
+
|SDMMC3_D1
 
|-
 
|-
−
| rowspan="5" |J1.43
+
|Pin AF11
−
| rowspan="5" |PD7
+
|DFSDM1_CKIN0
−
| rowspan="5" |CPU.PD7
 
−
| rowspan="5" |B4
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF12
−
|TBD
+
|FMC_NOE
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.41
−
|TBD
+
(NAND on board)
 +
|PD5
 +
|CPU.PD5
 +
|D7
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="4" |J1.41
 +
| rowspan="4" |PD5
 +
| rowspan="4" |CPU.PD5
 +
| rowspan="4" |D7
 +
| rowspan="4" |VDD
 +
| rowspan="4" |I/O
 +
| rowspan="4" |
 +
|Pin AF7
 +
|USART2_TX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF10
−
|TBD
+
|SDMMC3_D2
 
|-
 
|-
−
| rowspan="5" |J1.45
+
|Pin AF12
−
| rowspan="5" |PD0
+
|FMC_NWE
−
| rowspan="5" |CPU.PD0
+
|-
−
| rowspan="5" |A3
+
|Pin AF15
−
| rowspan="5" |VDD
+
|EVENTOUT
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="9" |J1.43
−
|TBD
+
| rowspan="9" |PD7
 +
| rowspan="9" |CPU.PD7
 +
| rowspan="9" |B4
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|TRACED6
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF3
−
|TBD
+
|DFSDM1_DATIN4
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF4
−
|TBD
+
|I2C2_SCL
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|DFSDM1_CKIN1
 
|-
 
|-
−
| rowspan="5" |J1.47
+
|Pin AF7
−
| rowspan="5" |PG15
+
|USART2_CK
−
| rowspan="5" |CPU.PG15
 
−
| rowspan="5" |A2
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|SPDIFRX_IN1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SDMMC3_D3
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF12
−
|TBD
+
|FMC_NE1
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="5" |J1.49
+
|J1.45
−
| rowspan="5" |PF10
+
 
−
| rowspan="5" |CPU.PF10
+
(NAND on board)
−
| rowspan="5" |U9
+
|PD0
−
| rowspan="5" |VDD
+
|CPU.PD0
−
| rowspan="5" |I/O
+
|A3
−
| rowspan="5" |TBD
+
|VDD
−
|Pin ALT-0
+
|I/O
−
|TBD
+
|internally used for NAND flash,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="10" |J1.45
−
|TBD
+
| rowspan="10" |PD0
 +
| rowspan="10" |CPU.PD0
 +
| rowspan="10" |A3
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF2
 +
|I2C6_SDA
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF3
−
|TBD
+
|DFSDM1_CKIN6
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF4
−
|TBD
+
|I2C5_SDA
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SAI3_SCK_A
 
|-
 
|-
−
| rowspan="5" |J1.51
+
|Pin AF8
−
| rowspan="5" |PE7
+
|UART4_RX
−
| rowspan="5" |CPU.PE7
 
−
| rowspan="5" |T10
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|FDCAN1_RX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SDMMC3_CMD
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF11
−
|TBD
+
|DFSDM1_DATIN7
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|FMC_AD2/FMC_D2
 
|-
 
|-
−
| rowspan="5" |J1.53
+
|Pin AF15
−
| rowspan="5" |PE8
+
|EVENTOUT
−
| rowspan="5" |CPU.PE8
 
−
| rowspan="5" |T11
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="8" |J1.47
−
|TBD
+
| rowspan="8" |PG15
 +
| rowspan="8" |CPU.PG15
 +
| rowspan="8" |A2
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |
 +
|Pin AF0
 +
|TRACED7
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF2
−
|TBD
+
|SAI1_D2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF4
−
|TBD
+
|I2C2_SDA
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SAI1_FS_A
 
|-
 
|-
−
|J1.55
+
|Pin AF7
−
| -
+
|USART6_CTS/USART6_NSS
−
|NC
+
|-
−
| -
+
|Pin AF10
−
| -
+
|SDMMC3_CK
−
| -
+
|-
−
|
+
|Pin AF13
−
|
+
|DCMI_D13
−
|
+
|-
 +
|Pin AF15
 +
|EVENTOUT
 
|-
 
|-
−
|J1.57
+
|J1.49
−
|DGND
+
(NOR on board)
−
|DGND
+
|PF10
−
| -
+
|CPU.PF10
−
| -
+
|U9
−
|G
+
|VDD
−
|
+
|I/O
 +
|internally used for NOR flash,
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.59
+
| rowspan="9" |J1.49
−
| -
+
| rowspan="9" |PF10
−
|NC
+
| rowspan="9" |CPU.PF10
−
| -
+
| rowspan="9" |U9
−
| -
+
| rowspan="9" |VDD
−
| -
+
| rowspan="9" |I/O
−
|
+
| rowspan="9" |
−
|
+
|Pin AF1
−
|
+
|TIM16_BKIN
 
|-
 
|-
−
| rowspan="5" |J1.61
+
|Pin AF2
−
| rowspan="5" |PB14
+
|SAI1_D3
−
| rowspan="5" |CPU.PB14
 
−
| rowspan="5" |C9
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF3
−
|TBD
+
|SAI4_D4
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF6
−
|TBD
+
|SAI1_D4
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF9
−
|TBD
+
|QUADSPI_CLK
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|SAI4_D3
 
|-
 
|-
−
| rowspan="5" |J1.63
+
|Pin AF13
−
| rowspan="5" |PB15
+
|DCMI_D11
−
| rowspan="5" |CPU.PB15
 
−
| rowspan="5" |A8
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF14
−
|TBD
+
|LCD_DE
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.51
−
|TBD
+
(NAND on board)
 +
|PE7
 +
|CPU.PE7
 +
|T10
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="7" |J1.51
−
|TBD
+
| rowspan="7" |PE7
 +
| rowspan="7" |CPU.PE7
 +
| rowspan="7" |T10
 +
| rowspan="7" |VDD
 +
| rowspan="7" |I/O
 +
| rowspan="7" |
 +
|Pin AF1
 +
|TIM1_ETR
 
|-
 
|-
−
| rowspan="5" |J1.65
+
|Pin AF2
−
| rowspan="5" |PB3
+
|TIM3_ETR
−
| rowspan="5" |CPU.PB3
 
−
| rowspan="5" |A7
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF3
−
|TBD
+
|DFSDM1_DATIN2
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF7
−
|TBD
+
|UART7_RX
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF10
−
|TBD
+
|QUADSPI_BK2_IO0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|FMC_AD4/FMC_D4
 
|-
 
|-
−
| rowspan="5" |J1.67
+
|Pin AF15
−
| rowspan="5" |PB4
+
|EVENTOUT
−
| rowspan="5" |CPU.PB4
 
−
| rowspan="5" |B9
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.53
−
|TBD
+
(NAND on board)
 +
|PE8
 +
|CPU.PE8
 +
|T11
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="6" |J1.53
−
|TBD
+
| rowspan="6" |PE8
 +
| rowspan="6" |CPU.PE8
 +
| rowspan="6" |T11
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF1
 +
|TIM1_CH1N
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF3
−
|TBD
+
|DFSDM1_CKIN2
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF7
−
|TBD
+
|UART7_TX
 
|-
 
|-
−
| rowspan="5" |J1.69
+
|Pin AF10
−
| rowspan="5" |PG6
+
|QUADSPI_BK2_IO1
−
| rowspan="5" |CPU.PG6
 
−
| rowspan="5" |A6
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF12
−
|TBD
+
|FMC_AD5/FMC_D5
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.55
−
|TBD
+
|NOR_WP#
 +
|NOR.WPn
 +
|C4
 +
|VDD
 +
|I/O
 +
|internal pull-up to VDD,
 +
this NOR pin is shared with QSPI_IO2 function
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
|J1.57
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.71
+
|J1.59
−
| rowspan="5" |PE3
+
| -
−
| rowspan="5" |CPU.PE3
+
|NC
−
| rowspan="5" |A5
+
| -
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
|J1.73
 
−
|DGND
 
−
|DGND
 
 
| -
 
| -
 
| -
 
| -
−
|G
 
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.75
+
|J1.61
−
| rowspan="5" |PC8
+
(eMMC on board)
−
| rowspan="5" |CPU.PC8
+
|PB14
−
| rowspan="5" |C11
+
|CPU.PB14
−
| rowspan="5" |VDD
+
|C9
−
| rowspan="5" |I/O
+
|VDD
−
| rowspan="5" |TBD
+
|I/O
−
|Pin ALT-0
+
|internally used for eMMC flash,
−
|TBD
+
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="9" |J1.61
−
|TBD
+
| rowspan="9" |PB14
 +
| rowspan="9" |CPU.PB14
 +
| rowspan="9" |C9
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF1
 +
|TIM1_CH2N
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF2
−
|TBD
+
|TIM12_CH1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF3
−
|TBD
+
|TIM8_CH2N
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF4
−
|TBD
+
|USART1_TX
 
|-
 
|-
−
| rowspan="5" |J1.77
+
|Pin AF5
−
| rowspan="5" |PC9
+
|SPI2_MISO/I2S2_SDI
−
| rowspan="5" |CPU.PC9
 
−
| rowspan="5" |A10
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF6
−
|TBD
+
|DFSDM1_DATIN2
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF7
−
|TBD
+
|USART3_RTS/USART3_DE
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF9
−
|TBD
+
|SDMMC2_D0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="5" |J1.79
+
|J1.63
−
| rowspan="5" |PE6
+
 
−
| rowspan="5" |CPU.PE6
+
(eMMC on board)
−
| rowspan="5" |B3
+
|PB15
−
| rowspan="5" |VDD
+
|CPU.PB15
−
| rowspan="5" |I/O
+
|A8
−
| rowspan="5" |TBD
+
|VDD
−
|Pin ALT-0
+
|I/O
−
|TBD
+
|internally used for eMMC flash,
−
|-
+
 
−
|Pin ALT-1
+
do not connect
−
|TBD
+
|
 +
|
 +
|-
 +
| rowspan="9" |J1.63
 +
| rowspan="9" |PB15
 +
| rowspan="9" |CPU.PB15
 +
| rowspan="9" |A8
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|RTC_REFIN
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF1
−
|TBD
+
|TIM1_CH3N
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF2
−
|TBD
+
|TIM12_CH2
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF3
−
|TBD
+
|TIM8_CH3N
 
|-
 
|-
−
| rowspan="5" |J1.81
+
|Pin AF4
−
| rowspan="5" |PC11
+
|USART1_RX
−
| rowspan="5" |CPU.PC11
 
−
| rowspan="5" |A11
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF5
−
|TBD
+
|SPI2_MOSI/I2S2_SDO
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF6
−
|TBD
+
|DFSDM1_CKIN2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF9
−
|TBD
+
|SDMMC2_D1
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="5" |J1.83
+
|J1.65
−
| rowspan="5" |PD2
+
 
−
| rowspan="5" |CPU.PD2
+
(eMMC on board)
−
| rowspan="5" |B10
+
|PB3
−
| rowspan="5" |VDD
+
|CPU.PB3
−
| rowspan="5" |I/O
+
|A7
−
| rowspan="5" |TBD
+
|VDD
−
|Pin ALT-0
+
|I/O
−
|TBD
+
|internally used for eMMC flash,
 +
 
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="10" |J1.65
 +
| rowspan="10" |PB3
 +
| rowspan="10" |CPU.PB3
 +
| rowspan="10" |A7
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF0
 +
|TRACED9
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF1
−
|TBD
+
|TIM2_CH2
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF4
−
|TBD
+
|SAI4_CK1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|SPI1_SCK/I2S1_CK
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SPI3_SCK/I2S3_CK
 
|-
 
|-
−
| rowspan="5" |J1.85
+
|Pin AF8
−
| rowspan="5" |PC12
+
|SPI6_SCK
−
| rowspan="5" |CPU.PC12
 
−
| rowspan="5" |C10
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|SDMMC2_D2
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF12
−
|TBD
+
|SAI4_MCLK_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF13
−
|TBD
+
|UART7_RX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|J1.87
+
|J1.67
−
|DGND
+
 
−
|DGND
+
(eMMC on board)
−
| -
+
|PB4
−
| -
+
|CPU.PB4
−
|G
+
|B9
−
|
+
|VDD
 +
|I/O
 +
|internally used for eMMC flash,
 +
 
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.89
+
| rowspan="12" |J1.67
−
| rowspan="5" |PD8
+
| rowspan="12" |PB4
−
| rowspan="5" |CPU.PD8
+
| rowspan="12" |CPU.PB4
−
| rowspan="5" |F2
+
| rowspan="12" |B9
−
| rowspan="5" |VDD
+
| rowspan="12" |VDD
−
| rowspan="5" |I/O
+
| rowspan="12" |I/O
−
| rowspan="5" |TBD
+
| rowspan="12" |
−
|Pin ALT-0
+
|Pin AF0
−
|TBD
+
|TRACED8
 +
|-
 +
|Pin AF1
 +
|TIM16_BKIN
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF2
−
|TBD
+
|TIM3_CH1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF4
−
|TBD
+
|SAI4_CK2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|SPI1_MISO/I2S1_SDI
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SPI3_MISO/I2S3_SDI
 
|-
 
|-
−
| rowspan="5" |J1.91
+
|Pin AF7
−
| rowspan="5" |PD9
+
|SPI2_NSS/I2S2_WS
−
| rowspan="5" |CPU.PD9
+
|-
−
| rowspan="5" |G3
+
|Pin AF8
−
| rowspan="5" |VDD
+
|SPI6_MISO
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|SDMMC2_D3
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF12
−
|TBD
+
|SAI4_SCK_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF13
−
|TBD
+
|UART7_TX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="5" |J1.93
+
|J1.69
−
| rowspan="5" |PC2
+
(eMMC on board)
−
| rowspan="5" |CPU.PC2
+
|PG6
−
| rowspan="5" |T2
+
|CPU.PG6
−
| rowspan="5" |VDD
+
|A6
−
| rowspan="5" |I/O
+
|VDD
−
| rowspan="5" |TBD
+
|I/O
−
|Pin ALT-0
+
|internally used for eMMC flash,
−
|TBD
+
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="6" |J1.69
−
|TBD
+
| rowspan="6" |PG6
 +
| rowspan="6" |CPU.PG6
 +
| rowspan="6" |A6
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF0
 +
|TRACED14
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF1
−
|TBD
+
|TIM17_BKIN
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF10
−
|TBD
+
|SDMMC2_CMD
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF13
−
|TBD
+
|DCMI_D12
 
|-
 
|-
−
| rowspan="5" |J1.95
+
|Pin AF14
−
| rowspan="5" |PA0
+
|LCD_R7
−
| rowspan="5" |CPU.PA0
 
−
| rowspan="5" |R3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
|J1.71
−
|TBD
+
(eMMC on board)
 +
|PE3
 +
|CPU.PE3
 +
|A5
 +
|VDD
 +
|I/O
 +
|internally used for eMMC flash,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="6" |J1.71
−
|TBD
+
| rowspan="6" |PE3
 +
| rowspan="6" |CPU.PE3
 +
| rowspan="6" |A5
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF0
 +
|TRACED0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF4
−
|TBD
+
|TIM15_BKIN
 
|-
 
|-
−
| rowspan="5" |J1.97
+
|Pin AF6
−
| rowspan="5" |PD13
+
|SAI1_SD_B
−
| rowspan="5" |CPU.PD13
 
−
| rowspan="5" |U12
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|SDMMC2_CK
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF12
−
|TBD
+
|FMC_A19
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-5
+
|J1.73
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.99
+
| rowspan="9" |J1.75
−
| rowspan="5" |PD12
+
| rowspan="9" |PC8
−
| rowspan="5" |CPU.PD12
+
| rowspan="9" |CPU.PC8
−
| rowspan="5" |U11
+
| rowspan="9" |C11
−
| rowspan="5" |VDD
+
| rowspan="9" |VDD
−
| rowspan="5" |I/O
+
| rowspan="9" |I/O
−
| rowspan="5" |TBD
+
| rowspan="9" |
−
|Pin ALT-0
+
|Pin AF0
−
|TBD
+
|TRACED0
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF2
−
|TBD
+
|TIM3_CH3
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF3
−
|TBD
+
|TIM8_CH3
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF6
−
|TBD
+
|UART4_TX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF7
−
|TBD
+
|USART6_CK
 
|-
 
|-
−
| rowspan="5" |J1.101
+
|Pin AF8
−
| rowspan="5" |PD11
+
|UART5_RTS/UART5_DE
−
| rowspan="5" |CPU.PD11
+
|-
−
| rowspan="5" |V8
+
|Pin AF12
−
| rowspan="5" |VDD
+
|SDMMC1_D0
−
| rowspan="5" |I/O
+
|-
−
| rowspan="5" |TBD
+
|Pin AF13
−
|Pin ALT-0
+
|DCMI_D2
−
|TBD
+
|-
 +
|Pin AF15
 +
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="11" |J1.77
−
|TBD
+
| rowspan="11" |PC9
 +
| rowspan="11" |CPU.PC9
 +
| rowspan="11" |A10
 +
| rowspan="11" |VDD
 +
| rowspan="11" |I/O
 +
| rowspan="11" |
 +
|Pin AF0
 +
|TRACED1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF2
−
|TBD
+
|TIM3_CH4
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF3
−
|TBD
+
|TIM8_CH4
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF4
−
|TBD
+
|I2C3_SDA
 
|-
 
|-
−
|J1.103
+
|Pin AF5
−
| -
+
|I2S_CKIN
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.105
+
|Pin AF8
−
| rowspan="5" |PG9
+
|UART5_CTS
−
| rowspan="5" |CPU.PG9
 
−
| rowspan="5" |T14
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO0
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF12
−
|TBD
+
|SDMMC1_D1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF13
−
|TBD
+
|DCMI_D3
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF14
−
|TBD
+
|LCD_B2
 
|-
 
|-
−
|J1.107
+
|Pin AF15
−
| -
+
|EVENTOUT
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.109
+
| rowspan="13" |J1.79
−
|DGND
+
| rowspan="13" |PE6
−
|DGND
+
| rowspan="13" |CPU.PE6
−
| -
+
| rowspan="13" |B3
−
| -
+
| rowspan="13" |VDD
−
|G
+
| rowspan="13" |I/O
−
|
+
| rowspan="13" |for LCD_G1 function
−
|
+
use pin J1.180
−
|
+
 
 +
(RGB lenght match)
 +
|Pin AF0
 +
|TRACED2
 +
|-
 +
|Pin AF1
 +
|TIM1_BKIN2
 +
|-
 +
|Pin AF2
 +
|SAI1_D1
 +
|-
 +
|Pin AF4
 +
|TIM15_CH2
 +
|-
 +
|Pin AF5
 +
|SPI4_MOSI
 
|-
 
|-
−
|J1.111
+
|Pin AF6
−
|DSI_CKN
+
|SAI1_SD_A
−
|CPU.DSI_CKN
 
−
|A14
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.113
+
|Pin AF7
−
|DSI_CKP
+
|SDMMC2_D0
−
|CPU.DSI_CKP
 
−
|B14
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.115
+
|Pin AF8
−
|DSI_D0N
+
|SDMMC1_D2
−
|CPU.DSI_D0N
+
|-
−
|A13
+
|Pin AF10
−
| -
+
|SAI2_MCLK_B
−
|D
+
|-
−
|
+
|Pin AF12
−
|
+
|FMC_A22
−
|
+
|-
 +
|Pin AF13
 +
|DCMI_D7
 
|-
 
|-
−
|J1.117
+
|<s>Pin AF14</s>
−
|DSI_D0P
+
|<s>LCD_G1</s>
−
|DSI_D0P
 
−
|B13
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.119
+
|Pin AF15
−
|DSI_D1N
+
|EVENTOUT
−
|CPU.DSI_D1N
 
−
|A15
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.121
+
| rowspan="10" |J1.81
−
|DSI_D1P
+
| rowspan="10" |PC11
−
|CPU.DSI_D1P
+
| rowspan="10" |CPU.PC11
−
|B15
+
| rowspan="10" |A11
−
| -
+
| rowspan="10" |VDD
−
|D
+
| rowspan="10" |I/O
−
|
+
| rowspan="10" |
−
|
+
|Pin AF0
−
|
+
|TRACED3
 +
|-
 +
|Pin AF3
 +
|DFSDM1_DATIN5
 +
|-
 +
|Pin AF6
 +
|SPI3_MISO/I2S3_SDI
 +
|-
 +
|Pin AF7
 +
|USART3_RX
 
|-
 
|-
−
|J1.123
+
|Pin AF8
−
| -
+
|UART4_RX
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.125
+
|Pin AF9
−
| -
+
|QUADSPI_BK2_NCS
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.127
+
|Pin AF10
−
| -
+
|SAI4_SCK_B
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.129
+
|Pin AF12
−
| -
+
|SDMMC1_D3
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.131
+
|Pin AF13
−
|DGND
+
|DCMI_D4
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.133
+
|Pin AF15
−
| rowspan="5" |ADP5589_R7
+
|EVENTOUT
−
| rowspan="5" |EXP.R7
 
−
| rowspan="5" |1
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="7" |J1.83
−
|TBD
+
| rowspan="7" |PD2
 +
| rowspan="7" |CPU.PD2
 +
| rowspan="7" |B10
 +
| rowspan="7" |VDD
 +
| rowspan="7" |I/O
 +
| rowspan="7" |
 +
|Pin AF2
 +
|TIM3_ETR
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF4
−
|TBD
+
|I2C5_SMBA
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF6
−
|TBD
+
|UART4_RX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF8
−
|TBD
+
|UART5_RX
 
|-
 
|-
−
| rowspan="5" |J1.135
+
|Pin AF12
−
| rowspan="5" |ADP5589_R6
+
|SDMMC1_CMD
−
| rowspan="5" |EXP.R6
 
−
| rowspan="5" |2
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF13
−
|TBD
+
|DCMI_D11
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="10" |J1.85
−
|TBD
+
| rowspan="10" |PC12
 +
| rowspan="10" |CPU.PC12
 +
| rowspan="10" |C10
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF0
 +
|TRACECLK
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF1
−
|TBD
+
|MCO2
 
|-
 
|-
−
| rowspan="5" |J1.137
+
|Pin AF2
−
| rowspan="5" |ADP5589_R5
+
|SAI4_D3
−
| rowspan="5" |EXP.R5
 
−
| rowspan="5" |3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF6
−
|TBD
+
|SPI3_MOSI/I2S3_SDO
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF7
−
|TBD
+
|USART3_CK
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF8
−
|TBD
+
|UART5_TX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF10
−
|TBD
+
|SAI4_SD_B
 
|-
 
|-
−
| rowspan="5" |J1.139
+
|Pin AF12
−
| rowspan="5" |ADP5589_R4
+
|SDMMC1_CK
−
| rowspan="5" |EXP.R4
 
−
| rowspan="5" |4
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF13
−
|TBD
+
|DCMI_D9
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.87
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="7" |J1.89
−
|TBD
+
| rowspan="7" |PD8
 +
| rowspan="7" |CPU.PD8
 +
| rowspan="7" |F2
 +
| rowspan="7" |VDD
 +
| rowspan="7" |I/O
 +
| rowspan="7" |
 +
|Pin AF3
 +
|DFSDM1_CKIN3
 
|-
 
|-
−
| rowspan="5" |J1.141
+
|Pin AF6
−
| rowspan="5" |ADP5589_R3
+
|SAI3_SCK_B
−
| rowspan="5" |EXP.R3
 
−
| rowspan="5" |5
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF7
−
|TBD
+
|USART3_TX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF9
−
|TBD
+
|SPDIFRX_IN2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF12
−
|TBD
+
|FMC_AD13/FMC_D13
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF14
−
|TBD
+
|LCD_B7
 
|-
 
|-
−
| rowspan="5" |J1.143
+
|Pin AF15
−
| rowspan="5" |ADP5589_R2
+
|EVENTOUT
−
| rowspan="5" |EXP.R2
 
−
| rowspan="5" |6
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="7" |J1.91
−
|TBD
+
| rowspan="7" |PD9
 +
| rowspan="7" |CPU.PD9
 +
| rowspan="7" |G3
 +
| rowspan="7" |VDD
 +
| rowspan="7" |I/O
 +
| rowspan="7" |
 +
|Pin AF3
 +
|DFSDM1_DATIN3
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF6
−
|TBD
+
|SAI3_SD_B
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF7
−
|TBD
+
|USART3_RX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|FMC_AD14/FMC_D14
 
|-
 
|-
−
| rowspan="5" |J1.145
+
|Pin AF13
−
| rowspan="5" |ADP5589_R1
+
|DCMI_HSYNC
−
| rowspan="5" |EXP.R1
 
−
| rowspan="5" |7
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF14
−
|TBD
+
|LCD_B0
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.93
−
|TBD
+
(I/O EXP on board)
 +
|PC2
 +
|CPU.PC2
 +
|T2
 +
|VDD
 +
|I/O
 +
|internally used for I/O EXP,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="7" |J1.93
−
|TBD
+
| rowspan="7" |PC2
 +
| rowspan="7" |CPU.PC2
 +
| rowspan="7" |T2
 +
| rowspan="7" |VDD
 +
| rowspan="7" |I/O
 +
| rowspan="7" |
 +
|Pin AF3
 +
|DFSDM1_CKIN1
 
|-
 
|-
−
| rowspan="5" |J1.147
+
|Pin AF5
−
| rowspan="5" |ADP5589_R0
+
|SPI2_MISO/I2S2_SDI
−
| rowspan="5" |EXP.R0
 
−
| rowspan="5" |8
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF6
−
|TBD
+
|DFSDM1_CKOUT
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF11
−
|TBD
+
|ETH1_GMII_TXD2/
 +
 
 +
ETH1_MII_TXD2/
 +
 
 +
ETH1_RGMII_TXD2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF13
−
|TBD
+
|DCMI_PIXCLK
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="5" |J1.149
+
|Additional
−
| rowspan="5" |ADP5589_C0
+
functions
−
| rowspan="5" |EXP.C0
+
|ADC1_INP12
−
| rowspan="5" |9
+
 
−
| rowspan="5" |VDD
+
ADC1_INN11
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.95
−
|TBD
+
|PA0
 +
|CPU.PA0
 +
|R3
 +
|VDD
 +
|I/O
 +
|internally used for PMIC,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="11" |J1.97
−
|TBD
+
| rowspan="11" |PD13
 +
| rowspan="11" |CPU.PD13
 +
| rowspan="11" |U12
 +
| rowspan="11" |VDD
 +
| rowspan="11" |I/O
 +
| rowspan="11" |
 +
|Pin AF1
 +
|LPTIM1_OUT
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF2
−
|TBD
+
|TIM4_CH2
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF4
−
|TBD
+
|I2C4_SDA
 
|-
 
|-
−
| rowspan="5" |J1.151
+
|Pin AF5
−
| rowspan="5" |ADP5589_C1
+
|I2C1_SDA
−
| rowspan="5" |EXP.C1
 
−
| rowspan="5" |10
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF6
−
|TBD
+
|I2S3_MCK
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF8
−
|TBD
+
|SDMMC1_D123DIR
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO3
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF10
−
|TBD
+
|SAI2_SCK_A
 
|-
 
|-
−
|J1.153
+
|Pin AF12
−
|DGND
+
|FMC_A18
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.155
+
|Pin AF13
−
| rowspan="5" |ADP5589_C2
+
|DSI_TE
−
| rowspan="5" |EXP.C2
 
−
| rowspan="5" |11
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
|J1.99
−
|TBD
+
(NAND on board)
 +
|PD12
 +
|CPU.PD12
 +
|U11
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="10" |J1.99
−
|TBD
+
| rowspan="10" |PD12
 +
| rowspan="10" |CPU.PD12
 +
| rowspan="10" |U11
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF1
 +
|LPTIM1_IN1
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF2
−
|TBD
+
|TIM4_CH1
 
|-
 
|-
−
| rowspan="5" |J1.157
+
|Pin AF3
−
| rowspan="5" |ADP5589_C3
+
|LPTIM2_IN1
−
| rowspan="5" |EXP.C3
 
−
| rowspan="5" |12
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF4
−
|TBD
+
|I2C4_SCL
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF5
−
|TBD
+
|I2C1_SCL
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF7
−
|TBD
+
|USART3_RTS/USART3_DE
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO1
 
|-
 
|-
−
| rowspan="5" |J1.159
+
|Pin AF10
−
| rowspan="5" |ADP5589_C4
+
|SAI2_FS_A
−
| rowspan="5" |EXP.C4
 
−
| rowspan="5" |13
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF12
−
|TBD
+
|FMC_A17/FMC_ALE
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.101
−
|TBD
+
(NAND on board)
 +
|PD11
 +
|CPU.PD11
 +
|V8
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="8" |J1.101
−
|TBD
+
| rowspan="8" |PD11
 +
| rowspan="8" |CPU.PD11
 +
| rowspan="8" |V8
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |
 +
|Pin AF3
 +
|LPTIM2_IN2
 
|-
 
|-
−
| rowspan="5" |J1.161
+
|Pin AF4
−
| rowspan="5" |ADP5589_C5
+
|I2C4_SMBA
−
| rowspan="5" |EXP.C5
 
−
| rowspan="5" |14
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF5
−
|TBD
+
|I2C1_SMBA
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF7
−
|TBD
+
|USART3_CTS/USART3_NSS
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF10
−
|TBD
+
|SAI2_SD_A
 
|-
 
|-
−
| rowspan="5" |J1.163
+
|Pin AF12
−
| rowspan="5" |ADP5589_C6
+
|FMC_A16/FMC_CLE
−
| rowspan="5" |EXP.C6
 
−
| rowspan="5" |15
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
|J1.103
−
|TBD
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.105
−
|TBD
+
(NAND on board)
 +
|PG9
 +
|CPU.PG9
 +
|T14
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="9" |J1.105
−
|TBD
+
| rowspan="9" |PG9
 +
| rowspan="9" |CPU.PG9
 +
| rowspan="9" |T14
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|DBTRGO
 
|-
 
|-
−
| rowspan="5" |J1.165
+
|Pin AF7
−
| rowspan="5" |ADP5589_C7
+
|USART6_RX
−
| rowspan="5" |EXP.C7
 
−
| rowspan="5" |16
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF8
−
|TBD
+
|SPDIFRX_IN4
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK2_IO2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF10
−
|TBD
+
|SAI2_FS_B
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|FMC_NE2/FMC_NCE
 
|-
 
|-
−
| rowspan="5" |J1.167
+
|Pin AF13
−
| rowspan="5" |ADP5589_C8
+
|DCMI_VSYNC
−
| rowspan="5" |EXP.C8
 
−
| rowspan="5" |19
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF14
−
|TBD
+
|LCD_R1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|J1.107
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.169
 
−
| rowspan="5" |ADP5589_C9
 
−
| rowspan="5" |EXP.C9
 
−
| rowspan="5" |20
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.171
 
−
| rowspan="5" |ADP5589_C10
 
−
| rowspan="5" |EXP.C10
 
−
| rowspan="5" |21
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
|J1.173
 
 
| -
 
| -
 
|NC
 
|NC
Line 1,559: Line 1,514:
 
|
 
|
 
|-
 
|-
−
|J1.175
+
|J1.109
 
|DGND
 
|DGND
 
|DGND
 
|DGND
Line 1,569: Line 1,524:
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.177
+
|J1.111
−
| rowspan="5" |PE9
+
|DSI_CKN
−
| rowspan="5" |CPU.PE9
+
|CPU.DSI_CKN
−
| rowspan="5" |W7
+
|A14
−
| rowspan="5" |VDD
+
| -
−
| rowspan="5" |I/O
+
|D
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-5
+
|J1.113
−
|TBD
+
|DSI_CKP
 +
|CPU.DSI_CKP
 +
|B14
 +
| -
 +
|D
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.179
+
|J1.115
−
| rowspan="5" |PC3
+
|DSI_D0N
−
| rowspan="5" |CPU.PC3
+
|CPU.DSI_D0N
−
| rowspan="5" |T3
+
|A13
−
| rowspan="5" |VDD
+
| -
−
| rowspan="5" |I/O
+
|D
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.117
−
|TBD
+
|DSI_D0P
−
|-
+
|DSI_D0P
−
|Pin ALT-2
+
|B13
−
|TBD
+
| -
−
|-
+
|D
−
|Pin ALT-3
+
|
−
|TBD
+
|
−
|-
+
|
−
|Pin ALT-5
 
−
|TBD
 
 
|-
 
|-
−
| rowspan="5" |J1.181
+
|J1.119
−
| rowspan="5" |PD6
+
|DSI_D1N
−
| rowspan="5" |CPU.PD6
+
|CPU.DSI_D1N
−
| rowspan="5" |E3
+
|A15
−
| rowspan="5" |VDD
+
| -
−
| rowspan="5" |I/O
+
|D
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.121
−
|TBD
+
|DSI_D1P
 +
|CPU.DSI_D1P
 +
|B15
 +
| -
 +
|D
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.123
−
|TBD
+
| -
−
|-
+
|NC
−
|Pin ALT-3
+
| -
−
|TBD
+
| -
−
|-
+
| -
−
|Pin ALT-5
+
|
−
|TBD
+
|
−
|-
+
|
−
| rowspan="5" |J1.183
 
−
| rowspan="5" |PE10
 
−
| rowspan="5" |CPU.PE10
 
−
| rowspan="5" |V10
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.125
−
|TBD
+
| -
−
|-
+
|NC
−
|Pin ALT-2
+
| -
−
|TBD
+
| -
−
|-
+
| -
−
|Pin ALT-3
+
|
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
|J1.185
 
−
|VBUS_OTG_OUT
 
−
|PMIC.VBUSOTG
 
−
|35
 
−
|VBUSOTG
 
−
|S
 
−
|USB OTG VOUT
 
 
|
 
|
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.187
+
|J1.127
−
| rowspan="5" |PG11
+
| -
−
| rowspan="5" |CPU.PG11
+
|NC
−
| rowspan="5" |V6
+
| -
−
| rowspan="5" |VDD
+
| -
−
| rowspan="5" |I/O
+
| -
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 +
|-
 +
|J1.129
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.131
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="2" |J1.133
−
|TBD
+
| rowspan="2" |ADP5589_R7
 +
| rowspan="2" |EXP.R7
 +
| rowspan="2" |1
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad row 7
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|GPIO 8
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="2" |J1.135
−
|TBD
+
| rowspan="2" |ADP5589_R6
 +
| rowspan="2" |EXP.R6
 +
| rowspan="2" |2
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad row 6
 
|-
 
|-
−
| rowspan="5" |J1.189
+
|Pin AF5
−
| rowspan="5" |PB2
+
|GPIO 7
−
| rowspan="5" |CPU.PB2
 
−
| rowspan="5" |T13
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="2" |J1.137
−
|TBD
+
| rowspan="2" |ADP5589_R5
 +
| rowspan="2" |EXP.R5
 +
| rowspan="2" |3
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad row 5
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF5
−
|TBD
+
|GPIO 6
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="3" |J1.139
−
|TBD
+
| rowspan="3" |ADP5589_R4
 +
| rowspan="3" |EXP.R4
 +
| rowspan="3" |4
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad row 4
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF1
−
|TBD
+
|RESET1
 
|-
 
|-
−
| rowspan="5" |J1.191
+
|Pin AF5
−
| rowspan="5" |PE1
+
|GPIO 5
−
| rowspan="5" |CPU.PE1
+
|-
−
| rowspan="5" |B1
+
| rowspan="5" |J1.141
 +
| rowspan="5" |ADP5589_R3
 +
| rowspan="5" |EXP.R3
 +
| rowspan="5" |5
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |
−
|Pin ALT-0
+
|Pin AF0
−
|TBD
+
|Keypad row 3
 +
|-
 +
|Pin AF1
 +
|Logic LC1
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF2
−
|TBD
+
|PWM_OUT
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF3
−
|TBD
+
|CLK_OUT
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|GPIO 4
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="3" |J1.143
−
|TBD
+
| rowspan="3" |ADP5589_R2
 +
| rowspan="3" |EXP.R2
 +
| rowspan="3" |6
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad row 2
 
|-
 
|-
−
| rowspan="5" |J1.193
+
|Pin AF1
−
| rowspan="5" |PE0
+
|LOGIC LB1
−
| rowspan="5" |CPU.PE0
+
|-
−
| rowspan="5" |C4
+
|Pin AF5
−
| rowspan="5" |VDD
+
|GPIO 3
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="3" |J1.145
−
|TBD
+
| rowspan="3" |ADP5589_R1
 +
| rowspan="3" |EXP.R1
 +
| rowspan="3" |7
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad row 1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF1
−
|TBD
+
|Logic LA1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|GPIO 2
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="3" |J1.147
−
|TBD
+
| rowspan="3" |ADP5589_R0
 +
| rowspan="3" |EXP.R0
 +
| rowspan="3" |8
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad row 0
 
|-
 
|-
−
| rowspan="5" |J1.195
+
|Pin AF1
−
| rowspan="5" |PE2
+
|Logic LY1
−
| rowspan="5" |CPU.PE2
 
−
| rowspan="5" |T1
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF5
−
|TBD
+
|GPIO 1
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="2" |J1.149
−
|TBD
+
| rowspan="2" |ADP5589_C0
 +
| rowspan="2" |EXP.C0
 +
| rowspan="2" |9
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad column 0
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|GPIO 9
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="2" |J1.151
−
|TBD
+
| rowspan="2" |ADP5589_C1
 +
| rowspan="2" |EXP.C1
 +
| rowspan="2" |10
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad column 1
 
|-
 
|-
−
| rowspan="5" |J1.197
+
|Pin AF5
−
| rowspan="5" |PA13
+
|GPIO 10
−
| rowspan="5" |CPU.PA13
 
−
| rowspan="5" |P2
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.153
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="2" |J1.155
−
|TBD
+
| rowspan="2" |ADP5589_C2
 +
| rowspan="2" |EXP.C2
 +
| rowspan="2" |11
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad column 2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|GPIO 11
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="2" |J1.157
−
|TBD
+
| rowspan="2" |ADP5589_C3
 +
| rowspan="2" |EXP.C3
 +
| rowspan="2" |12
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad column 3
 
|-
 
|-
−
| rowspan="5" |J1.199
+
|Pin AF5
−
| rowspan="5" |PD14
+
|GPIO 12
−
| rowspan="5" |CPU.PD14
 
−
| rowspan="5" |F3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="3" |J1.159
−
|TBD
+
| rowspan="3" |ADP5589_C4
 +
| rowspan="3" |EXP.C4
 +
| rowspan="3" |13
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad column 4
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF1
−
|TBD
+
|RESET2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|GPIO 13
 
|-
 
|-
−
|Pin ALT-5
+
| rowspan="2" |J1.161
−
|TBD
+
| rowspan="2" |ADP5589_C5
 +
| rowspan="2" |EXP.C5
 +
| rowspan="2" |14
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad column 5
 
|-
 
|-
−
| rowspan="5" |J1.201
+
|Pin AF5
−
| rowspan="5" |PD15
+
|GPIO 14
−
| rowspan="5" |CPU.PD15
+
|-
−
| rowspan="5" |G1
+
| rowspan="5" |J1.163
 +
| rowspan="5" |ADP5589_C6
 +
| rowspan="5" |EXP.C6
 +
| rowspan="5" |15
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |
−
|Pin ALT-0
+
|Pin AF0
−
|TBD
+
|Keypad column 6
 +
|-
 +
|Pin AF1
 +
|Logic LC2
 +
|-
 +
|Pin AF2
 +
|PWM_IN
 +
|-
 +
|Pin AF3
 +
|CLK_IN
 +
|-
 +
|Pin AF5
 +
|GPIO 15
 +
|-
 +
| rowspan="3" |J1.165
 +
| rowspan="3" |ADP5589_C7
 +
| rowspan="3" |EXP.C7
 +
| rowspan="3" |16
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad column 7
 +
|-
 +
|Pin AF1
 +
|Logic LB2
 +
|-
 +
|Pin AF5
 +
|GPIO 16
 +
|-
 +
| rowspan="3" |J1.167
 +
| rowspan="3" |ADP5589_C8
 +
| rowspan="3" |EXP.C8
 +
| rowspan="3" |19
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad column 8
 +
|-
 +
|Pin AF1
 +
|Logic LA2
 +
|-
 +
|Pin AF5
 +
|GPIO 17
 +
|-
 +
| rowspan="3" |J1.169
 +
| rowspan="3" |ADP5589_C9
 +
| rowspan="3" |EXP.C9
 +
| rowspan="3" |20
 +
| rowspan="3" |VDD
 +
| rowspan="3" |I/O
 +
| rowspan="3" |
 +
|Pin AF0
 +
|Keypad column 9
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF1
−
|TBD
+
|Logic LY2
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF5
−
|TBD
+
|GPIO 18
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="2" |J1.171
−
|TBD
+
| rowspan="2" |ADP5589_C10
 +
| rowspan="2" |EXP.C10
 +
| rowspan="2" |21
 +
| rowspan="2" |VDD
 +
| rowspan="2" |I/O
 +
| rowspan="2" |
 +
|Pin AF0
 +
|Keypad column 10
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF5
−
|TBD
+
|GPIO 19
 
|-
 
|-
−
|J1.203
+
|J1.173
−
|DGND
+
| -
−
|DGND
+
|NC
 +
| -
 
| -
 
| -
 
| -
 
| -
−
|G
 
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|}
+
|J1.175
−
 
 
−
==Pinout Table EVEN  pins declaration ==
 
−
 
 
−
{| class="wikitable"
 
−
! latexfontsize="scriptsize" | Pin
 
−
! latexfontsize="scriptsize" | Pin Name
 
−
! latexfontsize="scriptsize" | Internal Connections
 
−
! latexfontsize="scriptsize" | Ball/pin #
 
−
! latexfontsize="scriptsize" | Voltage domain
 
−
! latexfontsize="scriptsize" | Type
 
−
! latexfontsize="scriptsize" | Notes
 
−
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
 
−
|-
 
−
|J1.2
 
 
|DGND
 
|DGND
 
|DGND
 
|DGND
Line 1,877: Line 1,953:
 
|
 
|
 
|-
 
|-
−
|J1.4
+
|J1.177
−
|3.3VIN
+
 
−
|INPUT VOLTAGE
+
(NAND on board)
−
| -
+
|PE9
−
|3.3VIN
+
|CPU.PE9
−
|S
+
|W7
−
|
+
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.6
+
| rowspan="6" |J1.177
−
|3.3VIN
+
| rowspan="6" |PE9
−
|INPUT VOLTAGE
+
| rowspan="6" |CPU.PE9
−
| -
+
| rowspan="6" |W7
−
|3.3VIN
+
| rowspan="6" |VDD
−
|S
+
| rowspan="6" |I/O
−
|
+
| rowspan="6" |
 +
|Pin AF1
 +
|TIM1_CH1
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKOUT
 +
|-
 +
|Pin AF7
 +
|UART7_RTS/UART7_DE
 +
|-
 +
|Pin AF10
 +
|QUADSPI_BK2_IO2
 +
|-
 +
|Pin AF12
 +
|FMC_AD6/FMC_D6
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.179
 +
 
 +
(I/O EXP on board)
 +
|PC3
 +
|CPU.PC3
 +
|T3
 +
|VDD
 +
|I/O
 +
|internally used for I/O EXP,
 +
 
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.8
+
| rowspan="6" |J1.179
−
|3.3VIN
+
| rowspan="6" |PC3
−
|INPUT VOLTAGE
+
| rowspan="6" |CPU.PC3
−
| -
+
| rowspan="6" |T3
−
|3.3VIN
+
| rowspan="6" |VDD
−
|S
+
| rowspan="6" |I/O
−
|
+
| rowspan="6" |
 +
|Pin AF0
 +
|TRACECLK
 +
|-
 +
|Pin AF3
 +
|DFSDM1_DATIN1
 +
|-
 +
|Pin AF5
 +
|SPI2_MOSI/I2S2_SDO
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_TX_CLK/
 +
 
 +
ETH1_MII_TX_CLK
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP13
 +
 
 +
ADC1_INN12
 +
|-
 +
|J1.181
 +
 
 +
(NAND on board)
 +
|PD6
 +
|CPU.PD6
 +
|E3
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
 
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.10
+
| rowspan="11" |J1.181
−
|3.3VIN
+
| rowspan="11" |PD6
−
|INPUT VOLTAGE
+
| rowspan="11" |CPU.PD6
−
| -
+
| rowspan="11" |E3
−
|3.3VIN
+
| rowspan="11" |VDD
−
|S
+
| rowspan="11" |I/O
−
|
+
| rowspan="11" |
−
|
+
|Pin AF1
−
|
+
|TIM16_CH1N
 +
|-
 +
|Pin AF2
 +
|SAI1_D1
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKIN4
 +
|-
 +
|Pin AF4
 +
|DFSDM1_DATIN1
 +
|-
 +
|Pin AF5
 +
|SPI3_MOSI/I2S3_SDO
 +
|-
 +
|Pin AF6
 +
|SAI1_SD_A
 +
|-
 +
|Pin AF7
 +
|USART2_RX
 +
|-
 +
|Pin AF12
 +
|FMC_NWAIT
 +
|-
 +
|Pin AF13
 +
|DCMI_D10
 +
|-
 +
|Pin AF14
 +
|LCD_B2
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 
|-
 
|-
−
|J1.12
+
|J1.183
−
|DGND
+
 
−
|DGND
+
(NAND on board)
−
| -
+
|PE10
−
| -
+
|CPU.PE10
−
|G
+
|V10
−
|
+
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
 
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.14
+
| rowspan="6" |J1.183
−
|VBAT
+
| rowspan="6" |PE10
−
|CPU.VBAT
+
| rowspan="6" |CPU.PE10
−
|H3
+
| rowspan="6" |V10
−
|VBAT
+
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF1
 +
|TIM1_CH2N
 +
|-
 +
|Pin AF3
 +
|DFSDM1_DATIN4
 +
|-
 +
|Pin AF7
 +
|UART7_CTS
 +
|-
 +
|Pin AF10
 +
|QUADSPI_BK2_IO3
 +
|-
 +
|Pin AF12
 +
|FMC_AD7/FMC_D7
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.185
 +
|VBUS_OTG_OUT
 +
|PMIC.VBUSOTG
 +
|35
 +
|VBUSOTG
 
|S
 
|S
−
|BACKUP VOLTAGE
+
|USB OTG VOUT
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.16
+
| rowspan="8" |J1.187
−
|PONKEYn
+
| rowspan="8" |PG11
−
|PMIC.PONKEYN
+
| rowspan="8" |CPU.PG11
−
|17
+
| rowspan="8" |V6
−
|3.3VIN
+
| rowspan="8" |VDD
−
|I
+
| rowspan="8" |I/O
−
|
+
| rowspan="8" |
−
|
+
|Pin AF0
−
|
+
|TRACED11
 +
|-
 +
|Pin AF4
 +
|USART1_TX
 +
|-
 +
|Pin AF6
 +
|UART4_TX
 
|-
 
|-
−
|J1.18
+
|Pin AF8
−
|SOM_PGOOD
+
|SPDIFRX_IN1
−
| -
+
|-
−
| -
+
|Pin AF11
−
|VDD
+
|ETH1_GMII_TX_EN/
−
|O
+
 
−
|
+
ETH1_MII_TX_EN/
−
|
+
 
−
|
+
ETH1_RGMII_TX_CTL/
 +
 
 +
ETH1_RMII_TX_EN
 
|-
 
|-
−
|J1.20
+
|Pin AF13
−
|BOOT_MODE0
+
|DCMI_D3
−
|CPU.BOOT0
 
−
|K1
 
−
|VDD
 
−
|I
 
−
|internall pull-up or pull-down
 
−
according to specific model
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.22
+
|Pin AF14
−
|PWR_ON
+
|LCD_B3
−
|CPU.PWR_ON
 
−
|L1
 
−
|VDD
 
−
|O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.24
+
|Pin AF15
−
|NRST
+
|EVENTOUT
−
|CPU.NRST
+
|-
−
PMIC.RSTN
+
| rowspan="11" |J1.189
−
 
+
| rowspan="11" |PB2
−
eMMC.RST_n
+
| rowspan="11" |CPU.PB2
−
 
+
| rowspan="11" |T13
−
NOR.NRESET
+
| rowspan="11" |VDD
−
|J1
+
| rowspan="11" |I/O
−
1
+
| rowspan="11" |
−
 
+
|Pin AF0
−
K5
+
|TRACED4
−
 
 
−
A4
 
−
|VDD
 
−
|I/O
 
−
|TBD
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.26
+
|Pin AF1
−
|BOOT_MODE1
+
|RTC_OUT2
−
|CPU.BOOT1
 
−
|K4
 
−
|VDD
 
−
|I
 
−
|internall pull-up or pull-down
 
−
according to specific model
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.28
+
|Pin AF2
−
| rowspan="5" |PA9
+
|SAI1_D1
−
| rowspan="5" |CPU.PA9
 
−
| rowspan="5" |C8
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF3
−
|TBD
+
|DFSDM1_CKIN1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF4
−
|TBD
+
|USART1_RX
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|I2S_CKIN
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SAI1_SD_A
 
|-
 
|-
−
|J1.30
+
|Pin AF7
−
|DGND
+
|SPI3_MOSI/I2S3_SDO
−
|DGND
+
|-
−
| -
+
|Pin AF8
−
| -
+
|UART4_RX
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.32
+
|Pin AF9
−
|WAKEUP
+
|QUADSPI_CLK
−
|PMIC.WAKEUP
 
−
|2
 
−
|VINTLDO
 
−
|I
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.34
+
|Pin AF15
−
| rowspan="5" |PB13
+
|EVENTOUT
−
| rowspan="5" |CPU.PB13
 
−
| rowspan="5" |T9
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="7" |J1.191
−
|TBD
+
| rowspan="7" |PE1
 +
| rowspan="7" |CPU.PE1
 +
| rowspan="7" |B1
 +
| rowspan="7" |VDD
 +
| rowspan="7" |I/O
 +
| rowspan="7" |
 +
|Pin AF1
 +
|LPTIM1_IN2
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF5
−
|TBD
+
|I2S2_MCK
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF6
−
|TBD
+
|SAI3_SD_B
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF8
−
|TBD
+
|UART8_TX
 
|-
 
|-
−
|J1.36
+
|Pin AF12
−
|BOOT_MODE2
+
|FMC_NBL1
−
|CPU-BOOT2
 
−
|L2
 
−
|VDD
 
−
|I
 
−
|internall pull-up or pull-down
 
−
according to specific model
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.38
+
|Pin AF13
−
| rowspan="5" |PA11
+
|DCMI_D3
−
| rowspan="5" |CPU.PA11
 
−
| rowspan="5" |V17
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="10" |J1.193
−
|TBD
+
| rowspan="10" |PE0
 +
| rowspan="10" |CPU.PE0
 +
| rowspan="10" |C4
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF1
 +
|LPTIM1_ETR
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF2
−
|TBD
+
|TIM4_ETR
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF4
−
|TBD
+
|LPTIM2_ETR
 
|-
 
|-
−
|J1.40
+
|Pin AF5
−
|MEM_WP#
+
|SPI3_SCK/I2S3_CK
−
|NAND.NWP
 
−
NOR.NWP
 
−
|19
 
−
C4
 
−
|VDD
 
−
|I
 
−
|internal pull-up to VDD
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.42
+
|Pin AF6
−
| rowspan="5" |PB6
+
|SAI4_MCLK_B
−
| rowspan="5" |CPU.PB6
 
−
| rowspan="5" |T12
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF8
−
|TBD
+
|UART8_RX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SAI2_MCLK_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF12
−
|TBD
+
|FMC_NBL0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF13
−
|TBD
+
|DCMI_D2
 
|-
 
|-
−
| rowspan="5" |J1.44
+
|Pin AF15
−
| rowspan="5" |PB7
+
|EVENTOUT
−
| rowspan="5" |CPU.PB7
 
−
| rowspan="5" |B5
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.195
−
|TBD
+
|PE2
 +
|CPU.PE2
 +
|T1
 +
|VDD
 +
|I/O
 +
|internally used for
 +
PMIC I2C
 +
|Pin AF4
 +
|I2C4_SCL
 
|-
 
|-
−
|Pin ALT-2
+
|J1.197
−
|TBD
+
 
 +
(LAN PHY on board)
 +
|PA13
 +
|CPU.PA13
 +
|P2
 +
|VDD
 +
|I/O
 +
|internally used for LAN PHY,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="6" |J1.197
−
|TBD
+
| rowspan="6" |PA13
 +
| rowspan="6" |CPU.PA13
 +
| rowspan="6" |P2
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF0
 +
|DBTRGO
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF1
−
|TBD
+
|DBTRGI
 
|-
 
|-
−
| rowspan="5" |J1.46
+
|Pin AF2
−
| rowspan="5" |PE14
+
|MCO1
−
| rowspan="5" |CPU.PE14
 
−
| rowspan="5" |D3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF8
−
|TBD
+
|UART4_TX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
|Additional
−
|TBD
+
functions
 +
|BOOTFAILN
 
|-
 
|-
−
|Pin ALT-5
+
|J1.199
−
|TBD
+
 
 +
(NAND on board)
 +
|PD14
 +
|CPU.PD14
 +
|F3
 +
|VDD
 +
|I/O
 +
|internally used for NAND flash,
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.48
+
| rowspan="5" |J1.199
−
| rowspan="5" |PA12
+
| rowspan="5" |PD14
−
| rowspan="5" |CPU.PA12
+
| rowspan="5" |CPU.PD14
−
| rowspan="5" |U16
+
| rowspan="5" |F3
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
−
| rowspan="5" |TBD
+
| rowspan="5" |internally used for
−
|Pin ALT-0
+
NAND flash
−
|TBD
+
|Pin AF2
 +
|TIM4_CH3
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF6
−
|TBD
+
|SAI3_MCLK_B
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF8
−
|TBD
+
|UART8_CTS
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF12
−
|TBD
+
|FMC_AD0/FMC_D0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|J1.50
+
|J1.201
−
|BST_OUT
+
(NAND on board)
−
|PMIC.BST_OUT
+
|PD15
−
|34
+
|CPU.PD15
−
|BST_OUT
+
|G1
−
|S
+
|VDD
−
|BOOST OUTPUT
+
|I/O
 +
|internally used for NAND flash,
 +
 
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.52
+
| rowspan="5" |J1.201
−
|BST_OUT
+
| rowspan="5" |PD15
−
|PMIC.BST_OUT
+
| rowspan="5" |CPU.PD15
−
|34
+
| rowspan="5" |G1
−
|BST_OUT
+
| rowspan="5" |VDD
−
|S
+
| rowspan="5" |I/O
−
|BOOST OUTPUT
+
| rowspan="5" |internally used for
−
|
+
NAND flash
−
|
+
|Pin AF2
 +
|TIM4_CH4
 +
|-
 +
|Pin AF6
 +
|SAI3_MCLK_A
 
|-
 
|-
−
|J1.54
+
|Pin AF8
−
|PMIC_INT#
+
|UART8_CTS
−
|PMIC-INTN
+
|-
−
|43
+
|Pin AF12
−
|VDD
+
|FMC_AD1/FMC_D1
−
|O
+
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.203
 +
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.56
+
|}
 +
 
 +
==Pinout Table EVEN  pins declaration ==
 +
 
 +
{| class="wikitable"
 +
! latexfontsize="scriptsize" | Pin
 +
! latexfontsize="scriptsize" | Pin Name
 +
! latexfontsize="scriptsize" | Internal Connections
 +
! latexfontsize="scriptsize" | Ball/pin #
 +
! latexfontsize="scriptsize" | Voltage domain
 +
! latexfontsize="scriptsize" | Type
 +
! latexfontsize="scriptsize" | Notes
 +
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
 +
|-
 +
|J1.2
 
|DGND
 
|DGND
 
|DGND
 
|DGND
Line 2,246: Line 2,438:
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.58
+
|J1.4
−
| rowspan="5" |PA14
+
|3.3VIN
−
| rowspan="5" |CPU.PA14
+
|INPUT VOLTAGE
−
| rowspan="5" |R1
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
|J1.60
 
−
|VDD
 
−
|VOLTAGE OUTPUT
 
 
| -
 
| -
−
|VDD
+
|3.3VIN
 
|S
 
|S
 
|
 
|
Line 2,278: Line 2,448:
 
|
 
|
 
|-
 
|-
−
|J1.62
+
|J1.6
−
|VDD
+
|3.3VIN
−
|VOLTAGE OUTPUT
+
|INPUT VOLTAGE
 
| -
 
| -
−
|VDD
+
|3.3VIN
 
|S
 
|S
 
|
 
|
Line 2,288: Line 2,458:
 
|
 
|
 
|-
 
|-
−
|J1.64
+
|J1.8
−
|1V8
+
|3.3VIN
−
|PMIC.LDO6OUT
+
|INPUT VOLTAGE
−
|21
+
| -
−
|1V8
+
|3.3VIN
 
|S
 
|S
−
|Spare LDO output
+
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.66
+
|J1.10
−
| rowspan="5" |PG12
+
|3.3VIN
−
| rowspan="5" |CPU.PG12
+
|INPUT VOLTAGE
−
| rowspan="5" |F1
+
| -
−
| rowspan="5" |VDD
+
|3.3VIN
−
| rowspan="5" |I/O
+
|S
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.12
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.14
−
|TBD
+
|VBAT
−
|-
+
|CPU.VBAT
−
|Pin ALT-3
+
|H3
−
|TBD
+
|VBAT
−
|-
+
|S
−
|Pin ALT-5
+
|BACKUP VOLTAGE
−
|TBD
+
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.68
+
|J1.16
−
| rowspan="5" |PB5
+
|PONKEYn
−
| rowspan="5" |CPU.PB5
+
|PMIC.PONKEYN
−
| rowspan="5" |T8
+
|17
−
| rowspan="5" |VDD
+
|3.3VIN
−
| rowspan="5" |I/O
+
|I
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.18
−
|TBD
+
|SOM_PGOOD
 +
| -
 +
| -
 +
|VDD
 +
|O
 +
|internally connected to VDD
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.20
−
|TBD
+
|BOOT_MODE0
−
|-
+
|CPU.BOOT0
−
|Pin ALT-3
+
|K1
−
|TBD
+
|VDD
−
|-
+
|I
−
|Pin ALT-5
+
|internal pull-up or pull-down
−
|TBD
+
according to specific model
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.70
+
|J1.22
−
| rowspan="5" |PG8
+
|PWR_ON
−
| rowspan="5" |CPU.PG8
+
|CPU.PWR_ON
−
| rowspan="5" |U7
+
|L1
−
| rowspan="5" |VDD
+
|VDD
−
| rowspan="5" |I/O
+
|O
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.24
−
|TBD
+
|NRST
−
|-
+
|CPU.NRST
−
|Pin ALT-2
+
PMIC.RSTN
−
|TBD
+
 
−
|-
+
eMMC.RST_n
−
|Pin ALT-3
+
 
−
|TBD
+
NOR.NRESET
−
|-
+
|J1
−
|Pin ALT-5
+
1
−
|TBD
+
 
−
|-
+
K5
−
| rowspan="5" |J1.72
+
 
−
| rowspan="5" |PA8
+
A4
−
| rowspan="5" |CPU.PA8
+
|VDD
−
| rowspan="5" |B8
+
|I/O
−
| rowspan="5" |VDD
+
|internal 10k pull-up to VDD
−
| rowspan="5" |I/O
+
|
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.26
−
|TBD
+
|BOOT_MODE1
 +
|CPU.BOOT1
 +
|K4
 +
|VDD
 +
|I
 +
|internal pull-up or pull-down
 +
according to specific model
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="9" |J1.28
−
|TBD
+
| rowspan="9" |PA9
 +
| rowspan="9" |CPU.PA9
 +
| rowspan="9" |C8
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF1
 +
|TIM1_CH2
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF4
−
|TBD
+
|I2C3_SMBA
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF5
−
|TBD
+
|SPI2_SCK/I2S2_CK
 
|-
 
|-
−
| rowspan="5" |J1.74
+
|Pin AF7
−
| rowspan="5" |PF7
+
|USART1_TX
−
| rowspan="5" |CPU.PF7
 
−
| rowspan="5" |W8
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF8
−
|TBD
+
|SDMMC2_CDIR
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SDMMC2_D5
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF13
−
|TBD
+
|DCMI_D0
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF14
−
|TBD
+
|LCD_R5
 
|-
 
|-
−
| rowspan="5" |J1.76
+
|Pin AF15
−
| rowspan="5" |PF9
+
|EVENTOUT
−
| rowspan="5" |CPU.PF9
 
−
| rowspan="5" |W9
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.30
−
|TBD
+
|DGND
−
|-
+
|DGND
−
|Pin ALT-2
+
| -
−
|TBD
+
| -
−
|-
+
|G
−
|Pin ALT-3
+
|
−
|TBD
+
|
−
|-
+
|
−
|Pin ALT-5
+
|-
−
|TBD
+
|J1.32
 +
|WAKEUP
 +
|PMIC.WAKEUP
 +
|2
 +
|VINTLDO
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.78
+
| rowspan="10" |J1.34
−
| rowspan="5" |PF8
+
| rowspan="10" |PB13
−
| rowspan="5" |CPU.PF8
+
| rowspan="10" |CPU.PB13
−
| rowspan="5" |U10
+
| rowspan="10" |T9
−
| rowspan="5" |VDD
+
| rowspan="10" |VDD
−
| rowspan="5" |I/O
+
| rowspan="10" |I/O
−
| rowspan="5" |TBD
+
| rowspan="10" |
−
|Pin ALT-0
+
|Pin AF1
−
|TBD
+
|TIM1_CH1N
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF3
−
|TBD
+
|DFSDM1_CKOUT
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF4
−
|TBD
+
|LPTIM2_OUT
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|SPI2_SCK/I2S2_CK
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|DFSDM1_CKIN1
 
|-
 
|-
−
| rowspan="5" |J1.80
+
|Pin AF7
−
| rowspan="5" |PF6
+
|USART3_CTS/USART3_NSS
−
| rowspan="5" |CPU.PF6
 
−
| rowspan="5" |V9
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|FDCAN2_TX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF11
−
|TBD
+
|ETH1_GMII_TXD1/
 +
 
 +
ETH1_MII_TXD1/
 +
 
 +
ETH1_RGMII_TXD1/
 +
 
 +
ETH1_RMII_TXD1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF14
−
|TBD
+
|UART5_TX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|J1.82
+
|J1.36
−
|DGND
+
|BOOT_MODE2
−
|DGND
+
|CPU-BOOT2
−
| -
+
|L2
−
| -
+
|VDD
−
|G
+
|I
−
|
+
|internal pull-up or pull-down
 +
according to specific model
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.84
+
| rowspan="10" |J1.38
−
|PMIC_3V3
+
| rowspan="10" |PA11
−
|VOLTAGE OUTPUT
+
| rowspan="10" |CPU.PA11
−
| -
+
| rowspan="10" |V17
−
|PMIC_3V3
+
| rowspan="10" |VDD
−
|S
+
| rowspan="10" |I/O
−
|
+
| rowspan="10" |
 +
|Pin AF1
 +
|TIM1_CH4
 +
|-
 +
|Pin AF2
 +
|I2C6_SCL
 +
|-
 +
|Pin AF4
 +
|I2C5_SCL
 +
|-
 +
|Pin AF5
 +
|SPI2_NSS/I2S2_WS
 +
|-
 +
|Pin AF6
 +
|UART4_RX
 +
|-
 +
|Pin AF7
 +
|USART1_CTS/USART1_NSS
 +
|-
 +
|Pin AF9
 +
|FDCAN1_RX
 +
|-
 +
|Pin AF14
 +
|LCD_R4
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|OTG_FS_DM
 +
|-
 +
|J1.40
 +
|NAND_WP#
 +
|NAND.WPn
 +
|19
 +
|VDD
 +
|I/O
 +
|internal pull-up to VDD
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.86
+
|J1.42
−
|PMIC_3V3
+
 
−
|VOLTAGE OUTPUT
+
(NOR on board)
−
| -
+
|PB6
−
|PMIC_3V3
+
|CPU.PB6
−
|S
+
|T12
−
|
+
|VDD
 +
|I/O
 +
|internally used for NOR flash.
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.88
+
| rowspan="12" |J1.42
−
|PMIC_3V3
+
| rowspan="12" |PB6
−
|VOLTAGE OUTPUT
+
| rowspan="12" |CPU.PB6
−
| -
+
| rowspan="12" |T12
−
|PMIC_3V3
+
| rowspan="12" |VDD
−
|S
+
| rowspan="12" |I/O
−
|
+
| rowspan="12" |
−
|
+
|Pin AF1
−
|
+
|TIM16_CH1N
 +
|-
 +
|Pin AF2
 +
|TIM4_CH1
 
|-
 
|-
−
|J1.90
+
|Pin AF4
−
|JTMS-SWDIO
+
|I2C1_SCL
−
|CPU.JTMS-SWDIO
 
−
|D15
 
−
|VDD
 
−
|I/O
 
−
|TBD
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.92
+
|Pin AF5
−
|JTDI
+
|CEC
−
|CPU.JTDI
+
|-
−
|D13
+
|Pin AF6
 +
|I2C4_SCL
 +
|-
 +
|Pin AF7
 +
|USART1_TX
 +
|-
 +
|Pin AF9
 +
|FDCAN2_TX
 +
|-
 +
|Pin AF10
 +
|QUADSPI_BK1_NCS
 +
|-
 +
|Pin AF11
 +
|DFSDM1_DATIN5
 +
|-
 +
|Pin AF12
 +
|UART5_TX
 +
|-
 +
|Pin AF13
 +
|DCMI_D5
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.44
 +
|PB7
 +
|CPU.PB7
 +
|B5
 
|VDD
 
|VDD
 
|I/O
 
|I/O
−
|TBD
+
|internally used for
−
|
+
PMIC I2C
−
|
+
|Pin AF6
 +
|I2C1_SDA
 
|-
 
|-
−
|J1.94
+
| rowspan="9" |J1.46
−
|NJTRST
+
| rowspan="9" |PE14
−
|CPU.NJTRST
+
| rowspan="9" |CPU.PE14
−
|D12
+
| rowspan="9" |D3
−
|VDD
+
| rowspan="9" |VDD
−
|I/O
+
| rowspan="9" |I/O
−
|TBD
+
| rowspan="9" |
−
|
+
|Pin AF1
−
|
+
|TIM1_CH4
 
|-
 
|-
−
|J1.96
+
|Pin AF5
−
|JTDO-TRACESWOO
+
|SPI4_MOSI
−
|CPU.JTDO-TRACESWOO
 
−
|D14
 
−
|VDD
 
−
|I/O
 
−
|TBD
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.98
+
|Pin AF8
−
|JTCK-SWCLK
+
|UART8_RTS/UART8_DE
−
|CPU.JTCK-SWCLK
+
|-
−
|D16
+
|Pin AF10
−
|VDD
+
|SAI2_MCLK_B
−
|I/O
+
|-
−
|TBD
+
|Pin AF11
−
|
+
|SDMMC1_D123DIR
−
|
+
|-
 +
|Pin AF12
 +
|FMC_AD11/FMC_D11
 +
|-
 +
|Pin AF13
 +
|LCD_G0
 +
|-
 +
|Pin AF14
 +
|LCD_CLK
 
|-
 
|-
−
|J1.100
+
|Pin AF15
−
|DGND
+
|EVENTOUT
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.102
+
| rowspan="10" |J1.48
−
|NRST_CORE
+
| rowspan="10" |PA12
−
|CPU.NRST_CORE
+
| rowspan="10" |CPU.PA12
−
|J2
+
| rowspan="10" |U16
−
|VDD
+
| rowspan="10" |VDD
−
|I
+
| rowspan="10" |I/O
−
|internally connected to NRST
+
| rowspan="10" |
−
|
+
|Pin AF1
−
|
+
|TIM1_ETR
 
|-
 
|-
−
|J1.104
+
|Pin AF2
−
|PDR_ON
+
|I2C6_SDA
−
|CPU.PDR_ON
+
|-
−
|N2
+
|Pin AF4
−
|VDD
+
|I2C5_SDA
−
|I
+
|-
 +
|Pin AF6
 +
|UART4_TX
 +
|-
 +
|Pin AF7
 +
|USART1_RTS/USART1_DE
 +
|-
 +
|Pin AF8
 +
|SAI2_FS_B
 +
|-
 +
|Pin AF9
 +
|FDCAN1_TX
 +
|-
 +
|Pin AF14
 +
|LCD_R5
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|OTG_FS_DP
 +
|-
 +
|J1.50
 +
|BST_OUT
 +
|PMIC.BST_OUT
 +
|34
 +
|BST_OUT
 +
|S
 +
|BOOST OUTPUT
 
|
 
|
 +
|
 +
|-
 +
|J1.52
 +
|BST_OUT
 +
|PMIC.BST_OUT
 +
|34
 +
|BST_OUT
 +
|S
 +
|BOOST OUTPUT
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.106
+
|J1.54
−
|PDR_ON_CORE
+
|PMIC_INT#
−
|CPU.PDR_ON_CORE
+
|PMIC-INTN
−
|N1
+
|43
−
|VDD
 
−
|I
 
−
|
 
−
|
 
−
|
 
−
|-
 
−
|J1.108
 
−
|PWR_LP
 
−
|CPU.PWR_LP
 
−
|P1
 
 
|VDD
 
|VDD
 
|O
 
|O
Line 2,614: Line 2,895:
 
|
 
|
 
|-
 
|-
−
|J1.110
+
|J1.56
−
| -
+
|DGND
−
|NC
+
|DGND
−
| -
 
 
| -
 
| -
 
| -
 
| -
 +
|G
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.112
+
| rowspan="4" |J1.58
−
| -
+
| rowspan="4" |PA14
−
|NC
+
| rowspan="4" |CPU.PA14
−
| -
+
| rowspan="4" |R1
−
| -
+
| rowspan="4" |VDD
−
| -
+
| rowspan="4" |I/O
−
|
+
| rowspan="4" |
−
|
+
|Pin AF0
−
|
+
|DBTRGO
 +
|-
 +
|Pin AF1
 +
|DBTRGI
 +
|-
 +
|Pin AF2
 +
|MCO2
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 
|-
 
|-
−
|J1.114
+
|J1.60
−
| -
+
|VDD
−
|NC
+
|VOLTAGE OUTPUT
−
| -
 
−
| -
 
 
| -
 
| -
 +
|VDD
 +
|S
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.116
+
|J1.62
−
| -
+
|VDD
−
|NC
+
|VOLTAGE OUTPUT
−
| -
 
−
| -
 
 
| -
 
| -
 +
|VDD
 +
|S
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.118
+
|J1.64
−
| -
+
|1V8
−
|NC
+
|PMIC.LDO6OUT
−
| -
+
|21
−
| -
+
|1V8
−
| -
+
|S
−
|
+
|Spare LDO output
 
|
 
|
 
|
 
|
 
|-
 
|-
−
|J1.120
+
| rowspan="11" |J1.66
−
| -
+
| rowspan="11" |PG12
−
|NC
+
| rowspan="11" |CPU.PG12
−
| -
+
| rowspan="11" |F1
−
| -
+
| rowspan="11" |VDD
−
| -
+
| rowspan="11" |I/O
−
|
+
| rowspan="11" |
−
|
+
|Pin AF1
−
|
+
|LPTIM1_IN1
 
|-
 
|-
−
|J1.122
+
|Pin AF5
−
|DGND
+
|SPI6_MISO
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.124
+
|Pin AF6
−
| rowspan="5" |PE13
+
|SAI4_CK2
−
| rowspan="5" |CPU.PE13
+
|-
−
| rowspan="5" |C2
+
|Pin AF7
−
| rowspan="5" |VDD
+
|USART6_RTS/USART6_DE
−
| rowspan="5" |I/O
+
|-
−
| rowspan="5" |TBD
+
|Pin AF8
−
|Pin ALT-0
+
|SPDIFRX_IN2
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|LCD_B4
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SAI4_SCK_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF11
−
|TBD
+
|ETH1_PHY_INTN
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|FMC_NE4
 
|-
 
|-
−
| rowspan="5" |J1.126
+
|Pin AF14
−
| rowspan="5" |PC13
+
|LCD_B1
−
| rowspan="5" |CPU.PC13
 
−
| rowspan="5" |K3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
| rowspan="16" |J1.68
−
|TBD
+
| rowspan="16" |PB5
 +
| rowspan="16" |CPU.PB5
 +
| rowspan="16" |T8
 +
| rowspan="16" |VDD
 +
| rowspan="16" |I/O
 +
| rowspan="16" |
 +
|Pin AF0
 +
|ETH_CLK
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF1
−
|TBD
+
|TIM17_BKIN
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF2
−
|TBD
+
|TIM3_CH2
 
|-
 
|-
−
| rowspan="5" |J1.128
+
|Pin AF3
−
| rowspan="5" |PA4
+
|SAI4_D1
−
| rowspan="5" |CPU.PA4
 
−
| rowspan="5" |R4
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF4
−
|TBD
+
|I2C1_SMBA
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF5
−
|TBD
+
|SPI1_MOSI/I2S1_SDO
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF6
−
|TBD
+
|I2C4_SMBA
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF7
−
|TBD
+
|SPI3_MOSI/I2S3_SDO
 
|-
 
|-
−
| rowspan="5" |J1.130
+
|Pin AF8
−
| rowspan="5" |PC6_OPT
+
|SPI6_MOSI
−
| rowspan="5" | -
 
−
| rowspan="5" | -
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|FDCAN2_RX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SAI4_SD_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF11
−
|TBD
+
|ETH1_PPS_OUT
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF12
−
|TBD
+
|UART5_RX
 
|-
 
|-
−
| rowspan="5" |J1.132
+
|Pin AF13
−
| rowspan="5" |PG7
+
|DCMI_D10
−
| rowspan="5" |CPU.PG7
 
−
| rowspan="5" |W10
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF14
−
|TBD
+
|LCD_G7
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-3
+
| rowspan="13" |J1.70
−
|TBD
+
| rowspan="13" |PG8
 +
| rowspan="13" |CPU.PG8
 +
| rowspan="13" |U7
 +
| rowspan="13" |VDD
 +
| rowspan="13" |I/O
 +
| rowspan="13" |
 +
|Pin AF0
 +
|TRACED15
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF1
−
|TBD
+
|TIM2_CH1/TIM2_ETR
 
|-
 
|-
−
| rowspan="5" |J1.134
+
|Pin AF2
−
| rowspan="5" |PG10
+
|ETH_CLK
−
| rowspan="5" |CPU.PG10
 
−
| rowspan="5" |V7
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF3
−
|TBD
+
|TIM8_ETR
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF5
−
|TBD
+
|SPI6_NSS
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF6
−
|TBD
+
|SAI4_D2
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF7
−
|TBD
+
|USART6_RTS/USART6_DE
 
|-
 
|-
−
| rowspan="5" |J1.136
+
|Pin AF8
−
| rowspan="5" |PD10
+
|USART3_RTS/USART3_DE
−
| rowspan="5" |CPU.PD10
 
−
| rowspan="5" |C5
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|SPDIFRX_IN3
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|SAI4_FS_A
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF11
−
|TBD
+
|ETH1_PPS_OUT
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF14
−
|TBD
+
|LCD_G7
 
|-
 
|-
−
| rowspan="5" |J1.138
+
|Pin AF15
−
| rowspan="5" |PE12
+
|EVENTOUT
−
| rowspan="5" |CPU.PE12
 
−
| rowspan="5" |D2
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="13" |J1.72
−
|TBD
+
| rowspan="13" |PA8
 +
| rowspan="13" |CPU.PA8
 +
| rowspan="13" |B8
 +
| rowspan="13" |VDD
 +
| rowspan="13" |I/O
 +
| rowspan="13" |
 +
|Pin AF0
 +
|MCO1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF1
−
|TBD
+
|TIM1_CH1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF3
−
|TBD
+
|TIM8_BKIN2
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF4
−
|TBD
+
|I2C3_SCL
 
|-
 
|-
−
| rowspan="5" |J1.140
+
|Pin AF5
−
| rowspan="5" |PA3
+
|SPI3_MOSI/I2S3_SDO
−
| rowspan="5" |CPU.PA3
 
−
| rowspan="5" |P3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF7
−
|TBD
+
|USART1_CK
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF8
−
|TBD
+
|SDMMC2_CKIN
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF9
−
|TBD
+
|SDMMC2_D4
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF10
−
|TBD
+
|OTG_FS_SOF/OTG_HS_SOF
 
|-
 
|-
−
| rowspan="5" |J1.142
+
|Pin AF12
−
| rowspan="5" |PB8
+
|SAI4_SD_B
−
| rowspan="5" |CPU.PB8
 
−
| rowspan="5" |W6
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF13
−
|TBD
+
|UART7_RX
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF14
−
|TBD
+
|LCD_R6
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-5
+
|J1.74
−
|TBD
+
 
 +
(NOR on board)
 +
|PF7
 +
|CPU.PF7
 +
|W8
 +
|VDD
 +
|I/O
 +
|internally used for NOR flash.
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.144
+
| rowspan="6" |J1.74
−
| rowspan="5" |PB9
+
| rowspan="6" |PF7
−
| rowspan="5" |CPU.PB9
+
| rowspan="6" |CPU.PF7
−
| rowspan="5" |D9
+
| rowspan="6" |W8
−
| rowspan="5" |VDD
+
| rowspan="6" |VDD
−
| rowspan="5" |I/O
+
| rowspan="6" |I/O
−
| rowspan="5" |TBD
+
| rowspan="6" |
−
|Pin ALT-0
+
|Pin AF1
−
|TBD
+
|TIM17_CH1
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF5
−
|TBD
+
|SPI5_SCK
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF6
−
|TBD
+
|SAI1_MCLK_B
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF7
−
|TBD
+
|UART7_TX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO2
 
|-
 
|-
−
|J1.146
+
|Pin AF15
−
|DGND
+
|EVENTOUT
−
|DGND
+
|-
−
| -
+
|J1.76
−
| -
+
 
−
|G
+
(NOR on board)
−
|
+
|PF9
 +
|CPU.PF9
 +
|W9
 +
|VDD
 +
|I/O
 +
|internally used for NOR flash.
 +
 
 +
do not connect
 
|
 
|
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.148
+
| rowspan="8" |J1.76
−
| rowspan="5" |PA6
+
| rowspan="8" |PF9
−
| rowspan="5" |CPU.PA6
+
| rowspan="8" |CPU.PF9
−
| rowspan="5" |T5
+
| rowspan="8" |W9
−
| rowspan="5" |VDD
+
| rowspan="8" |VDD
−
| rowspan="5" |I/O
+
| rowspan="8" |I/O
−
| rowspan="5" |TBD
+
| rowspan="8" |
−
|Pin ALT-0
+
|Pin AF0
−
|TBD
+
|TRACED13
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF1
−
|TBD
+
|TIM17_CH1N
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF5
−
|TBD
+
|SPI5_MOSI
 
|-
 
|-
−
| rowspan="5" |J1.150
+
|Pin AF6
−
| rowspan="5" |PE11
+
|SAI1_FS_B
−
| rowspan="5" |CPU.PE11
 
−
| rowspan="5" |C1
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF7
−
|TBD
+
|UART7_CTS
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF9
−
|TBD
+
|TIM14_CH1
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF10
−
|TBD
+
|QUADSPI_BK1_IO1
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
| rowspan="5" |J1.152
+
|J1.78
−
| rowspan="5" |PB10
+
 
−
| rowspan="5" |CPU.PB10
+
(NOR on board)
−
| rowspan="5" |W5
+
|PF8
−
| rowspan="5" |VDD
+
|CPU.PF8
−
| rowspan="5" |I/O
+
|U10
−
| rowspan="5" |TBD
+
|VDD
−
|Pin ALT-0
+
|I/O
−
|TBD
+
|internally used for NOR flash.
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-1
+
| rowspan="8" |J1.78
−
|TBD
+
| rowspan="8" |PF8
 +
| rowspan="8" |CPU.PF8
 +
| rowspan="8" |U10
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |
 +
|Pin AF0
 +
|TRACED12
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF1
−
|TBD
+
|TIM16_CH1N
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF5
−
|TBD
+
|SPI5_MISO
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF6
−
|TBD
+
|SAI1_SCK_B
 
|-
 
|-
−
| rowspan="5" |J1.154
+
|Pin AF7
−
| rowspan="5" |PF11
+
|UART7_RTS/UART7_DE
−
| rowspan="5" |CPU.PF11
 
−
| rowspan="5" |U5
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF9
−
|TBD
+
|TIM13_CH1
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF10
−
|TBD
+
|QUADSPI_BK1_IO0
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-5
+
|J1.80
−
|TBD
+
 
 +
(NOR on board)
 +
|PF6
 +
|CPU.PF6
 +
|V9
 +
|VDD
 +
|I/O
 +
|internally used for NOR flash.
 +
 
 +
do not connect
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.156
+
| rowspan="7" |J1.80
−
| rowspan="5" |PC7
+
| rowspan="7" |PF6
−
| rowspan="5" |CPU.PC7
+
| rowspan="7" |CPU.PF6
−
| rowspan="5" |A9
+
| rowspan="7" |V9
−
| rowspan="5" |VDD
+
| rowspan="7" |VDD
−
| rowspan="5" |I/O
+
| rowspan="7" |I/O
−
| rowspan="5" |TBD
+
| rowspan="7" |
−
|Pin ALT-0
+
|Pin AF1
−
|TBD
+
|TIM16_CH1
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF5
−
|TBD
+
|SPI5_NSS
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF6
−
|TBD
+
|SAI1_SD_B
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF7
−
|TBD
+
|UART7_RX
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF9
−
|TBD
+
|QUADSPI_BK1_IO3
 
|-
 
|-
−
| rowspan="5" |J1.158
+
|Pin AF12
−
| rowspan="5" |PD3_OPT
+
|SAI4_SCK_B
−
| rowspan="5" | -
 
−
| rowspan="5" | -
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
|J1.82
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.160
 
−
| rowspan="5" |PC10
 
−
| rowspan="5" |CPU.PC10
 
−
| rowspan="5" |D11
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.162
 
−
| rowspan="5" |PB0
 
−
| rowspan="5" |CPU.PB0
 
−
| rowspan="5" |W3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
|J1.164
 
 
|DGND
 
|DGND
 
|DGND
 
|DGND
Line 3,122: Line 3,321:
 
|
 
|
 
|-
 
|-
−
| rowspan="5" |J1.166
+
|J1.84
−
| rowspan="5" |PA5
+
|PMIC_3V3
−
| rowspan="5" |CPU.PA5
+
|VOLTAGE OUTPUT
−
| rowspan="5" |P4
+
| -
−
| rowspan="5" |VDD
+
|PMIC_3V3
−
| rowspan="5" |I/O
+
|S
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.86
−
|TBD
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.88
−
|TBD
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.90
−
|TBD
+
|JTMS-SWDIO
−
|-
+
|CPU.JTMS-SWDIO
−
|Pin ALT-5
+
|D15
−
|TBD
+
|VDD
−
|-
+
|I/O
−
| rowspan="5" |J1.168
+
|
−
| rowspan="5" |PC0
+
|
−
| rowspan="5" |CPU.PC0
+
|
−
| rowspan="5" |T7
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.92
−
|TBD
+
|JTDI
 +
|CPU.JTDI
 +
|D13
 +
|VDD
 +
|I/O
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.94
−
|TBD
+
|NJTRST
 +
|CPU.NJTRST
 +
|D12
 +
|VDD
 +
|I/O
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.96
−
|TBD
+
|JTDO-TRACESWOO
−
|-
+
|CPU.JTDO-TRACESWOO
−
|Pin ALT-5
+
|D14
−
|TBD
+
|VDD
−
|-
+
|I/O
−
| rowspan="5" |J1.170
+
|
−
| rowspan="5" |PB1
+
|
−
| rowspan="5" |CPU.PB1
+
|
−
| rowspan="5" |V3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|J1.98
−
|TBD
+
|JTCK-SWCLK
 +
|CPU.JTCK-SWCLK
 +
|D16
 +
|VDD
 +
|I/O
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.100
−
|TBD
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.102
−
|TBD
+
|NRST_CORE
−
|-
+
|CPU.NRST_CORE
−
|Pin ALT-5
+
|J2
−
|TBD
+
|VDD
 +
|I
 +
|internally connected to NRST
 +
|
 +
|
 
|-
 
|-
−
| rowspan="5" |J1.172
+
|J1.104
−
| rowspan="5" |PE15
+
|PDR_ON
−
| rowspan="5" |CPU.PE15
+
|CPU.PDR_ON
−
| rowspan="5" |E1
+
|N2
−
| rowspan="5" |VDD
+
|VDD
−
| rowspan="5" |I/O
+
|I
−
| rowspan="5" |TBD
+
|
−
|Pin ALT-0
+
|
−
|TBD
+
|
 
|-
 
|-
−
|Pin ALT-1
+
|J1.106
−
|TBD
+
|PDR_ON_CORE
 +
|CPU.PDR_ON_CORE
 +
|N1
 +
|VDD
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-2
+
|J1.108
−
|TBD
+
|PWR_LP
−
|-
+
|CPU.PWR_LP
−
|Pin ALT-3
+
|P1
−
|TBD
+
|VDD
 +
|O
 +
|
 +
|
 +
|
 +
|-
 +
|J1.110
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.112
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.114
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.116
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.118
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.120
 +
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 +
|-
 +
|J1.122
 +
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="9" |J1.124
 +
| rowspan="9" |PE13
 +
| rowspan="9" |CPU.PE13
 +
| rowspan="9" |C2
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|HDP2
 +
|-
 +
|Pin AF1
 +
|TIM1_CH3
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKIN5
 +
|-
 +
|Pin AF5
 +
|SPI4_MISO
 +
|-
 +
|Pin AF10
 +
|SAI2_FS_B
 +
|-
 +
|Pin AF12
 +
|FMC_AD10/FMC_D10
 +
|-
 +
|Pin AF13
 +
|DCMI_D6
 +
|-
 +
|Pin AF14
 +
|LCD_DE
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.126
 +
|PC13
 +
|CPU.PC13
 +
|K3
 +
|VDD
 +
|I/O
 +
|internally used for PMIC,
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="12" |J1.128
 +
| rowspan="12" |PA4
 +
| rowspan="12" |CPU.PA4
 +
| rowspan="12" |R4
 +
| rowspan="12" |VDD
 +
| rowspan="12" |I/O
 +
| rowspan="12" |
 +
|Pin AF0
 +
|HDP0
 +
|-
 +
|Pin AF2
 +
|TIM5_ETR
 +
|-
 +
|Pin AF4
 +
|SAI4_D2
 +
|-
 +
|Pin AF5
 +
|SPI1_NSS/I2S1_WS
 +
|-
 +
|Pin AF6
 +
|SPI3_NSS/I2S3_WS
 +
|-
 +
|Pin AF7
 +
|USART2_CK
 +
|-
 +
|Pin AF8
 +
|SPI6_NSS
 +
|-
 +
|Pin AF12
 +
|SAI4_FS_A
 +
|-
 +
|Pin AF13
 +
|DCMI_HSYNC
 +
|-
 +
|Pin AF14
 +
|LCD_VSYNC
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP18
 +
 
 +
ADC2_INP18
 +
 
 +
DAC_OUT1
 +
|-
 +
|J1.130
 +
 
 +
(eMMC 8-bit
 +
 
 +
on board)
 +
|PC6_OPT
 +
|CPU.PC6
 +
|D10
 +
|VDD
 +
|I/O
 +
|internally used for eMMC,
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="14" |J1.130
 +
| rowspan="14" |PC6_OPT
 +
| rowspan="14" | CPU.PC6
 +
| rowspan="14" | D10
 +
| rowspan="14" |VDD
 +
| rowspan="14" |I/O
 +
| rowspan="14" |
 +
|Pin AF0
 +
|HDP1
 +
|-
 +
|Pin AF2
 +
|TIM3_CH1
 +
|-
 +
|Pin AF3
 +
|TIM8_CH1
 +
|-
 +
|Pin AF4
 +
|DFSDM1_CKIN3
 +
|-
 +
|Pin AF5
 +
|I2S2_MCK
 +
|-
 +
|Pin AF7
 +
|USART6_TX
 +
|-
 +
|Pin AF8
 +
|SDMMC1_D0DIR
 +
|-
 +
|Pin AF9
 +
|SDMMC2_D0DIR
 +
|-
 +
|Pin AF10
 +
|SDMMC2_D6
 +
|-
 +
|Pin AF11
 +
|DSI_TE
 +
|-
 +
|Pin AF12
 +
|SDMMC1_D6
 +
|-
 +
|Pin AF13
 +
|DCMI_D0
 +
|-
 +
|Pin AF14
 +
|LCD_HSYNC
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="9" |J1.132
 +
| rowspan="9" |PG7
 +
| rowspan="9" |CPU.PG7
 +
| rowspan="9" |W10
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|TRACED5
 +
|-
 +
|Pin AF6
 +
|SAI1_MCLK_A
 +
|-
 +
|Pin AF7
 +
|USART6_CK
 +
|-
 +
|Pin AF8
 +
|UART8_RTS/UART8_DE
 +
|-
 +
|Pin AF9
 +
|QUADSPI_CLK
 +
|-
 +
|Pin AF11
 +
|QUADSPI_BK2_IO3
 +
|-
 +
|Pin AF13
 +
|DCMI_D13
 +
|-
 +
|Pin AF14
 +
|LCD_CLK
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="9" |J1.134
 +
| rowspan="9" |PG10
 +
| rowspan="9" |CPU.PG10
 +
| rowspan="9" |V7
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|TRACED10
 +
|-
 +
|Pin AF8
 +
|UART8_CTS
 +
|-
 +
|Pin AF9
 +
|LCD_G3
 +
|-
 +
|Pin AF10
 +
|SAI2_SD_B
 +
|-
 +
|Pin AF11
 +
|QUADSPI_BK2_IO2
 +
|-
 +
|Pin AF12
 +
|FMC_NE3
 +
|-
 +
|Pin AF13
 +
|DCMI_D2
 +
|-
 +
|Pin AF14
 +
|LCD_B2
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="10" |J1.136
 +
| rowspan="10" |PD10
 +
| rowspan="10" |CPU.PD10
 +
| rowspan="10" |C5
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF0
 +
|RTC_REFIN
 +
|-
 +
|Pin AF1
 +
|TIM16_BKIN
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKOUT
 +
|-
 +
|Pin AF4
 +
|I2C5_SMBA
 +
|-
 +
|Pin AF5
 +
|SPI3_MISO/I2S3_SDI
 +
|-
 +
|Pin AF6
 +
|SAI3_FS_B
 +
|-
 +
|Pin AF7
 +
|USART3_CK
 +
|-
 +
|Pin AF12
 +
|FMC_AD15/FMC_D15
 +
|-
 +
|Pin AF14
 +
|LCD_B3
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="8" |J1.138
 +
| rowspan="8" |PE12
 +
| rowspan="8" |CPU.PE12
 +
| rowspan="8" |D2
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |
 +
|Pin AF1
 +
|TIM1_CH3N
 +
|-
 +
|Pin AF3
 +
|DFSDM1_DATIN5
 +
|-
 +
|Pin AF5
 +
|SPI4_SCK
 +
|-
 +
|Pin AF8
 +
|SDMMC1_D0DIR
 +
|-
 +
|Pin AF10
 +
|SAI2_SCK_B
 +
|-
 +
|Pin AF12
 +
|FMC_AD9/FMC_D9
 +
|-
 +
|Pin AF14
 +
|LCD_B4
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="10" |J1.140
 +
| rowspan="10" |PA3
 +
| rowspan="10" |CPU.PA3
 +
| rowspan="10" |P3
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF1
 +
|TIM2_CH4
 +
|-
 +
|Pin AF2
 +
|TIM5_CH4
 +
|-
 +
|Pin AF3
 +
|LPTIM5_OUT
 +
|-
 +
|Pin AF4
 +
|TIM15_CH2
 +
|-
 +
|Pin AF7
 +
|USART2_RX
 +
|-
 +
|Pin AF9
 +
|LCD_B2
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_COL/
 +
 
 +
ETH1_MII_COL
 +
|-
 +
|Pin AF14
 +
|LCD_B5
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP15
 +
 
 +
PVD_IN
 +
|-
 +
| rowspan="16" |J1.142
 +
| rowspan="16" |PB8
 +
| rowspan="16" |CPU.PB8
 +
| rowspan="16" |W6
 +
| rowspan="16" |VDD
 +
| rowspan="16" |I/O
 +
| rowspan="16" |
 +
|Pin AF0
 +
|HDP6
 +
|-
 +
|Pin AF1
 +
|TIM16_CH1
 +
|-
 +
|Pin AF2
 +
|TIM4_CH3
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKIN7
 +
|-
 +
|Pin AF4
 +
|I2C1_SCL
 +
|-
 +
|Pin AF5
 +
|SDMMC1_CKIN
 +
|-
 +
|Pin AF6
 +
|I2C4_SCL
 +
|-
 +
|Pin AF7
 +
|SDMMC2_CKIN
 +
|-
 +
|Pin AF8
 +
|UART4_RX
 +
|-
 +
|Pin AF9
 +
|FDCAN1_RX
 +
|-
 +
|Pin AF10
 +
|SDMMC2_D4
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_TXD3/
 +
 
 +
ETH1_MII_TXD3/
 +
 
 +
ETH1_RGMII_TXD3
 +
|-
 +
|Pin AF12
 +
|SDMMC1_D4
 +
|-
 +
|Pin AF13
 +
|DCMI_D6
 +
|-
 +
|Pin AF14
 +
|LCD_B6
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="16" |J1.144
 +
| rowspan="16" |PB9
 +
| rowspan="16" |CPU.PB9
 +
| rowspan="16" |D9
 +
| rowspan="16" |VDD
 +
| rowspan="16" |I/O
 +
| rowspan="16" |
 +
|Pin AF0
 +
|HDP7
 +
|-
 +
|Pin AF1
 +
|TIM17_CH1
 +
|-
 +
|Pin AF2
 +
|TIM4_CH4
 +
|-
 +
|Pin AF3
 +
|DFSDM1_DATIN7
 +
|-
 +
|Pin AF4
 +
|I2C1_SDA
 +
|-
 +
|Pin AF5
 +
|SPI2_NSS/I2S2_WS
 +
|-
 +
|Pin AF6
 +
|I2C4_SDA
 +
|-
 +
|Pin AF7
 +
|SDMMC2_CDIR
 +
|-
 +
|Pin AF8
 +
|UART4_TX
 +
|-
 +
|Pin AF9
 +
|FDCAN1_TX
 +
|-
 +
|Pin AF10
 +
|SDMMC2_D5
 +
|-
 +
|Pin AF11
 +
|SDMMC1_CDIR
 +
|-
 +
|Pin AF12
 +
|SDMMC1_D5
 +
|-
 +
|Pin AF13
 +
|DCMI_D7
 +
|-
 +
|Pin AF14
 +
|LCD_B7
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.146
 +
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="13" |J1.148
 +
| rowspan="13" |PA6
 +
| rowspan="13" |CPU.PA6
 +
| rowspan="13" |T5
 +
| rowspan="13" |VDD
 +
| rowspan="13" |I/O
 +
| rowspan="13" |
 +
|Pin AF1
 +
|TIM1_BKIN
 +
|-
 +
|Pin AF2
 +
|TIM3_CH1
 +
|-
 +
|Pin AF3
 +
|TIM8_BKIN
 +
|-
 +
|Pin AF4
 +
|SAI4_CK2
 +
|-
 +
|Pin AF5
 +
|SPI1_MISO/I2S1_SDI
 +
|-
 +
|Pin AF8
 +
|SPI6_MISO
 +
|-
 +
|Pin AF9
 +
|TIM13_CH1
 +
|-
 +
|Pin AF11
 +
|MDIOS_MDC
 +
|-
 +
|Pin AF12
 +
|SAI4_SCK_A
 +
|-
 +
|Pin AF13
 +
|DCMI_PIXCLK
 +
|-
 +
|Pin AF14
 +
|LCD_G2
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP3
 +
 
 +
ADC2_INP3
 +
|-
 +
| rowspan="9" |J1.150
 +
| rowspan="9" |PE11
 +
| rowspan="9" |CPU.PE11
 +
| rowspan="9" |C1
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF1
 +
|TIM1_CH2
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKIN4
 +
|-
 +
|Pin AF5
 +
|SPI4_NSS
 +
|-
 +
|Pin AF7
 +
|USART6_CK
 +
|-
 +
|Pin AF10
 +
|SAI2_SD_B
 +
|-
 +
|Pin AF12
 +
|FMC_AD8/FMC_D8
 +
|-
 +
|Pin AF13
 +
|DCMI_D4
 +
|-
 +
|Pin AF14
 +
|LCD_G3
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="10" |J1.152
 +
| rowspan="10" |PB10
 +
| rowspan="10" |CPU.PB10
 +
| rowspan="10" |W5
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF1
 +
|TIM2_CH3
 +
|-
 +
|Pin AF3
 +
|LPTIM2_IN1
 +
|-
 +
|Pin AF4
 +
|I2C2_SCL
 +
|-
 +
|Pin AF5
 +
|SPI2_SCK/I2S2_CK
 +
|-
 +
|Pin AF6
 +
|DFSDM1_DATIN7
 +
|-
 +
|Pin AF7
 +
|USART3_TX
 +
|-
 +
|Pin AF9
 +
|QUADSPI_BK1_NCS
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_RX_ER/
 +
 
 +
ETH1_MII_RX_ER
 +
|-
 +
|Pin AF14
 +
|LCD_G4
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="6" |J1.154
 +
| rowspan="6" |PF11
 +
| rowspan="6" |CPU.PF11
 +
| rowspan="6" |U5
 +
| rowspan="6" |VDD
 +
| rowspan="6" |I/O
 +
| rowspan="6" |
 +
|Pin AF5
 +
|SPI5_MOS
 +
|-
 +
|Pin AF10
 +
|SAI2_SD_B
 +
|-
 +
|Pin AF13
 +
|DCMI_D12
 +
|-
 +
|Pin AF14
 +
|LCD_G5
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP2
 +
|-
 +
| rowspan="13" |J1.156
 +
| rowspan="13" |PC7
 +
| rowspan="13" |CPU.PC7
 +
| rowspan="13" |A9
 +
| rowspan="13" |VDD
 +
| rowspan="13" |I/O
 +
| rowspan="13" |
 +
|Pin AF0
 +
|HDP4
 +
|-
 +
|Pin AF2
 +
|TIM3_CH2
 +
|-
 +
|Pin AF3
 +
|TIM8_CH2
 +
|-
 +
|Pin AF4
 +
|DFSDM1_DATIN3
 +
|-
 +
|Pin AF6
 +
|I2S3_MCK
 +
|-
 +
|Pin AF7
 +
|USART6_RX
 +
|-
 +
|Pin AF8
 +
|SDMMC1_D123DIR
 +
|-
 +
|Pin AF9
 +
|SDMMC2_D123DIR
 +
|-
 +
|Pin AF10
 +
|SDMMC2_D7
 +
|-
 +
|Pin AF12
 +
|SDMMC1_D7
 +
|-
 +
|Pin AF13
 +
|DCMI_D1
 +
|-
 +
|Pin AF14
 +
|LCD_G6
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.158
 +
 
 +
(eMMC 8-bit
 +
 
 +
on board)
 +
|PD3_OPT
 +
|CPU.PD3
 +
|C6
 +
|VDD
 +
|I/O
 +
|internally used for eMMC,
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="13" |J1.158
 +
| rowspan="13" |PD3_OPT
 +
| rowspan="13" | CPU.PD3
 +
| rowspan="13" | C6
 +
| rowspan="13" |VDD
 +
| rowspan="13" |I/O
 +
| rowspan="13" |
 +
|Pin AF0
 +
|HDP5
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKOUT
 +
|-
 +
|Pin AF5
 +
|SPI2_SCK/I2S2_CK
 +
|-
 +
|Pin AF6
 +
|DFSDM1_DATIN0
 +
|-
 +
|Pin AF7
 +
|USART2_CTS/USART2_NSS
 +
|-
 +
|Pin AF8
 +
|SDMMC1_D123DIR
 +
|-
 +
|Pin AF9
 +
|SDMMC2_D7
 +
|-
 +
|Pin AF10
 +
|SDMMC2_D123DIR
 +
|-
 +
|Pin AF11
 +
|SDMMC1_D7
 +
|-
 +
|Pin AF12
 +
|FMC_CLK
 +
|-
 +
|Pin AF13
 +
|DCMI_D5
 +
|-
 +
|Pin AF14
 +
|LCD_G7
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="11" |J1.160
 +
| rowspan="11" |PC10
 +
| rowspan="11" |CPU.PC10
 +
| rowspan="11" |D11
 +
| rowspan="11" |VDD
 +
| rowspan="11" |I/O
 +
| rowspan="11" |
 +
|Pin AF0
 +
|TRACED2
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKIN5
 +
|-
 +
|Pin AF6
 +
|SPI3_SCK/I2S3_CK
 +
|-
 +
|Pin AF7
 +
|USART3_TX
 +
|-
 +
|Pin AF8
 +
|UART4_TX
 +
|-
 +
|Pin AF9
 +
|QUADSPI_BK1_IO1
 +
|-
 +
|Pin AF10
 +
|SAI4_MCLK_B
 +
|-
 +
|Pin AF12
 +
|SDMMC1_D2
 +
|-
 +
|Pin AF13
 +
|DCMI_D8
 +
|-
 +
|Pin AF14
 +
|LCD_R2
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="11" |J1.162
 +
| rowspan="11" |PB0
 +
| rowspan="11" |CPU.PB0
 +
| rowspan="11" |W3
 +
| rowspan="11" |VDD
 +
| rowspan="11" |I/O
 +
| rowspan="11" |
 +
|Pin AF1
 +
|TIM1_CH2N
 +
|-
 +
|Pin AF2
 +
|TIM3_CH3
 +
|-
 +
|Pin AF3
 +
|TIM8_CH2N
 +
|-
 +
|Pin AF6
 +
|DFSDM1_CKOUT
 +
|-
 +
|Pin AF8
 +
|UART4_CTS
 +
|-
 +
|Pin AF9
 +
|LCD_R3
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_RXD2/
 +
 
 +
ETH1_MII_RXD2/
 +
 
 +
ETH1_RGMII_RXD2
 +
|-
 +
|Pin AF12
 +
|MDIOS_MDIO
 +
|-
 +
|Pin AF14
 +
|LCD_G1
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP9
 +
 
 +
ADC1_INN5
 +
 
 +
ADC2_INP9
 +
 
 +
ADC2_INN5
 +
|-
 +
|J1.164
 +
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 +
|-
 +
| rowspan="9" |J1.166
 +
| rowspan="9" |PA5
 +
| rowspan="9" |CPU.PA5
 +
| rowspan="9" |P4
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF1
 +
|TIM2_CH1/TIM2_ETR
 +
|-
 +
|Pin AF3
 +
|TIM8_CH1N
 +
|-
 +
|Pin AF4
 +
|SAI4_CK1
 +
|-
 +
|Pin AF5
 +
|SPI1_SCK/I2S1_CK
 +
|-
 +
|Pin AF8
 +
|SPI6_SCK
 +
|-
 +
|Pin AF12
 +
|SAI4_MCLK_A
 +
|-
 +
|Pin AF14
 +
|LCD_R4
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP19
 +
 
 +
ADC1_INN18
 +
 
 +
ADC2_INP19
 +
 
 +
ADC2_INN18
 +
 
 +
DAC_OUT2
 +
|-
 +
| rowspan="8" |J1.168
 +
| rowspan="8" |PC0
 +
| rowspan="8" |CPU.PC0
 +
| rowspan="8" |T7
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |
 +
|Pin AF3
 +
|DFSDM1_CKIN0
 +
|-
 +
|Pin AF4
 +
|LPTIM2_IN2
 +
|-
 +
|Pin AF6
 +
|DFSDM1_DATIN4
 +
|-
 +
|Pin AF8
 +
|SAI2_FS_B
 +
|-
 +
|Pin AF10
 +
|QUADSPI_BK2_NCS
 +
|-
 +
|Pin AF14
 +
|LCD_R5
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP10
 +
 
 +
ADC2_INP10
 +
|-
 +
| rowspan="10" |J1.170
 +
| rowspan="10" |PB1
 +
| rowspan="10" |CPU.PB1
 +
| rowspan="10" |V3
 +
| rowspan="10" |VDD
 +
| rowspan="10" |I/O
 +
| rowspan="10" |
 +
|Pin AF1
 +
|TIM1_CH3N
 +
|-
 +
|Pin AF2
 +
|TIM3_CH4
 +
|-
 +
|Pin AF3
 +
|TIM8_CH3N
 +
|-
 +
|Pin AF6
 +
|DFSDM1_DATIN1
 +
|-
 +
|Pin AF9
 +
|LCD_R6
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_RXD3/
 +
 
 +
ETH1_MII_RXD3/
 +
 
 +
ETH1_RGMII_RXD3
 +
|-
 +
|Pin AF12
 +
|MDIOS_MDC
 +
|-
 +
|Pin AF14
 +
|LCD_G0
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|ADC1_INP5
 +
 
 +
ADC2_INP5
 +
|-
 +
| rowspan="9" |J1.172
 +
| rowspan="9" |PE15
 +
| rowspan="9" |CPU.PE15
 +
| rowspan="9" |E1
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF0
 +
|HDP3
 +
|-
 +
|Pin AF1
 +
|TIM1_BKIN
 +
|-
 +
|Pin AF4
 +
|TIM15_BKIN
 +
|-
 +
|Pin AF7
 +
|USART2_CTS/USART2_NSS
 +
|-
 +
|Pin AF8
 +
|UART8_CTS
 +
|-
 +
|Pin AF10
 +
|FMC_NCE2
 +
|-
 +
|Pin AF12
 +
|FMC_AD12/FMC_D12
 +
|-
 +
|Pin AF14
 +
|LCD_R7
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.174
 +
 
 +
(eMMC 8-bit
 +
 
 +
on board)
 +
|PE4_OPT
 +
|CPU.PE4
 +
|B11
 +
|VDD
 +
|I/O
 +
|internally used for eMMC,
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="14" |J1.174
 +
| rowspan="14" |PE4_OPT
 +
| rowspan="14" | CPU.PE4
 +
| rowspan="14" | B11
 +
| rowspan="14" |VDD
 +
| rowspan="14" |I/O
 +
| rowspan="14" |
 +
|Pin AF0
 +
|TRACED1
 +
|-
 +
|Pin AF2
 +
|SAI1_D2
 +
|-
 +
|Pin AF3
 +
|DFSDM1_DATIN3
 +
|-
 +
|Pin AF4
 +
|TIM15_CH1N
 +
|-
 +
|Pin AF5
 +
|SPI4_NSS
 +
|-
 +
|Pin AF6
 +
|SAI1_FS_A
 +
|-
 +
|Pin AF7
 +
|SDMMC2_CKIN
 +
|-
 +
|Pin AF8
 +
|SDMMC1_CKIN
 +
|-
 +
|Pin AF9
 +
|SDMMC2_D4
 +
|-
 +
|Pin AF11
 +
|SDMMC1_D4
 +
|-
 +
|Pin AF12
 +
|FMC_A20
 +
|-
 +
|Pin AF13
 +
|DCMI_D4
 +
|-
 +
|Pin AF14
 +
|LCD_B0
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="9" |J1.176
 +
| rowspan="9" |PA10
 +
| rowspan="9" |CPU.PA10
 +
| rowspan="9" |T16
 +
| rowspan="9" |VDD
 +
| rowspan="9" |I/O
 +
| rowspan="9" |
 +
|Pin AF1
 +
|TIM1_CH3
 +
|-
 +
|Pin AF5
 +
|SPI3_NSS/I2S3_WS
 +
|-
 +
|Pin AF7
 +
|USART1_RX
 +
|-
 +
|Pin AF11
 +
|MDIOS_MDIO
 +
|-
 +
|Pin AF12
 +
|SAI4_FS_B
 +
|-
 +
|Pin AF13
 +
|DCMI_D1
 +
|-
 +
|Pin AF14
 +
|LCD_B1
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|Additional
 +
functions
 +
|OTG_FS_ID
 +
 
 +
OTG_HS_ID
 +
|-
 +
| rowspan="14" |J1.178
 +
| rowspan="14" |PE5
 +
| rowspan="14" |CPU.PE5
 +
| rowspan="14" |B7
 +
| rowspan="14" |VDD
 +
| rowspan="14" |I/O
 +
| rowspan="14" |
 +
|Pin AF0
 +
|TRACED3
 +
|-
 +
|Pin AF2
 +
|SAI1_CK2
 +
|-
 +
|Pin AF3
 +
|DFSDM1_CKIN3
 +
|-
 +
|Pin AF4
 +
|TIM15_CH1
 +
|-
 +
|Pin AF5
 +
|SPI4_MISO
 +
|-
 +
|Pin AF6
 +
|SAI1_SCK_A
 +
|-
 +
|Pin AF7
 +
|SDMMC2_D0DIR
 +
|-
 +
|Pin AF8
 +
|SDMMC1_D0DIR
 +
|-
 +
|Pin AF9
 +
|SDMMC2_D6
 +
|-
 +
|Pin AF11
 +
|SDMMC1_D6
 +
|-
 +
|Pin AF12
 +
|FMC_A21
 +
|-
 +
|Pin AF13
 +
|DCMI_D6
 +
|-
 +
|Pin AF14
 +
|LCD_G0
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="13" |J1.180
 +
| rowspan="13" |PE6_OPT
 +
| rowspan="13" | CPU.PE6
 +
| rowspan="13" | B3
 +
| rowspan="13" |VDD
 +
| rowspan="13" |I/O
 +
| rowspan="13" |for SDMMC1_D2 function
 +
use pin J1.79
 +
 
 +
(SDMMC lenght match)
 +
|Pin AF0
 +
|TRACED2
 +
|-
 +
|Pin AF1
 +
|TIM1_BKIN2
 +
|-
 +
|Pin AF2
 +
|SAI1_D1
 +
|-
 +
|Pin AF4
 +
|TIM15_CH2
 +
|-
 +
|Pin AF5
 +
|SPI4_MOSI
 +
|-
 +
|Pin AF6
 +
|SAI1_SD_A
 +
|-
 +
|Pin AF7
 +
|SDMMC2_D0
 +
|-
 +
|<s>Pin AF8</s>
 +
|<s>SDMMC1_D2</s>
 +
|-
 +
|Pin AF10
 +
|SAI2_MCLK_B
 +
|-
 +
|Pin AF12
 +
|FMC_A22
 +
|-
 +
|Pin AF13
 +
|DCMI_D7
 +
|-
 +
|Pin AF14
 +
|LCD_G1
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="12" |J1.182
 +
| rowspan="12" |PG13
 +
| rowspan="12" |CPU.PG13
 +
| rowspan="12" |U2
 +
| rowspan="12" |VDD
 +
| rowspan="12" |I/O
 +
| rowspan="12" |
 +
|Pin AF0
 +
|TRACED0
 +
|-
 +
|Pin AF1
 +
|LPTIM1_OUT
 +
|-
 +
|Pin AF2
 +
|SAI1_CK2
 +
|-
 +
|Pin AF4
 +
|SAI4_CK1
 +
|-
 +
|Pin AF5
 +
|SPI6_SCK
 +
|-
 +
|Pin AF6
 +
|SAI1_SCK_A
 +
|-
 +
|Pin AF7
 +
|USART6_CTS/USART6_NSS
 +
|-
 +
|Pin AF10
 +
|SAI4_MCLK_A
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_TXD0/
 +
 
 +
ETH1_MII_TXD0/
 +
 
 +
ETH1_RGMII_TXD0/
 +
 
 +
ETH1_RMII_TXD0
 +
|-
 +
|Pin AF12
 +
|FMC_A24
 +
|-
 +
|Pin AF14
 +
|LCD_R0
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
|J1.184
 +
 
 +
(eMMC 8-bit
 +
 
 +
on board)
 +
|PA15_OPT
 +
|CPU.PA15
 +
|C7
 +
|VDD
 +
|I/O
 +
|internally used for eMMC,
 +
do not connect
 +
|
 +
|
 +
|-
 +
| rowspan="16" |J1.184
 +
| rowspan="16" |PA15_OPT
 +
| rowspan="16" | CPU.PA15
 +
| rowspan="16" | C7
 +
| rowspan="16" |VDD
 +
| rowspan="16" |I/O
 +
| rowspan="16" |
 +
|Pin AF0
 +
|DBTRGI
 +
|-
 +
|Pin AF1
 +
|TIM2_CH1/TIM2_ETR
 +
|-
 +
|Pin AF2
 +
|SAI4_D2
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF3
−
|TBD
+
|SDMMC1_CDIR
 
|-
 
|-
−
| rowspan="5" |J1.174
+
|Pin AF4
−
| rowspan="5" |PE4_OPT
+
|CEC
−
| rowspan="5" | -
 
−
| rowspan="5" | -
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF5
−
|TBD
+
|SPI1_NSS/I2S1_WS
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF6
−
|TBD
+
|SPI3_NSS/I2S3_WS
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF7
−
|TBD
+
|SPI6_NSS
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF8
−
|TBD
+
|UART4_RTS/UART4_DE
 
|-
 
|-
−
| rowspan="5" |J1.176
+
|Pin AF9
−
| rowspan="5" |PA10
+
|SDMMC2_D5
−
| rowspan="5" |CPU.PA10
 
−
| rowspan="5" |T16
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF10
−
|TBD
+
|SDMMC2_CDIR
 
|-
 
|-
−
|Pin ALT-2
+
|Pin AF11
−
|TBD
+
|SDMMC1_D5
 
|-
 
|-
−
|Pin ALT-3
+
|Pin AF12
−
|TBD
+
|SAI4_FS_A
 
|-
 
|-
−
|Pin ALT-5
+
|Pin AF13
−
|TBD
+
|UART7_TX
 
|-
 
|-
−
| rowspan="5" |J1.178
+
|Pin AF14
−
| rowspan="5" |PE5
+
|LCD_R1
−
| rowspan="5" |CPU.PE5
 
−
| rowspan="5" |B7
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
 
|-
 
|-
−
|Pin ALT-1
+
|Pin AF15
−
|TBD
+
|EVENTOUT
 
|-
 
|-
−
|Pin ALT-2
+
|J1.186
−
|TBD
+
|VBUS_OTG_IN
 +
|CPU.OTG_VBUS
 +
|U15
 +
|VBUS_OTG_IN
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
−
|Pin ALT-3
+
|J1.188
−
|TBD
+
|VBUS_SW
−
|-
+
|PMIC.SWOUT
−
|Pin ALT-5
+
|38
−
|TBD
+
|VBUS_SW
−
|-
+
|S
−
| rowspan="5" |J1.180
+
|
−
| rowspan="5" |PE6_OPT
+
|
−
| rowspan="5" | -
+
|
−
| rowspan="5" | -
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.182
 
−
| rowspan="5" |PG13
 
−
| rowspan="5" |CPU.PG13
 
−
| rowspan="5" |U2
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.184
 
−
| rowspan="5" |PA15_OPT
 
−
| rowspan="5" | -
 
−
| rowspan="5" | -
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.186
 
−
| rowspan="5" |VBUS_OTG_IN
 
−
| rowspan="5" |CPU.OTG_VBUS
 
−
| rowspan="5" |U15
 
−
| rowspan="5" |VBUS_OTG_IN
 
−
| rowspan="5" |S
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
−
|-
 
−
| rowspan="5" |J1.188
 
−
| rowspan="5" |VBUS_SW
 
−
| rowspan="5" |PMIC.SWOUT
 
−
| rowspan="5" |38
 
−
| rowspan="5" |VBUS_SW
 
−
| rowspan="5" |S
 
−
| rowspan="5" |TBD
 
−
|Pin ALT-0
 
−
|TBD
 
−
|-
 
−
|Pin ALT-1
 
−
|TBD
 
−
|-
 
−
|Pin ALT-2
 
−
|TBD
 
−
|-
 
−
|Pin ALT-3
 
−
|TBD
 
−
|-
 
−
|Pin ALT-5
 
−
|TBD
 
 
|-
 
|-
 
|J1.190
 
|J1.190
Line 3,470: Line 4,913:
 
----
 
----
  
−
[[Category:{{{nome-som}}}]]
+
[[Category:ETRA]]

Latest revision as of 15:41, 28 November 2023

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History
Issue Date Notes

2020/12/31

First release

2023/06/09

Pinout update

2023/11/23

Pinout update
2023/11/28 Add pinmux spreadsheet download


Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ETRA SOM:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR3 edge connector 204 pin TE Connectivity 2-2013289-1

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:

ETRA TOP view
ETRA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the SODIMM-DDR3 edge connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ETRA connectors
Internal
connections 		Connections to the ETRA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • PMIC.<x> : pin connected to the Power Manager IC STPMIC1APQR
  • LAN.<x> : pin connected to the LAN PHY KSZ8091RNAIA
  • NOR.<x>: pin connected to the flash NOR
  • NAND.<x>: pin connected to the flash NAND
  • eMMC.<x>: pin connected to the flash eMMC
  • EXP.<x>: pin connected to the I/O EXPANDER ADP5589ACPZ
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout table XLS file[edit | edit source]

For your convenience, please find a spreadsheet with the STM32MP15x pinout and pinmux table here.

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 DGND DGND - - G
J1.3 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.5 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.7 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.9 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.11 DGND DGND - - G
J1.13 ETH_LED LAN.LED0/PME_N1 23 VDD I/O
J1.15 VINTLDO PMIC.INTLDO 40 INTLDO S do not connect
J1.17 DGND DGND - - G
J1.19 ETH_TX_P LAN.TXP 6 - D
J1.21 ETH_TX_M LAN.TXM 5 - D
J1.23 ETH_RX_P LAN.RXP 4 - D
J1.25 ETH_RX_M LAN.RXM 3 - D
J1.27 LDO2 PMIC.LDO2OUT 18 LDO2 S Spare LDO output
J1.29 LDO5 PMIC.LDO5OUT 20 LDO5 S Spare LDO output
J1.31 - NC - - -
J1.33 ETH_INT LAN.INTRP 18 VDD O open drain with internal pull-up to VDD
J1.35 DGND DGND - - G
J1.37

(NAND on board)

PD1 CPU.PD1 A4 VDD I/O internally used for NAND flash,

do not connect

J1.37 PD1 CPU.PD1 A4 VDD I/O Pin AF2 I2C6_SCL
Pin AF3 DFSDM1_DATIN6
Pin AF4 I2C5_SCL
Pin AF6 SAI3_SD_A
Pin AF8 UART4_TX
Pin AF9 FDCAN1_TX
Pin AF10 SDMMC3_D0
Pin AF11 DFSDM1_CKIN7
Pin AF12 FMC_AD3/FMC_D3
Pin AF15 EVENTOUT
J1.39

(NAND on board)

PD4 CPU.PD4 D6 VDD I/O internally used for NAND flash,

do not connect

J1.39 PD4 CPU.PD4 D6 VDD I/O Pin AF6 SAI3_FS_A
Pin AF7 USART2_RTS/USART2_DE
Pin AF10 SDMMC3_D1
Pin AF11 DFSDM1_CKIN0
Pin AF12 FMC_NOE
Pin AF15 EVENTOUT
J1.41

(NAND on board)

PD5 CPU.PD5 D7 VDD I/O internally used for NAND flash,

do not connect

J1.41 PD5 CPU.PD5 D7 VDD I/O Pin AF7 USART2_TX
Pin AF10 SDMMC3_D2
Pin AF12 FMC_NWE
Pin AF15 EVENTOUT
J1.43 PD7 CPU.PD7 B4 VDD I/O Pin AF0 TRACED6
Pin AF3 DFSDM1_DATIN4
Pin AF4 I2C2_SCL
Pin AF6 DFSDM1_CKIN1
Pin AF7 USART2_CK
Pin AF9 SPDIFRX_IN1
Pin AF10 SDMMC3_D3
Pin AF12 FMC_NE1
Pin AF15 EVENTOUT
J1.45

(NAND on board)

PD0 CPU.PD0 A3 VDD I/O internally used for NAND flash,

do not connect

J1.45 PD0 CPU.PD0 A3 VDD I/O Pin AF2 I2C6_SDA
Pin AF3 DFSDM1_CKIN6
Pin AF4 I2C5_SDA
Pin AF6 SAI3_SCK_A
Pin AF8 UART4_RX
Pin AF9 FDCAN1_RX
Pin AF10 SDMMC3_CMD
Pin AF11 DFSDM1_DATIN7
Pin AF12 FMC_AD2/FMC_D2
Pin AF15 EVENTOUT
J1.47 PG15 CPU.PG15 A2 VDD I/O Pin AF0 TRACED7
Pin AF2 SAI1_D2
Pin AF4 I2C2_SDA
Pin AF6 SAI1_FS_A
Pin AF7 USART6_CTS/USART6_NSS
Pin AF10 SDMMC3_CK
Pin AF13 DCMI_D13
Pin AF15 EVENTOUT
J1.49

(NOR on board)

PF10 CPU.PF10 U9 VDD I/O internally used for NOR flash,

do not connect

J1.49 PF10 CPU.PF10 U9 VDD I/O Pin AF1 TIM16_BKIN
Pin AF2 SAI1_D3
Pin AF3 SAI4_D4
Pin AF6 SAI1_D4
Pin AF9 QUADSPI_CLK
Pin AF12 SAI4_D3
Pin AF13 DCMI_D11
Pin AF14 LCD_DE
Pin AF15 EVENTOUT
J1.51

(NAND on board)

PE7 CPU.PE7 T10 VDD I/O internally used for NAND flash,

do not connect

J1.51 PE7 CPU.PE7 T10 VDD I/O Pin AF1 TIM1_ETR
Pin AF2 TIM3_ETR
Pin AF3 DFSDM1_DATIN2
Pin AF7 UART7_RX
Pin AF10 QUADSPI_BK2_IO0
Pin AF12 FMC_AD4/FMC_D4
Pin AF15 EVENTOUT
J1.53

(NAND on board)

PE8 CPU.PE8 T11 VDD I/O internally used for NAND flash,

do not connect

J1.53 PE8 CPU.PE8 T11 VDD I/O Pin AF1 TIM1_CH1N
Pin AF3 DFSDM1_CKIN2
Pin AF7 UART7_TX
Pin AF10 QUADSPI_BK2_IO1
Pin AF12 FMC_AD5/FMC_D5
Pin AF15 EVENTOUT
J1.55 NOR_WP# NOR.WPn C4 VDD I/O internal pull-up to VDD,

this NOR pin is shared with QSPI_IO2 function

J1.57 DGND DGND - - G
J1.59 - NC - - -
J1.61

(eMMC on board)

PB14 CPU.PB14 C9 VDD I/O internally used for eMMC flash,

do not connect

J1.61 PB14 CPU.PB14 C9 VDD I/O Pin AF1 TIM1_CH2N
Pin AF2 TIM12_CH1
Pin AF3 TIM8_CH2N
Pin AF4 USART1_TX
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_DATIN2
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 SDMMC2_D0
Pin AF15 EVENTOUT
J1.63

(eMMC on board)

PB15 CPU.PB15 A8 VDD I/O internally used for eMMC flash,

do not connect

J1.63 PB15 CPU.PB15 A8 VDD I/O Pin AF0 RTC_REFIN
Pin AF1 TIM1_CH3N
Pin AF2 TIM12_CH2
Pin AF3 TIM8_CH3N
Pin AF4 USART1_RX
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF6 DFSDM1_CKIN2
Pin AF9 SDMMC2_D1
Pin AF15 EVENTOUT
J1.65

(eMMC on board)

PB3 CPU.PB3 A7 VDD I/O internally used for eMMC flash,

do not connect

J1.65 PB3 CPU.PB3 A7 VDD I/O Pin AF0 TRACED9
Pin AF1 TIM2_CH2
Pin AF4 SAI4_CK1
Pin AF5 SPI1_SCK/I2S1_CK
Pin AF6 SPI3_SCK/I2S3_CK
Pin AF8 SPI6_SCK
Pin AF9 SDMMC2_D2
Pin AF12 SAI4_MCLK_A
Pin AF13 UART7_RX
Pin AF15 EVENTOUT
J1.67

(eMMC on board)

PB4 CPU.PB4 B9 VDD I/O internally used for eMMC flash,

do not connect

J1.67 PB4 CPU.PB4 B9 VDD I/O Pin AF0 TRACED8
Pin AF1 TIM16_BKIN
Pin AF2 TIM3_CH1
Pin AF4 SAI4_CK2
Pin AF5 SPI1_MISO/I2S1_SDI
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 SPI2_NSS/I2S2_WS
Pin AF8 SPI6_MISO
Pin AF9 SDMMC2_D3
Pin AF12 SAI4_SCK_A
Pin AF13 UART7_TX
Pin AF15 EVENTOUT
J1.69

(eMMC on board)

PG6 CPU.PG6 A6 VDD I/O internally used for eMMC flash,

do not connect

J1.69 PG6 CPU.PG6 A6 VDD I/O Pin AF0 TRACED14
Pin AF1 TIM17_BKIN
Pin AF10 SDMMC2_CMD
Pin AF13 DCMI_D12
Pin AF14 LCD_R7
Pin AF15 EVENTOUT
J1.71

(eMMC on board)

PE3 CPU.PE3 A5 VDD I/O internally used for eMMC flash,

do not connect

J1.71 PE3 CPU.PE3 A5 VDD I/O Pin AF0 TRACED0
Pin AF4 TIM15_BKIN
Pin AF6 SAI1_SD_B
Pin AF9 SDMMC2_CK
Pin AF12 FMC_A19
Pin AF15 EVENTOUT
J1.73 DGND DGND - - G
J1.75 PC8 CPU.PC8 C11 VDD I/O Pin AF0 TRACED0
Pin AF2 TIM3_CH3
Pin AF3 TIM8_CH3
Pin AF6 UART4_TX
Pin AF7 USART6_CK
Pin AF8 UART5_RTS/UART5_DE
Pin AF12 SDMMC1_D0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.77 PC9 CPU.PC9 A10 VDD I/O Pin AF0 TRACED1
Pin AF2 TIM3_CH4
Pin AF3 TIM8_CH4
Pin AF4 I2C3_SDA
Pin AF5 I2S_CKIN
Pin AF8 UART5_CTS
Pin AF9 QUADSPI_BK1_IO0
Pin AF12 SDMMC1_D1
Pin AF13 DCMI_D3
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.79 PE6 CPU.PE6 B3 VDD I/O for LCD_G1 function

use pin J1.180

(RGB lenght match)

Pin AF0 TRACED2
Pin AF1 TIM1_BKIN2
Pin AF2 SAI1_D1
Pin AF4 TIM15_CH2
Pin AF5 SPI4_MOSI
Pin AF6 SAI1_SD_A
Pin AF7 SDMMC2_D0
Pin AF8 SDMMC1_D2
Pin AF10 SAI2_MCLK_B
Pin AF12 FMC_A22
Pin AF13 DCMI_D7
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.81 PC11 CPU.PC11 A11 VDD I/O Pin AF0 TRACED3
Pin AF3 DFSDM1_DATIN5
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 USART3_RX
Pin AF8 UART4_RX
Pin AF9 QUADSPI_BK2_NCS
Pin AF10 SAI4_SCK_B
Pin AF12 SDMMC1_D3
Pin AF13 DCMI_D4
Pin AF15 EVENTOUT
J1.83 PD2 CPU.PD2 B10 VDD I/O Pin AF2 TIM3_ETR
Pin AF4 I2C5_SMBA
Pin AF6 UART4_RX
Pin AF8 UART5_RX
Pin AF12 SDMMC1_CMD
Pin AF13 DCMI_D11
Pin AF15 EVENTOUT
J1.85 PC12 CPU.PC12 C10 VDD I/O Pin AF0 TRACECLK
Pin AF1 MCO2
Pin AF2 SAI4_D3
Pin AF6 SPI3_MOSI/I2S3_SDO
Pin AF7 USART3_CK
Pin AF8 UART5_TX
Pin AF10 SAI4_SD_B
Pin AF12 SDMMC1_CK
Pin AF13 DCMI_D9
Pin AF15 EVENTOUT
J1.87 DGND DGND - - G
J1.89 PD8 CPU.PD8 F2 VDD I/O Pin AF3 DFSDM1_CKIN3
Pin AF6 SAI3_SCK_B
Pin AF7 USART3_TX
Pin AF9 SPDIFRX_IN2
Pin AF12 FMC_AD13/FMC_D13
Pin AF14 LCD_B7
Pin AF15 EVENTOUT
J1.91 PD9 CPU.PD9 G3 VDD I/O Pin AF3 DFSDM1_DATIN3
Pin AF6 SAI3_SD_B
Pin AF7 USART3_RX
Pin AF12 FMC_AD14/FMC_D14
Pin AF13 DCMI_HSYNC
Pin AF14 LCD_B0
Pin AF15 EVENTOUT
J1.93

(I/O EXP on board)

PC2 CPU.PC2 T2 VDD I/O internally used for I/O EXP,

do not connect

J1.93 PC2 CPU.PC2 T2 VDD I/O Pin AF3 DFSDM1_CKIN1
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_CKOUT
Pin AF11 ETH1_GMII_TXD2/

ETH1_MII_TXD2/

ETH1_RGMII_TXD2

Pin AF13 DCMI_PIXCLK
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP12

ADC1_INN11

J1.95 PA0 CPU.PA0 R3 VDD I/O internally used for PMIC,

do not connect

J1.97 PD13 CPU.PD13 U12 VDD I/O Pin AF1 LPTIM1_OUT
Pin AF2 TIM4_CH2
Pin AF4 I2C4_SDA
Pin AF5 I2C1_SDA
Pin AF6 I2S3_MCK
Pin AF8 SDMMC1_D123DIR
Pin AF9 QUADSPI_BK1_IO3
Pin AF10 SAI2_SCK_A
Pin AF12 FMC_A18
Pin AF13 DSI_TE
Pin AF15 EVENTOUT
J1.99

(NAND on board)

PD12 CPU.PD12 U11 VDD I/O internally used for NAND flash,

do not connect

J1.99 PD12 CPU.PD12 U11 VDD I/O Pin AF1 LPTIM1_IN1
Pin AF2 TIM4_CH1
Pin AF3 LPTIM2_IN1
Pin AF4 I2C4_SCL
Pin AF5 I2C1_SCL
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 QUADSPI_BK1_IO1
Pin AF10 SAI2_FS_A
Pin AF12 FMC_A17/FMC_ALE
Pin AF15 EVENTOUT
J1.101

(NAND on board)

PD11 CPU.PD11 V8 VDD I/O internally used for NAND flash,

do not connect

J1.101 PD11 CPU.PD11 V8 VDD I/O Pin AF3 LPTIM2_IN2
Pin AF4 I2C4_SMBA
Pin AF5 I2C1_SMBA
Pin AF7 USART3_CTS/USART3_NSS
Pin AF9 QUADSPI_BK1_IO0
Pin AF10 SAI2_SD_A
Pin AF12 FMC_A16/FMC_CLE
Pin AF15 EVENTOUT
J1.103 - NC - - -
J1.105

(NAND on board)

PG9 CPU.PG9 T14 VDD I/O internally used for NAND flash,

do not connect

J1.105 PG9 CPU.PG9 T14 VDD I/O Pin AF0 DBTRGO
Pin AF7 USART6_RX
Pin AF8 SPDIFRX_IN4
Pin AF9 QUADSPI_BK2_IO2
Pin AF10 SAI2_FS_B
Pin AF12 FMC_NE2/FMC_NCE
Pin AF13 DCMI_VSYNC
Pin AF14 LCD_R1
Pin AF15 EVENTOUT
J1.107 - NC - - -
J1.109 DGND DGND - - G
J1.111 DSI_CKN CPU.DSI_CKN A14 - D
J1.113 DSI_CKP CPU.DSI_CKP B14 - D
J1.115 DSI_D0N CPU.DSI_D0N A13 - D
J1.117 DSI_D0P DSI_D0P B13 - D
J1.119 DSI_D1N CPU.DSI_D1N A15 - D
J1.121 DSI_D1P CPU.DSI_D1P B15 - D
J1.123 - NC - - -
J1.125 - NC - - -
J1.127 - NC - - -
J1.129 - NC - - -
J1.131 DGND DGND - - G
J1.133 ADP5589_R7 EXP.R7 1 VDD I/O Pin AF0 Keypad row 7
Pin AF5 GPIO 8
J1.135 ADP5589_R6 EXP.R6 2 VDD I/O Pin AF0 Keypad row 6
Pin AF5 GPIO 7
J1.137 ADP5589_R5 EXP.R5 3 VDD I/O Pin AF0 Keypad row 5
Pin AF5 GPIO 6
J1.139 ADP5589_R4 EXP.R4 4 VDD I/O Pin AF0 Keypad row 4
Pin AF1 RESET1
Pin AF5 GPIO 5
J1.141 ADP5589_R3 EXP.R3 5 VDD I/O Pin AF0 Keypad row 3
Pin AF1 Logic LC1
Pin AF2 PWM_OUT
Pin AF3 CLK_OUT
Pin AF5 GPIO 4
J1.143 ADP5589_R2 EXP.R2 6 VDD I/O Pin AF0 Keypad row 2
Pin AF1 LOGIC LB1
Pin AF5 GPIO 3
J1.145 ADP5589_R1 EXP.R1 7 VDD I/O Pin AF0 Keypad row 1
Pin AF1 Logic LA1
Pin AF5 GPIO 2
J1.147 ADP5589_R0 EXP.R0 8 VDD I/O Pin AF0 Keypad row 0
Pin AF1 Logic LY1
Pin AF5 GPIO 1
J1.149 ADP5589_C0 EXP.C0 9 VDD I/O Pin AF0 Keypad column 0
Pin AF5 GPIO 9
J1.151 ADP5589_C1 EXP.C1 10 VDD I/O Pin AF0 Keypad column 1
Pin AF5 GPIO 10
J1.153 DGND DGND - - G
J1.155 ADP5589_C2 EXP.C2 11 VDD I/O Pin AF0 Keypad column 2
Pin AF5 GPIO 11
J1.157 ADP5589_C3 EXP.C3 12 VDD I/O Pin AF0 Keypad column 3
Pin AF5 GPIO 12
J1.159 ADP5589_C4 EXP.C4 13 VDD I/O Pin AF0 Keypad column 4
Pin AF1 RESET2
Pin AF5 GPIO 13
J1.161 ADP5589_C5 EXP.C5 14 VDD I/O Pin AF0 Keypad column 5
Pin AF5 GPIO 14
J1.163 ADP5589_C6 EXP.C6 15 VDD I/O Pin AF0 Keypad column 6
Pin AF1 Logic LC2
Pin AF2 PWM_IN
Pin AF3 CLK_IN
Pin AF5 GPIO 15
J1.165 ADP5589_C7 EXP.C7 16 VDD I/O Pin AF0 Keypad column 7
Pin AF1 Logic LB2
Pin AF5 GPIO 16
J1.167 ADP5589_C8 EXP.C8 19 VDD I/O Pin AF0 Keypad column 8
Pin AF1 Logic LA2
Pin AF5 GPIO 17
J1.169 ADP5589_C9 EXP.C9 20 VDD I/O Pin AF0 Keypad column 9
Pin AF1 Logic LY2
Pin AF5 GPIO 18
J1.171 ADP5589_C10 EXP.C10 21 VDD I/O Pin AF0 Keypad column 10
Pin AF5 GPIO 19
J1.173 - NC - - -
J1.175 DGND DGND - - G
J1.177

(NAND on board)

PE9 CPU.PE9 W7 VDD I/O internally used for NAND flash,

do not connect

J1.177 PE9 CPU.PE9 W7 VDD I/O Pin AF1 TIM1_CH1
Pin AF3 DFSDM1_CKOUT
Pin AF7 UART7_RTS/UART7_DE
Pin AF10 QUADSPI_BK2_IO2
Pin AF12 FMC_AD6/FMC_D6
Pin AF15 EVENTOUT
J1.179

(I/O EXP on board)

PC3 CPU.PC3 T3 VDD I/O internally used for I/O EXP,

do not connect

J1.179 PC3 CPU.PC3 T3 VDD I/O Pin AF0 TRACECLK
Pin AF3 DFSDM1_DATIN1
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF11 ETH1_GMII_TX_CLK/

ETH1_MII_TX_CLK

Pin AF15 EVENTOUT
Additional

functions

ADC1_INP13

ADC1_INN12

J1.181

(NAND on board)

PD6 CPU.PD6 E3 VDD I/O internally used for NAND flash,

do not connect

J1.181 PD6 CPU.PD6 E3 VDD I/O Pin AF1 TIM16_CH1N
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN4
Pin AF4 DFSDM1_DATIN1
Pin AF5 SPI3_MOSI/I2S3_SDO
Pin AF6 SAI1_SD_A
Pin AF7 USART2_RX
Pin AF12 FMC_NWAIT
Pin AF13 DCMI_D10
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.183

(NAND on board)

PE10 CPU.PE10 V10 VDD I/O internally used for NAND flash,

do not connect

J1.183 PE10 CPU.PE10 V10 VDD I/O Pin AF1 TIM1_CH2N
Pin AF3 DFSDM1_DATIN4
Pin AF7 UART7_CTS
Pin AF10 QUADSPI_BK2_IO3
Pin AF12 FMC_AD7/FMC_D7
Pin AF15 EVENTOUT
J1.185 VBUS_OTG_OUT PMIC.VBUSOTG 35 VBUSOTG S USB OTG VOUT
J1.187 PG11 CPU.PG11 V6 VDD I/O Pin AF0 TRACED11
Pin AF4 USART1_TX
Pin AF6 UART4_TX
Pin AF8 SPDIFRX_IN1
Pin AF11 ETH1_GMII_TX_EN/

ETH1_MII_TX_EN/

ETH1_RGMII_TX_CTL/

ETH1_RMII_TX_EN

Pin AF13 DCMI_D3
Pin AF14 LCD_B3
Pin AF15 EVENTOUT
J1.189 PB2 CPU.PB2 T13 VDD I/O Pin AF0 TRACED4
Pin AF1 RTC_OUT2
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN1
Pin AF4 USART1_RX
Pin AF5 I2S_CKIN
Pin AF6 SAI1_SD_A
Pin AF7 SPI3_MOSI/I2S3_SDO
Pin AF8 UART4_RX
Pin AF9 QUADSPI_CLK
Pin AF15 EVENTOUT
J1.191 PE1 CPU.PE1 B1 VDD I/O Pin AF1 LPTIM1_IN2
Pin AF5 I2S2_MCK
Pin AF6 SAI3_SD_B
Pin AF8 UART8_TX
Pin AF12 FMC_NBL1
Pin AF13 DCMI_D3
Pin AF15 EVENTOUT
J1.193 PE0 CPU.PE0 C4 VDD I/O Pin AF1 LPTIM1_ETR
Pin AF2 TIM4_ETR
Pin AF4 LPTIM2_ETR
Pin AF5 SPI3_SCK/I2S3_CK
Pin AF6 SAI4_MCLK_B
Pin AF8 UART8_RX
Pin AF10 SAI2_MCLK_A
Pin AF12 FMC_NBL0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.195 PE2 CPU.PE2 T1 VDD I/O internally used for

PMIC I2C

Pin AF4 I2C4_SCL
J1.197

(LAN PHY on board)

PA13 CPU.PA13 P2 VDD I/O internally used for LAN PHY,

do not connect

J1.197 PA13 CPU.PA13 P2 VDD I/O Pin AF0 DBTRGO
Pin AF1 DBTRGI
Pin AF2 MCO1
Pin AF8 UART4_TX
Pin AF15 EVENTOUT
Additional

functions

BOOTFAILN
J1.199

(NAND on board)

PD14 CPU.PD14 F3 VDD I/O internally used for NAND flash,

do not connect

J1.199 PD14 CPU.PD14 F3 VDD I/O internally used for

NAND flash

Pin AF2 TIM4_CH3
Pin AF6 SAI3_MCLK_B
Pin AF8 UART8_CTS
Pin AF12 FMC_AD0/FMC_D0
Pin AF15 EVENTOUT
J1.201

(NAND on board)

PD15 CPU.PD15 G1 VDD I/O internally used for NAND flash,

do not connect

J1.201 PD15 CPU.PD15 G1 VDD I/O internally used for

NAND flash

Pin AF2 TIM4_CH4
Pin AF6 SAI3_MCLK_A
Pin AF8 UART8_CTS
Pin AF12 FMC_AD1/FMC_D1
Pin AF15 EVENTOUT
J1.203 DGND DGND - - G

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.2 DGND DGND - - G
J1.4 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.6 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.8 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.10 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.12 DGND DGND - - G
J1.14 VBAT CPU.VBAT H3 VBAT S BACKUP VOLTAGE
J1.16 PONKEYn PMIC.PONKEYN 17 3.3VIN I
J1.18 SOM_PGOOD - - VDD O internally connected to VDD
J1.20 BOOT_MODE0 CPU.BOOT0 K1 VDD I internal pull-up or pull-down

according to specific model

J1.22 PWR_ON CPU.PWR_ON L1 VDD O
J1.24 NRST CPU.NRST

PMIC.RSTN

eMMC.RST_n

NOR.NRESET

J1

1

K5

A4

VDD I/O internal 10k pull-up to VDD
J1.26 BOOT_MODE1 CPU.BOOT1 K4 VDD I internal pull-up or pull-down

according to specific model

J1.28 PA9 CPU.PA9 C8 VDD I/O Pin AF1 TIM1_CH2
Pin AF4 I2C3_SMBA
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF7 USART1_TX
Pin AF8 SDMMC2_CDIR
Pin AF10 SDMMC2_D5
Pin AF13 DCMI_D0
Pin AF14 LCD_R5
Pin AF15 EVENTOUT
J1.30 DGND DGND - - G
J1.32 WAKEUP PMIC.WAKEUP 2 VINTLDO I
J1.34 PB13 CPU.PB13 T9 VDD I/O Pin AF1 TIM1_CH1N
Pin AF3 DFSDM1_CKOUT
Pin AF4 LPTIM2_OUT
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF6 DFSDM1_CKIN1
Pin AF7 USART3_CTS/USART3_NSS
Pin AF9 FDCAN2_TX
Pin AF11 ETH1_GMII_TXD1/

ETH1_MII_TXD1/

ETH1_RGMII_TXD1/

ETH1_RMII_TXD1

Pin AF14 UART5_TX
Pin AF15 EVENTOUT
J1.36 BOOT_MODE2 CPU-BOOT2 L2 VDD I internal pull-up or pull-down

according to specific model

J1.38 PA11 CPU.PA11 V17 VDD I/O Pin AF1 TIM1_CH4
Pin AF2 I2C6_SCL
Pin AF4 I2C5_SCL
Pin AF5 SPI2_NSS/I2S2_WS
Pin AF6 UART4_RX
Pin AF7 USART1_CTS/USART1_NSS
Pin AF9 FDCAN1_RX
Pin AF14 LCD_R4
Pin AF15 EVENTOUT
Additional

functions

OTG_FS_DM
J1.40 NAND_WP# NAND.WPn 19 VDD I/O internal pull-up to VDD
J1.42

(NOR on board)

PB6 CPU.PB6 T12 VDD I/O internally used for NOR flash.

do not connect

J1.42 PB6 CPU.PB6 T12 VDD I/O Pin AF1 TIM16_CH1N
Pin AF2 TIM4_CH1
Pin AF4 I2C1_SCL
Pin AF5 CEC
Pin AF6 I2C4_SCL
Pin AF7 USART1_TX
Pin AF9 FDCAN2_TX
Pin AF10 QUADSPI_BK1_NCS
Pin AF11 DFSDM1_DATIN5
Pin AF12 UART5_TX
Pin AF13 DCMI_D5
Pin AF15 EVENTOUT
J1.44 PB7 CPU.PB7 B5 VDD I/O internally used for

PMIC I2C

Pin AF6 I2C1_SDA
J1.46 PE14 CPU.PE14 D3 VDD I/O Pin AF1 TIM1_CH4
Pin AF5 SPI4_MOSI
Pin AF8 UART8_RTS/UART8_DE
Pin AF10 SAI2_MCLK_B
Pin AF11 SDMMC1_D123DIR
Pin AF12 FMC_AD11/FMC_D11
Pin AF13 LCD_G0
Pin AF14 LCD_CLK
Pin AF15 EVENTOUT
J1.48 PA12 CPU.PA12 U16 VDD I/O Pin AF1 TIM1_ETR
Pin AF2 I2C6_SDA
Pin AF4 I2C5_SDA
Pin AF6 UART4_TX
Pin AF7 USART1_RTS/USART1_DE
Pin AF8 SAI2_FS_B
Pin AF9 FDCAN1_TX
Pin AF14 LCD_R5
Pin AF15 EVENTOUT
Additional

functions

OTG_FS_DP
J1.50 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.52 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.54 PMIC_INT# PMIC-INTN 43 VDD O
J1.56 DGND DGND - - G
J1.58 PA14 CPU.PA14 R1 VDD I/O Pin AF0 DBTRGO
Pin AF1 DBTRGI
Pin AF2 MCO2
Pin AF15 EVENTOUT
J1.60 VDD VOLTAGE OUTPUT - VDD S
J1.62 VDD VOLTAGE OUTPUT - VDD S
J1.64 1V8 PMIC.LDO6OUT 21 1V8 S Spare LDO output
J1.66 PG12 CPU.PG12 F1 VDD I/O Pin AF1 LPTIM1_IN1
Pin AF5 SPI6_MISO
Pin AF6 SAI4_CK2
Pin AF7 USART6_RTS/USART6_DE
Pin AF8 SPDIFRX_IN2
Pin AF9 LCD_B4
Pin AF10 SAI4_SCK_A
Pin AF11 ETH1_PHY_INTN
Pin AF12 FMC_NE4
Pin AF14 LCD_B1
Pin AF15 EVENTOUT
J1.68 PB5 CPU.PB5 T8 VDD I/O Pin AF0 ETH_CLK
Pin AF1 TIM17_BKIN
Pin AF2 TIM3_CH2
Pin AF3 SAI4_D1
Pin AF4 I2C1_SMBA
Pin AF5 SPI1_MOSI/I2S1_SDO
Pin AF6 I2C4_SMBA
Pin AF7 SPI3_MOSI/I2S3_SDO
Pin AF8 SPI6_MOSI
Pin AF9 FDCAN2_RX
Pin AF10 SAI4_SD_A
Pin AF11 ETH1_PPS_OUT
Pin AF12 UART5_RX
Pin AF13 DCMI_D10
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.70 PG8 CPU.PG8 U7 VDD I/O Pin AF0 TRACED15
Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 ETH_CLK
Pin AF3 TIM8_ETR
Pin AF5 SPI6_NSS
Pin AF6 SAI4_D2
Pin AF7 USART6_RTS/USART6_DE
Pin AF8 USART3_RTS/USART3_DE
Pin AF9 SPDIFRX_IN3
Pin AF10 SAI4_FS_A
Pin AF11 ETH1_PPS_OUT
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.72 PA8 CPU.PA8 B8 VDD I/O Pin AF0 MCO1
Pin AF1 TIM1_CH1
Pin AF3 TIM8_BKIN2
Pin AF4 I2C3_SCL
Pin AF5 SPI3_MOSI/I2S3_SDO
Pin AF7 USART1_CK
Pin AF8 SDMMC2_CKIN
Pin AF9 SDMMC2_D4
Pin AF10 OTG_FS_SOF/OTG_HS_SOF
Pin AF12 SAI4_SD_B
Pin AF13 UART7_RX
Pin AF14 LCD_R6
Pin AF15 EVENTOUT
J1.74

(NOR on board)

PF7 CPU.PF7 W8 VDD I/O internally used for NOR flash.

do not connect

J1.74 PF7 CPU.PF7 W8 VDD I/O Pin AF1 TIM17_CH1
Pin AF5 SPI5_SCK
Pin AF6 SAI1_MCLK_B
Pin AF7 UART7_TX
Pin AF9 QUADSPI_BK1_IO2
Pin AF15 EVENTOUT
J1.76

(NOR on board)

PF9 CPU.PF9 W9 VDD I/O internally used for NOR flash.

do not connect

J1.76 PF9 CPU.PF9 W9 VDD I/O Pin AF0 TRACED13
Pin AF1 TIM17_CH1N
Pin AF5 SPI5_MOSI
Pin AF6 SAI1_FS_B
Pin AF7 UART7_CTS
Pin AF9 TIM14_CH1
Pin AF10 QUADSPI_BK1_IO1
Pin AF15 EVENTOUT
J1.78

(NOR on board)

PF8 CPU.PF8 U10 VDD I/O internally used for NOR flash.

do not connect

J1.78 PF8 CPU.PF8 U10 VDD I/O Pin AF0 TRACED12
Pin AF1 TIM16_CH1N
Pin AF5 SPI5_MISO
Pin AF6 SAI1_SCK_B
Pin AF7 UART7_RTS/UART7_DE
Pin AF9 TIM13_CH1
Pin AF10 QUADSPI_BK1_IO0
Pin AF15 EVENTOUT
J1.80

(NOR on board)

PF6 CPU.PF6 V9 VDD I/O internally used for NOR flash.

do not connect

J1.80 PF6 CPU.PF6 V9 VDD I/O Pin AF1 TIM16_CH1
Pin AF5 SPI5_NSS
Pin AF6 SAI1_SD_B
Pin AF7 UART7_RX
Pin AF9 QUADSPI_BK1_IO3
Pin AF12 SAI4_SCK_B
Pin AF15 EVENTOUT
J1.82 DGND DGND - - G
J1.84 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.86 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.88 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.90 JTMS-SWDIO CPU.JTMS-SWDIO D15 VDD I/O
J1.92 JTDI CPU.JTDI D13 VDD I/O
J1.94 NJTRST CPU.NJTRST D12 VDD I/O
J1.96 JTDO-TRACESWOO CPU.JTDO-TRACESWOO D14 VDD I/O
J1.98 JTCK-SWCLK CPU.JTCK-SWCLK D16 VDD I/O
J1.100 DGND DGND - - G
J1.102 NRST_CORE CPU.NRST_CORE J2 VDD I internally connected to NRST
J1.104 PDR_ON CPU.PDR_ON N2 VDD I
J1.106 PDR_ON_CORE CPU.PDR_ON_CORE N1 VDD I
J1.108 PWR_LP CPU.PWR_LP P1 VDD O
J1.110 - NC - - -
J1.112 - NC - - -
J1.114 - NC - - -
J1.116 - NC - - -
J1.118 - NC - - -
J1.120 - NC - - -
J1.122 DGND DGND - - G
J1.124 PE13 CPU.PE13 C2 VDD I/O Pin AF0 HDP2
Pin AF1 TIM1_CH3
Pin AF3 DFSDM1_CKIN5
Pin AF5 SPI4_MISO
Pin AF10 SAI2_FS_B
Pin AF12 FMC_AD10/FMC_D10
Pin AF13 DCMI_D6
Pin AF14 LCD_DE
Pin AF15 EVENTOUT
J1.126 PC13 CPU.PC13 K3 VDD I/O internally used for PMIC,

do not connect

J1.128 PA4 CPU.PA4 R4 VDD I/O Pin AF0 HDP0
Pin AF2 TIM5_ETR
Pin AF4 SAI4_D2
Pin AF5 SPI1_NSS/I2S1_WS
Pin AF6 SPI3_NSS/I2S3_WS
Pin AF7 USART2_CK
Pin AF8 SPI6_NSS
Pin AF12 SAI4_FS_A
Pin AF13 DCMI_HSYNC
Pin AF14 LCD_VSYNC
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP18

ADC2_INP18

DAC_OUT1

J1.130

(eMMC 8-bit

on board)

PC6_OPT CPU.PC6 D10 VDD I/O internally used for eMMC,

do not connect

J1.130 PC6_OPT CPU.PC6 D10 VDD I/O Pin AF0 HDP1
Pin AF2 TIM3_CH1
Pin AF3 TIM8_CH1
Pin AF4 DFSDM1_CKIN3
Pin AF5 I2S2_MCK
Pin AF7 USART6_TX
Pin AF8 SDMMC1_D0DIR
Pin AF9 SDMMC2_D0DIR
Pin AF10 SDMMC2_D6
Pin AF11 DSI_TE
Pin AF12 SDMMC1_D6
Pin AF13 DCMI_D0
Pin AF14 LCD_HSYNC
Pin AF15 EVENTOUT
J1.132 PG7 CPU.PG7 W10 VDD I/O Pin AF0 TRACED5
Pin AF6 SAI1_MCLK_A
Pin AF7 USART6_CK
Pin AF8 UART8_RTS/UART8_DE
Pin AF9 QUADSPI_CLK
Pin AF11 QUADSPI_BK2_IO3
Pin AF13 DCMI_D13
Pin AF14 LCD_CLK
Pin AF15 EVENTOUT
J1.134 PG10 CPU.PG10 V7 VDD I/O Pin AF0 TRACED10
Pin AF8 UART8_CTS
Pin AF9 LCD_G3
Pin AF10 SAI2_SD_B
Pin AF11 QUADSPI_BK2_IO2
Pin AF12 FMC_NE3
Pin AF13 DCMI_D2
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.136 PD10 CPU.PD10 C5 VDD I/O Pin AF0 RTC_REFIN
Pin AF1 TIM16_BKIN
Pin AF3 DFSDM1_CKOUT
Pin AF4 I2C5_SMBA
Pin AF5 SPI3_MISO/I2S3_SDI
Pin AF6 SAI3_FS_B
Pin AF7 USART3_CK
Pin AF12 FMC_AD15/FMC_D15
Pin AF14 LCD_B3
Pin AF15 EVENTOUT
J1.138 PE12 CPU.PE12 D2 VDD I/O Pin AF1 TIM1_CH3N
Pin AF3 DFSDM1_DATIN5
Pin AF5 SPI4_SCK
Pin AF8 SDMMC1_D0DIR
Pin AF10 SAI2_SCK_B
Pin AF12 FMC_AD9/FMC_D9
Pin AF14 LCD_B4
Pin AF15 EVENTOUT
J1.140 PA3 CPU.PA3 P3 VDD I/O Pin AF1 TIM2_CH4
Pin AF2 TIM5_CH4
Pin AF3 LPTIM5_OUT
Pin AF4 TIM15_CH2
Pin AF7 USART2_RX
Pin AF9 LCD_B2
Pin AF11 ETH1_GMII_COL/

ETH1_MII_COL

Pin AF14 LCD_B5
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP15

PVD_IN

J1.142 PB8 CPU.PB8 W6 VDD I/O Pin AF0 HDP6
Pin AF1 TIM16_CH1
Pin AF2 TIM4_CH3
Pin AF3 DFSDM1_CKIN7
Pin AF4 I2C1_SCL
Pin AF5 SDMMC1_CKIN
Pin AF6 I2C4_SCL
Pin AF7 SDMMC2_CKIN
Pin AF8 UART4_RX
Pin AF9 FDCAN1_RX
Pin AF10 SDMMC2_D4
Pin AF11 ETH1_GMII_TXD3/

ETH1_MII_TXD3/

ETH1_RGMII_TXD3

Pin AF12 SDMMC1_D4
Pin AF13 DCMI_D6
Pin AF14 LCD_B6
Pin AF15 EVENTOUT
J1.144 PB9 CPU.PB9 D9 VDD I/O Pin AF0 HDP7
Pin AF1 TIM17_CH1
Pin AF2 TIM4_CH4
Pin AF3 DFSDM1_DATIN7
Pin AF4 I2C1_SDA
Pin AF5 SPI2_NSS/I2S2_WS
Pin AF6 I2C4_SDA
Pin AF7 SDMMC2_CDIR
Pin AF8 UART4_TX
Pin AF9 FDCAN1_TX
Pin AF10 SDMMC2_D5
Pin AF11 SDMMC1_CDIR
Pin AF12 SDMMC1_D5
Pin AF13 DCMI_D7
Pin AF14 LCD_B7
Pin AF15 EVENTOUT
J1.146 DGND DGND - - G
J1.148 PA6 CPU.PA6 T5 VDD I/O Pin AF1 TIM1_BKIN
Pin AF2 TIM3_CH1
Pin AF3 TIM8_BKIN
Pin AF4 SAI4_CK2
Pin AF5 SPI1_MISO/I2S1_SDI
Pin AF8 SPI6_MISO
Pin AF9 TIM13_CH1
Pin AF11 MDIOS_MDC
Pin AF12 SAI4_SCK_A
Pin AF13 DCMI_PIXCLK
Pin AF14 LCD_G2
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP3

ADC2_INP3

J1.150 PE11 CPU.PE11 C1 VDD I/O Pin AF1 TIM1_CH2
Pin AF3 DFSDM1_CKIN4
Pin AF5 SPI4_NSS
Pin AF7 USART6_CK
Pin AF10 SAI2_SD_B
Pin AF12 FMC_AD8/FMC_D8
Pin AF13 DCMI_D4
Pin AF14 LCD_G3
Pin AF15 EVENTOUT
J1.152 PB10 CPU.PB10 W5 VDD I/O Pin AF1 TIM2_CH3
Pin AF3 LPTIM2_IN1
Pin AF4 I2C2_SCL
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF6 DFSDM1_DATIN7
Pin AF7 USART3_TX
Pin AF9 QUADSPI_BK1_NCS
Pin AF11 ETH1_GMII_RX_ER/

ETH1_MII_RX_ER

Pin AF14 LCD_G4
Pin AF15 EVENTOUT
J1.154 PF11 CPU.PF11 U5 VDD I/O Pin AF5 SPI5_MOS
Pin AF10 SAI2_SD_B
Pin AF13 DCMI_D12
Pin AF14 LCD_G5
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP2
J1.156 PC7 CPU.PC7 A9 VDD I/O Pin AF0 HDP4
Pin AF2 TIM3_CH2
Pin AF3 TIM8_CH2
Pin AF4 DFSDM1_DATIN3
Pin AF6 I2S3_MCK
Pin AF7 USART6_RX
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D123DIR
Pin AF10 SDMMC2_D7
Pin AF12 SDMMC1_D7
Pin AF13 DCMI_D1
Pin AF14 LCD_G6
Pin AF15 EVENTOUT
J1.158

(eMMC 8-bit

on board)

PD3_OPT CPU.PD3 C6 VDD I/O internally used for eMMC,

do not connect

J1.158 PD3_OPT CPU.PD3 C6 VDD I/O Pin AF0 HDP5
Pin AF3 DFSDM1_CKOUT
Pin AF5 SPI2_SCK/I2S2_CK
Pin AF6 DFSDM1_DATIN0
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D7
Pin AF10 SDMMC2_D123DIR
Pin AF11 SDMMC1_D7
Pin AF12 FMC_CLK
Pin AF13 DCMI_D5
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.160 PC10 CPU.PC10 D11 VDD I/O Pin AF0 TRACED2
Pin AF3 DFSDM1_CKIN5
Pin AF6 SPI3_SCK/I2S3_CK
Pin AF7 USART3_TX
Pin AF8 UART4_TX
Pin AF9 QUADSPI_BK1_IO1
Pin AF10 SAI4_MCLK_B
Pin AF12 SDMMC1_D2
Pin AF13 DCMI_D8
Pin AF14 LCD_R2
Pin AF15 EVENTOUT
J1.162 PB0 CPU.PB0 W3 VDD I/O Pin AF1 TIM1_CH2N
Pin AF2 TIM3_CH3
Pin AF3 TIM8_CH2N
Pin AF6 DFSDM1_CKOUT
Pin AF8 UART4_CTS
Pin AF9 LCD_R3
Pin AF11 ETH1_GMII_RXD2/

ETH1_MII_RXD2/

ETH1_RGMII_RXD2

Pin AF12 MDIOS_MDIO
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP9

ADC1_INN5

ADC2_INP9

ADC2_INN5

J1.164 DGND DGND - - G
J1.166 PA5 CPU.PA5 P4 VDD I/O Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF3 TIM8_CH1N
Pin AF4 SAI4_CK1
Pin AF5 SPI1_SCK/I2S1_CK
Pin AF8 SPI6_SCK
Pin AF12 SAI4_MCLK_A
Pin AF14 LCD_R4
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP19

ADC1_INN18

ADC2_INP19

ADC2_INN18

DAC_OUT2

J1.168 PC0 CPU.PC0 T7 VDD I/O Pin AF3 DFSDM1_CKIN0
Pin AF4 LPTIM2_IN2
Pin AF6 DFSDM1_DATIN4
Pin AF8 SAI2_FS_B
Pin AF10 QUADSPI_BK2_NCS
Pin AF14 LCD_R5
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP10

ADC2_INP10

J1.170 PB1 CPU.PB1 V3 VDD I/O Pin AF1 TIM1_CH3N
Pin AF2 TIM3_CH4
Pin AF3 TIM8_CH3N
Pin AF6 DFSDM1_DATIN1
Pin AF9 LCD_R6
Pin AF11 ETH1_GMII_RXD3/

ETH1_MII_RXD3/

ETH1_RGMII_RXD3

Pin AF12 MDIOS_MDC
Pin AF14 LCD_G0
Pin AF15 EVENTOUT
Additional

functions

ADC1_INP5

ADC2_INP5

J1.172 PE15 CPU.PE15 E1 VDD I/O Pin AF0 HDP3
Pin AF1 TIM1_BKIN
Pin AF4 TIM15_BKIN
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 UART8_CTS
Pin AF10 FMC_NCE2
Pin AF12 FMC_AD12/FMC_D12
Pin AF14 LCD_R7
Pin AF15 EVENTOUT
J1.174

(eMMC 8-bit

on board)

PE4_OPT CPU.PE4 B11 VDD I/O internally used for eMMC,

do not connect

J1.174 PE4_OPT CPU.PE4 B11 VDD I/O Pin AF0 TRACED1
Pin AF2 SAI1_D2
Pin AF3 DFSDM1_DATIN3
Pin AF4 TIM15_CH1N
Pin AF5 SPI4_NSS
Pin AF6 SAI1_FS_A
Pin AF7 SDMMC2_CKIN
Pin AF8 SDMMC1_CKIN
Pin AF9 SDMMC2_D4
Pin AF11 SDMMC1_D4
Pin AF12 FMC_A20
Pin AF13 DCMI_D4
Pin AF14 LCD_B0
Pin AF15 EVENTOUT
J1.176 PA10 CPU.PA10 T16 VDD I/O Pin AF1 TIM1_CH3
Pin AF5 SPI3_NSS/I2S3_WS
Pin AF7 USART1_RX
Pin AF11 MDIOS_MDIO
Pin AF12 SAI4_FS_B
Pin AF13 DCMI_D1
Pin AF14 LCD_B1
Pin AF15 EVENTOUT
Additional

functions

OTG_FS_ID

OTG_HS_ID

J1.178 PE5 CPU.PE5 B7 VDD I/O Pin AF0 TRACED3
Pin AF2 SAI1_CK2
Pin AF3 DFSDM1_CKIN3
Pin AF4 TIM15_CH1
Pin AF5 SPI4_MISO
Pin AF6 SAI1_SCK_A
Pin AF7 SDMMC2_D0DIR
Pin AF8 SDMMC1_D0DIR
Pin AF9 SDMMC2_D6
Pin AF11 SDMMC1_D6
Pin AF12 FMC_A21
Pin AF13 DCMI_D6
Pin AF14 LCD_G0
Pin AF15 EVENTOUT
J1.180 PE6_OPT CPU.PE6 B3 VDD I/O for SDMMC1_D2 function

use pin J1.79

(SDMMC lenght match)

Pin AF0 TRACED2
Pin AF1 TIM1_BKIN2
Pin AF2 SAI1_D1
Pin AF4 TIM15_CH2
Pin AF5 SPI4_MOSI
Pin AF6 SAI1_SD_A
Pin AF7 SDMMC2_D0
Pin AF8 SDMMC1_D2
Pin AF10 SAI2_MCLK_B
Pin AF12 FMC_A22
Pin AF13 DCMI_D7
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.182 PG13 CPU.PG13 U2 VDD I/O Pin AF0 TRACED0
Pin AF1 LPTIM1_OUT
Pin AF2 SAI1_CK2
Pin AF4 SAI4_CK1
Pin AF5 SPI6_SCK
Pin AF6 SAI1_SCK_A
Pin AF7 USART6_CTS/USART6_NSS
Pin AF10 SAI4_MCLK_A
Pin AF11 ETH1_GMII_TXD0/

ETH1_MII_TXD0/

ETH1_RGMII_TXD0/

ETH1_RMII_TXD0

Pin AF12 FMC_A24
Pin AF14 LCD_R0
Pin AF15 EVENTOUT
J1.184

(eMMC 8-bit

on board)

PA15_OPT CPU.PA15 C7 VDD I/O internally used for eMMC,

do not connect

J1.184 PA15_OPT CPU.PA15 C7 VDD I/O Pin AF0 DBTRGI
Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 SAI4_D2
Pin AF3 SDMMC1_CDIR
Pin AF4 CEC
Pin AF5 SPI1_NSS/I2S1_WS
Pin AF6 SPI3_NSS/I2S3_WS
Pin AF7 SPI6_NSS
Pin AF8 UART4_RTS/UART4_DE
Pin AF9 SDMMC2_D5
Pin AF10 SDMMC2_CDIR
Pin AF11 SDMMC1_D5
Pin AF12 SAI4_FS_A
Pin AF13 UART7_TX
Pin AF14 LCD_R1
Pin AF15 EVENTOUT
J1.186 VBUS_OTG_IN CPU.OTG_VBUS U15 VBUS_OTG_IN S
J1.188 VBUS_SW PMIC.SWOUT 38 VBUS_SW S
J1.190 DGND DGND - - G
J1.192 - NC - - -
J1.194 - NC - - -
J1.196 USB_DM2 CPU.USB_DM2 V13 - D
J1.198 USB_DP2 CPU.USB_DP2 W13 - D
J1.200 USB_DP1 CPU.USB_DP1 V14 - D
J1.202 USB_DM1 CPU.USB_DM1 W14 - D
J1.204 DGND DGND - - G
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